| 367457 |
07-Nov-2020 |
dim |
MFC r344855 (by jhb):
Drop "All rights reserved" from my copyright statements.
Reviewed by: rgrimes
Differential Revision: https://reviews.freebsd.org/D19485 |
| 360275 |
24-Apr-2020 |
mav |
MFC r351514: Don't consider PCIe hot-plug command timeout fatal.
According to my tests and errata to several generations of Intel CPUs,
PCIe hot-plug command completion reporting is not very reliable thing.
At least on my Supermicro X11DPi-NT board I never saw it reported.
Before this change timeout code detached devices and tried to disable
the slot, that in my case resulted in hot-plugged device being detached
just a second after it was successfully detected and attached. This
change removes that, so in case of timeout it just prints the error and
continue operation. Linux does the same. |
| 358361 |
27-Feb-2020 |
kib |
MFC r358174:
Add more values for PCI capabilities, PCIe extended capabilities, and subclasses. |
| 358139 |
20-Feb-2020 |
kib |
MFC r358021:
Fix typo. |
| 355359 |
03-Dec-2019 |
jhb |
MFC 342160: Work around BIOS quirks on HPE Proliant MicroServer Gen10
PR: 221350 |
| 354107 |
25-Oct-2019 |
jhb |
MFC 353585,353586: Support hot insertion and removal of PCI devices on EC2.
353585:
Export pci_attach() and pci_detach().
353586:
Support hot insertion and removal of PCI devices on EC2.
Install ACPI notify handlers on PCI devices with an _EJ0 method. This
handler is invoked when devices are added or removed.
- When an ACPI_NOTIFY_DEVICE_CHECK event posts, rescan the parent bus
device. Note that strictly speaking we only need to rescan the
specified device, but BUS_RESCAN is what is available, so we rescan
the entire bus.
- When an ACPI_NOTIFY_EJECT_REQUEST event posts, detach the device
associated with the ACPI handle, invoke the _EJ0 method, and then
delete the device.
Eventually this might be changed to vector notify events to devd in
userspace where devctl can be used instead to permit more complex
actions such as graceful unmounting of filesystems. |
| 351917 |
06-Sep-2019 |
imp |
MFC r349845:
Work around devices which return all zeros for reads of existing MSI-X table
VCTRL registers.
PR: 211713 |
| 346382 |
19-Apr-2019 |
kib |
MFC r345963, r345997:
Implement resets for PCI buses and PCIe bridges. |
| 339932 |
30-Oct-2018 |
jhb |
MFC 338408: Don't directly dereference a user pointer in the VPD ioctl.
The PCIOCLISTVPD ioctl on /dev/pci is used to fetch a list of VPD
key-value pairs for a specific PCI function. It is used by
'pciconf -l -V'. The list is stored in a userland-supplied buffer as
an array of variable-length structures where the key and data length
are stored in a fixed-size header followed by the variable-length
value as a byte array. To facilitate walking this array in userland,
<sys/pciio.h> provides a PVE_NEXT() helper macro to return a pointer
to the next array element by reading the the length out of the current
header and using it to compute the address of the next header.
To simplify the implementation, the ioctl handler was also using
PVE_NEXT() when on the user address of the user buffer to compute the
user address of the next array element. However, the PVE_NEXT() macro
when used with a user address was reading the value's length by
indirecting the user pointer. The value was ready after the current
record had been copied out to the user buffer, so it appeared to work
on architectures where user addresses are directly dereferencable from
the kernel (all but powerpc and i386 after the 4:4 split). The recent
enablement of SMAP on amd64 caught this violation however. To fix,
add a variant of PVE_NEXT() for use in the ioctl handler that takes an
explicit value length. |
| 339021 |
30-Sep-2018 |
slavash |
MFC r338942:
Add PCIV_INVALID definition
From PCI Spec rev 2.2, 6.2.1. Device Identification:
Vendor ID This field identifies the manufacturer of the device. Valid
vendor identifiers are allocated by the PCI SIG to ensure uniqueness.
0FFFFh is an invalid value for Vendor ID.
Approved by: kib (mentor)
Sponsored by: Mellanox Technologies |
| 338421 |
01-Sep-2018 |
kib |
MFC r338024:
Rudimentary AER reading code for ddb(4). |
| 331922 |
03-Apr-2018 |
kib |
MFC r331640:
Fix several leaks of kernel stack data through paddings. |
| 331722 |
29-Mar-2018 |
eadler |
Revert r330897:
This was intended to be a non-functional change. It wasn't. The commit
message was thus wrong. In addition it broke arm, and merged crypto
related code.
Revert with prejudice.
This revert skips files touched in r316370 since that commit was since
MFCed. This revert also skips files that require $FreeBSD$ property
changes.
Thank you to those who helped me get out of this mess including but not
limited to gonzo, kevans, rgrimes.
Requested by: gjb (re) |
| 331149 |
18-Mar-2018 |
eadler |
MFC r315190:
Add constants and descriptions for some new PCI class definitions |
| 331111 |
17-Mar-2018 |
bryanv |
MFC r329598:
Add PCI methods to iterate over the PCI capabilities
VirtIO V1 provides configuration in multiple VENDOR capabilities so this
allows all of the configuration to be discovered.
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D14325 |
| 330897 |
14-Mar-2018 |
eadler |
Partial merge of the SPDX changes
These changes are incomplete but are making it difficult
to determine what other changes can/should be merged.
No objections from: pfg |
| 326316 |
28-Nov-2017 |
asomers |
MFC r324457:
Remove embedded newlines from sysctl variable descriptions
PR: 112556
Submitted by: Willem Jan Withagen <wjw@digiware.nl> (earlier version)
Reported by: Willem Jan Withagen, ighighi@gmail.com
Sponsored by: Spectra Logic Corp |
| 315246 |
14-Mar-2017 |
hselasky |
MFC r310806:
Add MSIX rewrite table quirk for use with VMs.
This patch solves IRQ generation problems using the mlx5en(4) driver
with xenserver v6.5.0 in SRIOV and PCI-passthrough modes.
Until further the hw.pci.msix_rewrite_table quirk must be set manually
in /boot/loader.conf .
Reviewed by: jhb @
Sponsored by: Mellanox Technologies |
| 314005 |
21-Feb-2017 |
sephe |
MFC 312250
alc: Add Killer E2500 support
Reviewed by: jhb, yongari
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D9058 |
| 313456 |
08-Feb-2017 |
vangyzen |
MFC r313180
PCIe HotPlug: remove tests for DL active link capability
As of r313097, the HotPlug code requires the link to support
reporting of the data-link status. Remove tests for this capability
from code that can now assume its presence.
Sponsored by: Dell EMC |
| 313408 |
07-Feb-2017 |
jhb |
MFC 313097: Require Data Layer Active reporting for native PCI-e HotPlug.
Some PCI-e bridges report that they support HotPlug in the slot
capabilities but do not report support for Data Layer Active events
in the link capabilities register. These bridges do not work correctly
when HotPlug is used. Further, while the description of HotPlug in
the spec does not mention that DL active events are required, the
description of the link capabilities register says that DL active is
required for HotPlug. Thanks to Dave Baukus for finding that language
in the spec.
PR: 211699 |
| 312358 |
18-Jan-2017 |
yongari |
MFC r304574-304575,304584:
r304574:
Correct DMA channel number selection on AR816x family of
controllers. For Gigabit Ethernet version of AR816x, AR813x/AR815x
except L1D controller, use vendor recommended ASPM parameters.
While here, increase alc_dma_burst array size. Broken H/W can
return bogus value in theory.
r304575:
Add Killer E2400 Gigabit Ethernet support.
It seems Killer E2200/E2400 has a BIOS misconfiguration or silicon
bug which triggers DMA write errors when driver uses advertised
maximum payload size. Force the maximum payload size to 128 bytes
in DMA configuration.
This change should fix occasional DMA write errors reported on
Killer E2200.
r304584:
Add a missing change in r304575. |
| 308333 |
05-Nov-2016 |
mmel |
MFC r304459,r305527:
r304459:
INTRNG: Rework handling with resources. Partially revert r301453.
- Read interrupt properties at bus enumeration time and store
it into global mapping table.
- At bus_activate_resource() time, given mapping entry is resolved and
connected to real interrupt source. A copy of mapping entry is attached
to given resource.
- At bus_setup_intr() time, mapping entry stored in resource is used
for delivery of requested interrupt configuration.
- For MSI/MSIX interrupts, mapping entry is created within
pci_alloc_msi()/pci_alloc_msix() call.
- For legacy PCI interrupts, mapping entry must be created within
pcib_route_interrupt() by pcib driver itself.
r305527:
Fix MIPS INTRNG (both FDT and non-FDT) behaviour broken by r304459 |
| 308062 |
28-Oct-2016 |
mav |
MFC r307731: Add names for some DASP devices. |
| 307597 |
19-Oct-2016 |
sephe |
MFC 306359
pci: Clear the MEM/PORT_EN bit when updating PCI BAR
It's unsafe to update the BAR when the related EN bit is set.
Submitted by: Dexuan Cui <decui microsoft com>
Reviewed by: jhb
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D7914 |
| 306662 |
03-Oct-2016 |
jhb |
MFC 306126: Fix invalid vendor ID constant (typo).
During a bus rescan the check for an invalid vendor ID of a subfunction
used the wrong constant. |
| 306520 |
30-Sep-2016 |
jhb |
MFC 305502: Reset PCI pass through devices via PCI-e FLR during VM start/end.
Add routines to trigger a function level reset (FLR) of a PCI-express
device via the PCI-express device control register. This also includes
support routines to wait for pending transactions to complete as well
as calculating the maximum completion timeout permitted by a device.
Change the ppt(4) driver to reset pass through devices before attaching
to a VM during startup and before detaching from a VM during shutdown.
Sponsored by: Chelsio Communications |
| 306471 |
30-Sep-2016 |
jhb |
MFC 304858,305485,305497: Fix various issues with PCI pass through and VT-d.
304858:
Enable I/O MMU when PCI pass through is first used.
Rather than enabling the I/O MMU when the vmm module is loaded,
defer initialization until the first attempt to pass a PCI device
through to a guest. If the I/O MMU fails to initialize or is not
present, than fail the attempt to pass a PCI device through to a
guest.
The hw.vmm.force_iommu tunable has been removed since the I/O MMU is
no longer enabled during boot. However, the I/O MMU support can be
disabled by setting the hw.vmm.iommu.enable tunable to 0 to prevent
use of the I/O MMU on any systems where it is buggy.
305485:
Leave ppt devices in the host domain when they are not attached to a VM.
This allows a pass through device to be reset to a normal device driver
on the host and reused on the host. ppt devices are now always active in
some I/O MMU domain when the I/O MMU is active, either the host domain
or the domain of a VM they are attached to.
305497:
Update the I/O MMU in bhyve when PCI devices are added and removed.
When the I/O MMU is active in bhyve, all PCI devices need valid entries
in the DMAR context tables. The I/O MMU code does a single enumeration
of the available PCI devices during initialization to add all existing
devices to a domain representing the host. The ppt(4) driver then moves
pass through devices in and out of domains for virtual machines as needed.
However, when new PCI devices were added at runtime either via SR-IOV or
HotPlug, the I/O MMU tables were not updated.
This change adds a new set of EVENTHANDLERS that are invoked when PCI
devices are added and deleted. The I/O MMU driver in bhyve installs
handlers for these events which it uses to add and remove devices to
the "host" domain.
Sponsored by: Chelsio Communications |
| 306469 |
30-Sep-2016 |
jhb |
MFC 303881: Reliably return PCI_GETCONF_LAST_DEVICE from PCIOCGETCONF.
Previously the loop in PCIIOCGETCONF would terminate as soon as it
found enough matches. Now it will continue iterating through the
PCI device list and only terminate if it finds another matching device
for which it has no room to store a conf structure. This means that
PCI_GETCONF_LAST_DEVICE is reliably returned when the number of
matching devices is equal to the number of slots in the matches
buffer. For example, if a program requests the conf structure for a
single PCI function with a specified domain/bus/slot/function it will
now get PCI_GETCONF_LAST_DEVICE instead of PCI_GETCONF_MORE_DEVS.
While here, simplify the loop conditional a bit more by explicitly
breaking out of the loop if copyout() fails and removing a redundant
i < pci_numdevs check.
Sponsored by: Chelsio Communications |
| 306461 |
29-Sep-2016 |
jhb |
MFC 303721: Permit the name of the /dev/iov entry to be set by the driver.
The PCI_IOV option creates character devices in /dev/iov for each PF
device driver that registers support for creating VFs. By default the
character device is named after the PF device (e.g. /dev/iov/foo0).
This change adds a variant of pci_iov_attach() called pci_iov_attach_name()
that allows the name of the /dev/iov entry to be specified by the
driver.
To preserve the ABI, this version does not modify the existing
PCI_IOV_ATTACH kobj method as was done in HEAD. Instead, a new
PCI_IOV_ATTACH_NAME method has been added that accepts the name as an
additional parameter. The PCI bus driver now provides an implementation
of PCI_IOV_ATTACH_NAME. A default implementation of PCI_IOV_ATTACH is
provided that calls PCI_IOV_ATTACH_NAME passing 'device_get_nameunit(dev)'
as the name.
Sponsored by: Chelsio Communications |
| 305136 |
31-Aug-2016 |
andrew |
MFC 302847, 302848, 302852, 302853:
Remove the remaining non-INTRNG support from the arm64 code. |
| 304433 |
18-Aug-2016 |
vangyzen |
MFC r304246
PCIe HotPlug: Detect bridges that are not really HotPlug capable
Some devices report that they have an MRL when they actually
do not. Since they always report that the MRL is open, child
devices would be ignored. Try to detect these devices and
ignore their claim of HotPlug support. Specifically,
if there is an open MRL but the Data Link Layer is active,
the MRL is not real.
Revert r303645 to re-enable HotPlug support for slots with
power controllers, since it works correctly in my testing.
Start the DLL state-change timer if Presence /or/ MRL state changes,
along with other conditions. Previously, we started the timer iff
Presence changed. If there is an MRL, it must be closed for power
to be turned on, so Presence is unlikely to change on an MRL-close event.
Add a printf() of interesting registers on HotPlug interrupts and
commands (one from erj@). These were very useful for debugging.
Guard them with bootverbose, since they're spam in normal operation.
In collaboration with: jhb
Relnotes: yes (re-enable HotPlug support for slots with power controllers)
Sponsored by: Dell Inc.
Differential Revision: https://reviews.freebsd.org/D7509 |
| 303835 |
08-Aug-2016 |
vangyzen |
MFC r303788
Fix some logic in PCIe HotPlug; display EI status
The interpretation of the Electromechanical Interlock Status was
inverted, so we disengaged the EI if a card was inserted.
Fix it to engage the EI if a card is inserted.
When displaying the slot capabilites/status with pciconf:
- We inverted the sense of the Power Controller Control bit,
saying the power was off when it was really on (according to
this bit). Fix that.
- Display the status of the Electromechanical Interlock:
EI(engaged)
EI(disengaged)
Approved by: re (gjb)
Sponsored by: Dell Inc. |
| 303781 |
05-Aug-2016 |
jhb |
MFC 303497,303559,303645: Disable PCI-e hotplug on bridges with power
controllers.
303497:
Add a loader tunable (hw.pci.enable_pcie_hp) to disable PCI-e HotPlug.
Some systems and/or devices (such as riser cards) do not include a
non-compliant implementation of PCI-e HotPlug that can result in devices
not being attached (e.g. the HotPlug code might assume that a card is
being unplugged and will power the slot off and detach it). This
tunable can be set to 0 to disable support for PCI-e HotPlug ignoring
the incorrect HotPlug state on these slots.
303559:
Try to declare _hw_pci for all sysctl cases needed after r303497.
303645:
Disable PCI hotplug support for slots with power controllers.
After further review of the spec, I do not think the current HotPlug
code handles slots with power controllers correctly. In particular,
the power state of the slot is to be inferred from other events, not
from examining the state of the power control bit in SLOT_CTL. For now,
disable PCI hotplug support on such slots.
PR: 211081
Approved by: re (gjb) |
| 302408 |
08-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, as nothing has been merged
here.
Additional commits post-branch will follow.
Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation |
| 302175 |
24-Jun-2016 |
jhb |
Add pci_get_max_payload() to fetch the PCI-express maximum payload size.
Approved by: re (gjb)
MFC after: 2 weeks
Sponsored by: Chelsio Communications
Differential Revision: https://reviews.freebsd.org/D6951
|
| 301453 |
05-Jun-2016 |
skra |
INTRNG - change the way how an interrupt mapping data are provided
to the framework in OFW (FDT) case.
This is a follow-up to r301451.
Differential Revision: https://reviews.freebsd.org/D6634
|
| 301032 |
31-May-2016 |
andrew |
Move a device_printf under bootverbose where it should have been.
Reported by: bz
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
|
| 301031 |
31-May-2016 |
andrew |
Mark the ThunderX and generic PCI drivers as cache-coherent when we know
this to be the case. This will mean we don't try and handle the cache in
bus_dmamap_sync when it is not needed.
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D6605
|
| 300290 |
20-May-2016 |
andrew |
Handle PCI_RES_BUS on the generic and ThunderX PCIe drivers. This has been
tested on the Pass 1.1 and 2.0 ThunderX machines in the Netperf cluster.
Reviewed by: jhb
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D6453
|
| 300249 |
20-May-2016 |
jhb |
Implement a proper detach method for the PCI-PCI bridge driver.
- Add a pcib_detach() function for the PCI-PCI bridge driver. It
tears down the NEW_PCIB and hotplug state including destroying
resource managers, deleting child devices, and disabling hotplug
events.
- Add a detach method to the ACPI PCI-PCI bridge driver which calls
pcib_detach() and then frees the copy of the _PRT interrupt routing
table.
- Add a detach method to the PCI-Cardbus bridge driver which frees
the PCI bus resources in addition to calling cbb_detach().
- Explicitly clear any pending hotplug events during attach to ensure
future events will generate an interrupt.
- If a the Command Completed bit is set in the slot status register
when the command completion timeout fires, treat it as if the
command completed and the completion interrupt was just lost rather
than forcing a detach.
- Don't wait for a Command Completed notification if Command Completion
interrupts are disabled. The spec explicitly says no interrupt is
enabled when clearing CCIE, and on my T400 no interrupt is generated
when CCIE is changed from cleared to set, either. In addition, the
T400 doesn't appear to set the Command Completed bit in the cases
where it doesn't generate an interrupt, so don't schedule the timer
either. (If the CC bit were always set, one could always set the timer
and rely on the logic of treating CC set as a missed interrupt.)
Reviewed by: imp (older version)
Differential Revision: https://reviews.freebsd.org/D6424
|
| 300074 |
17-May-2016 |
jhb |
Rework managing hotplug commands with command completions.
Previously the command completion interrupt would post any pending
command immediately before pcib_pcie_hotplug_update() had been
run to inspect the current status. Now, the command completion
interrupt merely clears the flag and stops the timer assuming that
the caller is always going to call pcib_pcie_hotplug_update() to
generate the next hotplug command if one is needed.
While here, fix a bug for systems with command completion where the
old (existing) value was written to the slot control register instead
of the new value. This fixes the complaint about a missing hotplug
interrupt on my T400.
Differential Revision: https://reviews.freebsd.org/D6363
|
| 299941 |
16-May-2016 |
andrew |
Call ofw_bus_msimap to find the parent MSI controller, it may not use the
msi-parent property.
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
|
| 299932 |
16-May-2016 |
andrew |
Add a pcib interface for use by interrupt controllers that need to
translate the pci rid to a controller ID. The translation could be based
on the 'msi-map' OFW property, a similar ACPI option, or hard-coded for
hardware lacking the above options.
Reviewed by: wma
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
|
| 299929 |
16-May-2016 |
andrew |
Re-commit r299467 having fixed the build:
Add a new get_id interface to pci and pcib. This will allow us to both
detect failures, and get different PCI IDs.
For the former the interface returns an int to signal an error. The ID is
returned at a uintptr_t * argument.
For the latter there is a type argument that allows selecting the ID type.
This only specifies a single type, however a MSI type will be added
to handle the need to find the ID the hardware passes to the ARM GICv3
interrupt controller.
A follow up commit will be made to remove pci_get_rid.
Reviewed by: jhb, rstone (previous version)
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D6239
|
| 299928 |
16-May-2016 |
andrew |
Introduce MSI and MSI-X support to intrng. This adds a new msi device
interface with 5 methods to mirror the 5 MSI/MSI-X methods in the pcib
interface. The pcib driver will need to perform a device specific lookup
to find the MSI controller and pass this to intrng as the xref. Intrng
will finally find the controller and have it handle the requested operation.
Obtained from: ABT Systems Ltd
MFH: yes
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D5985
|
| 299658 |
13-May-2016 |
bz |
When using IOPORT with pci_host_generic we are missing setting the rman_end()
which leads to end being before start and thus a signed extended very large
number of size later on, which kva_alloc() will fail upon and we will panic.
Add the missing call.
Debugged with: andrew
Reviewed by: br, andrew
Sponsored by: DARPA/AFRL
Found: while using virtio with gem5
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D6337
|
| 299493 |
11-May-2016 |
cem |
Revert r299467 to fix the kernel build.
$ svn merge -c -299467 .
Approved by: build being broken for six hours
|
| 299467 |
11-May-2016 |
andrew |
Add a new get_id interface to pci and pcib. This will allow us to both
detect failures, and get different PCI IDs.
For the former the interface returns an int to signal an error. The ID is
returned at a uintptr_t * argument.
For the latter there is a type argument that allows selecting the ID type.
This only specifies a single type, however a MSI type will be added
to handle the need to find the ID the hardware passes to the ARM GICv3
interrupt controller.
A follow up commit will be made to remove pci_get_rid.
Reviewed by: jhb, rstone
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D6239
|
| 299205 |
06-May-2016 |
jhb |
Restore name=value format of PCI location strings.
When devctl was added, the location string for PCI devices was changed to
use the PCI "selector" that pciconf and devctl accept. However, devd
assumes that location strings are formatted as a list of name=value pairs.
As a result, devd is no longer parsing any of the values out of PCI
device events. Restore the previous format of the PCI location strings
to restore the location and slot keywords in case any devd scripts are
using this. Add the "selector" as a new 'dbsf' location variable.
Reviewed by: imp
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D6253
|
| 299142 |
05-May-2016 |
jhb |
Native PCI-express HotPlug support.
PCI-express HotPlug support is implemented via bits in the slot
registers of the PCI-express capability of the downstream port along
with an interrupt that triggers when bits in the slot status register
change.
This is implemented for FreeBSD by adding HotPlug support to the
PCI-PCI bridge driver which attaches to the virtual PCI-PCI bridges
representing downstream ports on HotPlug slots. The PCI-PCI bridge
driver registers an interrupt handler to receive HotPlug events. It
also uses the slot registers to determine the current HotPlug state
and drive an internal HotPlug state machine. For simplicty of
implementation, the PCI-PCI bridge device detaches and deletes the
child PCI device when a card is removed from a slot and creates and
attaches a PCI child device when a card is inserted into the slot.
The PCI-PCI bridge driver provides a bus_child_present which claims
that child devices are present on HotPlug-capable slots only when a
card is inserted. Rather than requiring a timeout in the RC for
config accesses to not-present children, the pcib_read/write_config
methods fail all requests when a card is not present (or not yet
ready).
These changes include support for various optional HotPlug
capabilities such as a power controller, mechanical latch,
electro-mechanical interlock, indicators, and an attention button.
It also includes support for devices which require waiting for
command completion events before initiating a subsequent HotPlug
command. However, it has only been tested on ExpressCard systems
which support surprise removal and have none of these optional
capabilities.
PCI-express HotPlug support is conditional on the PCI_HP option
which is enabled by default on arm64, x86, and powerpc.
Reviewed by: adrian, imp, vangyzen (older versions)
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D6136
|
| 299047 |
04-May-2016 |
jkim |
Fix build without "options PCI_IOV".
|
| 299002 |
03-May-2016 |
jhb |
Save and restore SRIOV-related config registers.
Save the value of the IOV control and page size registers and restore
them (along with the VF count) in pci_cfg_save/pci_cfg_restore. This
ensures ARI remains enabled if a PF driver resets itself during the
PCI_IOV_INIT callback. This might also properly restore SRIOV state
across suspend/resume.
Reviewed by: rstone, vangyzen
Differential Revision: https://reviews.freebsd.org/D6192
|
| 299000 |
03-May-2016 |
jhb |
Use the correct location of the SRIOV capability when enabling ARI.
While here, check if ARI was enabled by re-reading the config register
after writing it and return an error if the write fails.
Reviewed by: rstone, vangyzen
|
| 298955 |
03-May-2016 |
pfg |
sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
|
| 298950 |
03-May-2016 |
jhb |
Fix an off by one error when remapping MSI-X vectors.
pci_remap_msix() can be used to alter the mapping of allocated
MSI-X vectors to the MSI-X table. The code had an off by one error
when adding the IRQ resources after performing a remap. This was
fatal for any vectors in the table that used the "last" valid IRQ as
those vectors were assigned a garbage IRQ value.
MFC after: 3 days
|
| 298717 |
27-Apr-2016 |
jhb |
Fix build for systems without PCI_RES_BUS.
Submitted by: vangyzen
|
| 298711 |
27-Apr-2016 |
jhb |
Add a pcib_attach_child() method to manage adding the child "pci" device.
This allows the PCI-PCI bridge driver to save a reference to the child
device in its softc.
Note that this required moving the "pci" device creation out of
acpi_pcib_attach(). Instead, acpi_pcib_attach() is renamed to
acpi_pcib_fetch_prt() as it's sole action now is to fetch the PCI
interrupt routing table.
Differential Revision: https://reviews.freebsd.org/D6021
|
| 298710 |
27-Apr-2016 |
jhb |
Fix PCI bus detach to delete child devices.
Differential Revision: https://reviews.freebsd.org/D6020
|
| 298708 |
27-Apr-2016 |
jhb |
Implement a PCI bus rescan method.
Rescanning a PCI bus uses the following steps:
- Fetch the current set of child devices and save it in the 'devlist'
array.
- Allocate a parallel array 'unchanged' initalized with NULL pointers.
- Scan the bus checking each slot (and each function on slots with a
multifunction device).
- If a valid function is found, look for a matching device in the 'devlist'
array. If a device is found, save the pointer in the 'unchanged' array.
If a device is not found, add a new device.
- After the scan has finished, walk the 'devlist' array deleting any
devices that do not have a matching pointer in the 'unchanged' array.
- Finally, fetch an updated set of child devices and explicitly attach any
devices that are not present in the 'unchanged' array.
This builds on the previous changes to move subclass data management into
pci_alloc_devinfo(), pci_child_added(), and bus_child_deleted().
Subclasses of the PCI bus use custom rescan logic explicitly override the
rescan method to disable rescans.
Differential Revision: https://reviews.freebsd.org/D6018
|
| 298662 |
26-Apr-2016 |
cem |
PCI Enhanced Allocation: Annotate an intentional switch fallthrough
This is a trivial follow-up to r296308. Annotate the intentional fallthrough
to make it clear for future readers and linters.
Reported by: Coverity
CID: 1352716
Discussed with: jhb
Sponsored by: EMC / Isilon Storage Division
|
| 298202 |
18-Apr-2016 |
andrew |
Pull the MSI/MSI-X handling functions out to help with INTRNG integration.
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
|
| 298029 |
15-Apr-2016 |
jhb |
Add a new PCI bus interface method to alloc the ivars (dinfo) for a device.
The ACPI and OFW PCI bus drivers as well as CardBus override this to
allocate the larger ivars to hold additional info beyond the stock PCI ivars.
This removes the need to pass the size to functions like pci_add_iov_child()
and pci_read_device() simplifying IOV and bus rescanning implementations.
As a result of this and earlier changes, the ACPI PCI bus driver no longer
needs its own device_attach and pci_create_iov_child methods but can use
the methods in the stock PCI bus driver instead.
Differential Revision: https://reviews.freebsd.org/D5891
|
| 297608 |
06-Apr-2016 |
jhb |
Convert pci_delete_child() to a bus_child_deleted() method.
Instead of providing a wrapper around device_delete_child() that the PCI
bus and child bus drivers must call explicitly, move the bulk of the logic
from pci_delete_child() into a bus_child_deleted() method
(pci_child_deleted()). This allows PCI devices to be safely deleted via
device_delete_child().
- Add a bus_child_deleted method to the ACPI PCI bus which clears the
device_t associated with the corresponding ACPI handle in addition to
the normal PCI bus cleanup.
- Change cardbus_detach_card to call device_delete_children() and move
CardBus-specific delete logic into a new cardbus_child_deleted() method.
- Use device_delete_child() instead of pci_delete_child() in the SRIOV code.
- Add a bus_child_deleted method to the OpenFirmware PCI bus drivers which
frees the OpenFirmware device info for each PCI device.
Reviewed by: imp
Tested on: amd64 (CardBus and PCI-e hotplug)
Differential Revision: https://reviews.freebsd.org/D5831
|
| 297038 |
18-Mar-2016 |
bz |
Convert the printfs here from %lx to %jx as well after r297000 in order
to be able to compile this into arm kernels.
Sponsored by: DARPA/AFRL
|
| 297000 |
18-Mar-2016 |
jhibbits |
Use uintmax_t (typedef'd to rman_res_t type) for rman ranges.
On some architectures, u_long isn't large enough for resource definitions.
Particularly, powerpc and arm allow 36-bit (or larger) physical addresses, but
type `long' is only 32-bit. This extends rman's resources to uintmax_t. With
this change, any resource can feasibly be placed anywhere in physical memory
(within the constraints of the driver).
Why uintmax_t and not something machine dependent, or uint64_t? Though it's
possible for uintmax_t to grow, it's highly unlikely it will become 128-bit on
32-bit architectures. 64-bit architectures should have plenty of RAM to absorb
the increase on resource sizes if and when this occurs, and the number of
resources on memory-constrained systems should be sufficiently small as to not
pose a drastic overhead. That being said, uintmax_t was chosen for source
clarity. If it's specified as uint64_t, all printf()-like calls would either
need casts to uintmax_t, or be littered with PRI*64 macros. Casts to uintmax_t
aren't horrible, but it would also bake into the API for
resource_list_print_type() either a hidden assumption that entries get cast to
uintmax_t for printing, or these calls would need the PRI*64 macros. Since
source code is meant to be read more often than written, I chose the clearest
path of simply using uintmax_t.
Tested on a PowerPC p5020-based board, which places all device resources in
0xfxxxxxxxx, and has 8GB RAM.
Regression tested on qemu-system-i386
Regression tested on qemu-system-mips (malta profile)
Tested PAE and devinfo on virtualbox (live CD)
Special thanks to bz for his testing on ARM.
Reviewed By: bz, jhb (previous)
Relnotes: Yes
Sponsored by: Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D4544
|
| 296865 |
14-Mar-2016 |
rstone |
Clean up repeated "All rights reserved"
|
| 296336 |
03-Mar-2016 |
jhibbits |
Replace all resource occurrences of '0UL/~0UL' with '0/~0'.
Summary:
The idea behind this is '~0ul' is well-defined, and casting to uintmax_t, on a
32-bit platform, will leave the upper 32 bits as 0. The maximum range of a
resource is 0xFFF.... (all bits of the full type set). By dropping the 'ul'
suffix, C type promotion rules apply, and the sign extension of ~0 on 32 bit
platforms gets it to a type-independent 'unsigned max'.
Reviewed By: cem
Sponsored by: Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5255
|
| 296316 |
02-Mar-2016 |
bz |
Add gem5 support, so we attach there as well.
Fix the boundary limit to end at the end of the region and not one beyond (1).
Diagnosed by: andrew (1)
Reviewed by: andrew, br
Sponsored by: DARPA/AFRL
Differential Revision: https://reviews.freebsd.org/D5493
|
| 296308 |
02-Mar-2016 |
wma |
Support for Enhanced Allocation in PCI
On some platforms, BAR entries are hardcoded and must not be accessed
using standard method. Add functionality to identify this situation
and configure the bus based on Enhanced Allocation structure.
Obtained from: Semihalf
Sponsored by: Cavium
Approved by: cognet (mentor)
Reviewed by: jhb
Differential revision: https://reviews.freebsd.org/D5242
|
| 296298 |
02-Mar-2016 |
jhibbits |
Replace some more default range checks with RMAN_IS_DEFAULT_RANGE().
This is a follow-on to r295832.
|
| 296137 |
27-Feb-2016 |
jhibbits |
Migrate many bus_alloc_resource() calls to bus_alloc_resource_anywhere().
Most calls to bus_alloc_resource() use "anywhere" as the range, with a given
count. Migrate these to use the new bus_alloc_resource_anywhere() API.
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D5370
|
| 296091 |
26-Feb-2016 |
wma |
Restore ThunderX Pass1.1 PCI changes removed by r295962
If Enhanced Allocation is not used, we can't allocate any random
range. All internal devices have hardcoded place where they can
be located within PCI address space. Fortunately, we can read
this value from BAR.
Obtained from: Semihalf
Sponsored by: Cavium
Approved by: cognet (mentor)
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D5455
|
| 296081 |
26-Feb-2016 |
wma |
Add support for Enhanced Allocation in pciconf
* Modified pciconf to print EA capability structure
* Added register description to pcireg.h
Obtained from: Semihalf
Sponsored by: Cavium
Approved by: cognet (mentor)
Reviewed by: jhb
Differential revision: https://reviews.freebsd.org/D5440
|
| 295962 |
24-Feb-2016 |
wma |
Make pci_host_generic and thunderx_pci common
* provided OFW interface for pci_host_generic (for handling devices which are present in DTS under the PCI node)
* removed support for internal PCI from arm64/cavium
* cleaned up and made most of the code common
Obtained from: Semihalf
Sponsored by: Cavium
Approved by: cognet (mentor)
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D5261
|
| 295816 |
19-Feb-2016 |
se |
Fix syntax error introduced in previous commit where I removed one
character to few. I should have waited for the kernel compile to finish,
even though the change seemed so trivial.
|
| 295813 |
19-Feb-2016 |
se |
Remove redundant check for "(dinfo != NULL)", it has already been performed
as the first part of this complex loop conditional.
Found by: PVS Static Analysis
|
| 295664 |
16-Feb-2016 |
jhibbits |
Convert a few more long -> rman_res_t.
|
| 294883 |
27-Jan-2016 |
jhibbits |
Convert rman to use rman_res_t instead of u_long
Summary:
Migrate to using the semi-opaque type rman_res_t to specify rman resources. For
now, this is still compatible with u_long.
This is step one in migrating rman to use uintmax_t for resources instead of
u_long.
Going forward, this could feasibly be used to specify architecture-specific
definitions of resource ranges, rather than baking a specific integer type into
the API.
This change has been broken out to facilitate MFC'ing drivers back to 10 without
breaking ABI.
Reviewed By: jhb
Sponsored by: Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5075
|
| 294430 |
20-Jan-2016 |
zbb |
Fix invalid root link detection in mv_pci driver
mv_pci driver omitted slot 0, which can be valid device on Armada38x.
New mechanism detects if device is root link, basing on vendor's
and device's IDs.
It is restricted to Armada38x; on other machines, behaviour remains
the same.
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4377
|
| 292669 |
23-Dec-2015 |
jhb |
Add accessor methods to fetch the BAR holding the MSI-X table and PBA.
While here, explicitly note the requirement that the BAR(s) must be
allocated prior to calling pci_alloc_msix().
Reviewed by: andrew, emaste
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D4688
|
| 292215 |
14-Dec-2015 |
andrew |
Update the handling of interrupts on the generic PCIe driver:
* Use the interrupt-map property to route interrupts
* Remove the IRQ rman, it's now unneeded
* Support MSI/MSI-X interrupts
With this I'm able to use the two NICs I've tested (em and msk), however
while I can boot with an AHCI devie attached it fails when any drives are
connected.
Obtained from: ABT Systems Ltd
Sponsored by: SoftIron Inc
|
| 291225 |
23-Nov-2015 |
jhb |
Add a new -B flag for use with list mode (-l) that lists details about
bridges. Currently this includes information about what resources a
bridge decodes on the upstream side for use by downstream devices including
bus numbers, I/O port resources, and memory resources. Windows and bus
ranges are enumerated for both PCI-PCI bridges and PCI-CardBus bridges.
To simplify the implementation, all enumeration is done by reading the
appropriate config space registers directly rather than querying the
bridge driver in the kernel via new ioctls. This does result in a few
limitations.
First, an unimplemented window in a PCI-PCI bridge cannot be accurately
detected as accurate detection requires writing to the window base
register. That is not safe for pciconf(8). Instead, this assumes that
any window where both the base and limit read as all zeroes is
unimplemented.
Second, the PCI-PCI bridge driver in a tree has a few quirks for
PCI-PCI bridges that use subtractive decoding but do not indicate that
via the progif config register. The list of quirks is duplicated in
pciconf's source.
Reviewed by: imp
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D4171
|
| 290415 |
05-Nov-2015 |
jhb |
Add a new helper function for PCI devices to locate the upstream
PCI-express root port of a given PCI device.
Reviewed by: kib, imp
MFC after: 1 week
Sponsored by: Chelsio
Differential Revision: https://reviews.freebsd.org/D4089
|
| 290414 |
05-Nov-2015 |
jhb |
Add helper routines for PCI device drivers to read, write, and modify
PCI-Express capability registers (that is, PCI config registers in the
standard PCI config space belonging to the PCI-Express capability
register set).
Note that all of the current PCI-e registers are either 16 or 32-bits,
so only widths of 2 or 4 bytes are supported.
Reviewed by: imp
MFC after: 1 week
Sponsored by: Chelsio
Differential Revision: https://reviews.freebsd.org/D4088
|
| 289494 |
18-Oct-2015 |
jmg |
drop a bunch of white space at end of lines and end of files...
-x -wb apparently doesn't hide end of file white space changes..
This is to reduce the amount of diff for my PCIe HP changes..
|
| 287882 |
16-Sep-2015 |
zbb |
Add domain support to PCI bus allocation
When the system has more than a single PCI domain, the bus numbers
are not unique, thus they cannot be used for "pci" device numbering.
Change bus numbers to -1 (i.e. to-be-determined automatically)
wherever the code did not care about domains.
Reviewed by: jhb
Obtained from: Semihalf
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D3406
|
| 286480 |
08-Aug-2015 |
zbb |
Treat internal bridge as subtractive on ThunderX ARM64
Internal bridges in Cavium ThunderX SoC behave as subtractive,
but they are unable to be identified. Force setting an appropriate
flag.
Reviewed by: emaste, imp
Obtained from: Semihalf
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D3277
|
| 285752 |
21-Jul-2015 |
zbb |
Add support for vendor specific function for PCI devid acquisition in ITS
It is possible that some HW will use different PCI devids,
hence allow to replace the default domain:bus:slot:func schema
by implementing and registering custom function.
Obtained from: Semihalf
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D3118
|
| 284319 |
12-Jun-2015 |
br |
Rename ECAM PCI driver file.
Requested by: imp
|
| 284317 |
12-Jun-2015 |
br |
Add generic ECAM PCI device driver found in Gem5 simulator.
Work based on Cavium Thunder PCIe driver by Semihalf.
Reviewed by: andrew, jhb
Sponsored by: HEIF5
Differential Revision: https://reviews.freebsd.org/D2386
|
| 284086 |
06-Jun-2015 |
marcel |
Revert previous change. The magical constants can't be changed
(easily) without having to go to other drivers to change the
magical return values. This wouldn't be so bad if there were
proper defines for these constants.
In particular dev/acpica/acpi_pcib_pci.c returns -1000 as the
probe priority and it's expected that this driver gets to
attach over the common PCI bus drivers.
|
| 284078 |
06-Jun-2015 |
marcel |
Don't return -10000 as the probe priority. That's lower than what
BUS_PROBE_HOOVER is. Drivers like proto(4), when compiled into the
kernel or preloaded, will render your system useless by virtue of
attaching to your PCI busses.
Return BUS_PROBE_GENERIC instead. It's just the next priority up
from BUS_PROBE_HOOVER. No other meaning has been give to its use.
While BUS_PROBE_DEFAULT seems like a better candidate, it's hard
not to think that there must be some reason why these drivers
return -10000 in the first place.
Differential Revision: D2705
|
| 284012 |
05-Jun-2015 |
hselasky |
Disable VGA PCI interrupts until a chipset driver is loaded for VGA
PCI devices. Else unhandled display adapter interrupts might freeze
the CPU or consume a lot of CPU.
PR: 156596
MFC after: 1 week
|
| 283735 |
29-May-2015 |
kib |
Remove several write-only variables, all reported by the gcc 4.9
buildkernel run.
Some of them were write-only under some kernel options, e.g. variables
keeping values only used by CTR() macros. It costs nothing to the
code readability and correctness to eliminate the warnings in those
cases too by removing the local cached values used only for
single-access.
Review: https://reviews.freebsd.org/D2665
Reviewed by: rodrigc
Looked at by: bjk
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
|
| 283670 |
28-May-2015 |
jhb |
Create a separate kobj interface for leaf-driver PCI IOV methods.
Leaf drivers should not import the PCI bus interface to add IOV handling.
Instead, move the IOV client methods to a separate kobj interface.
Differential Revision: https://reviews.freebsd.org/D2584
Reviewed by: rstone
|
| 282783 |
11-May-2015 |
jhibbits |
Add a PCI bridge for the Freescale PCIe Root Complex
Summary:
The Freescale PCIe Root Complex shows up as a Processor class device, PowerPC
subclass, so the generic PCI code ignores it for a bridge. This adds support
for it.
As part of this, update the Freescale PCI hostbridge driver, to allow probing
beyond the root complex, instead of only allowing "proper" PCI-PCI bridges.
Reviewers: #powerpc, marcel, nwhitehorn
Reviewed By: nwhitehorn
Subscribers: imp
Differential Revision: https://reviews.freebsd.org/D2442
Relnotes: yes
|
| 282346 |
02-May-2015 |
oshogbo |
Approved, oprócz użycie RESTORE_ERRNO() do ustawiania errno.
Change the nvlist_recv() function to take additional argument that
specifies flags expected on the received nvlist. Receiving a nvlist with
different set of flags than the ones we expect might lead to undefined
behaviour, which might be potentially dangerous.
Update consumers of this and related functions and update the tests.
Approved by: pjd (mentor)
Update man page for nvlist_unpack, nvlist_recv, nvlist_xfer, cap_recv_nvlist
and cap_xfer_nvlist.
Reviewed by: AllanJude
Approved by: pjd (mentor)
|
| 281887 |
23-Apr-2015 |
jhb |
Reassign copyright statements on several files from Advanced
Computing Technologies LLC to Hudson River Trading LLC.
Approved by: Hudson River Trading LLC (who owns ACT LLC)
MFC after: 1 week
|
| 281874 |
22-Apr-2015 |
jhb |
Update the pci_cfg_save/restore routines to operate on bridge devices
(type 1 and type 2) as well as leaf devices (type 0). In particular,
this allows the existing PCI bus logic to save and restore capability
registers such as MSI and PCI-express work for bridge devices rather than
requiring that code to be duplicated in bridge drivers. It also means
that bridge drivers no longer need to save and restore basic registers
such as the PCI command register or BARs nor manage powerstates for the
bridge device.
While here, pci_setup_secbus() has been changed to initialize the 'sec'
and 'sub' fields in the 'secbus' structure instead of requiring the pcib
and pccbb drivers to do this in the NEW_PCIB + PCI_RES_BUS case.
Differential Revision: https://reviews.freebsd.org/D2240
Reviewed by: imp, jmg
MFC after: 2 weeks
|
| 281873 |
22-Apr-2015 |
jhb |
Don't explicitly manage power states for PCI-PCI bridge devices in the
driver's suspend and resume routines. These have been redundant no-ops
since r214065 changed the PCI bus driver to manage power states for
all devices (including type 1/2 bridge devices) during suspend and resume.
|
| 281872 |
22-Apr-2015 |
jhb |
Fix some incorrect #if conditions around older workarounds for bus
numbering goofs.
MFC after: 1 week
|
| 281871 |
22-Apr-2015 |
jhb |
The minimim grant and maximum latency PCI config registers are only valid
for type 0 devices, not type 1 or 2 bridges. Don't read them for bridge
devices during bus scans and return an error when attempting to read them
as ivars for bridge devices.
|
| 279868 |
10-Mar-2015 |
rstone |
Fix SR-IOV passthrough devices to allow ppt to attach
A late change to the SR-IOV infrastructure broke passthrough of
VFs. device_set_devclass() was being used to try to force the
ppt driver to attach to the device, but this didn't work because
the DF_FIXEDCLASS flag wasn't being set on the device, so the
ppt driver probe routine would not match when it returned
BUS_NOWILDCARD. Fix this by adding a new device function that
both sets the devclass and sets the DF_FIXEDCLASS flag, and use
that to force the ppt driver to attach to VFs.
Differential Revision: https://reviews.freebsd.org/D2041
Reviewed by: jhb
MFC after: 3 weeks
|
| 279501 |
01-Mar-2015 |
imp |
Don't leak 'used' in a few error cases.
Reported by: Maxime Villard
|
| 279494 |
01-Mar-2015 |
dumbbell |
Record the dependency to x86bios in vga_pci
This fixes the build of XEN and XBOX kernels on i386, which was broken
in r279487.
While here, do not build vga_pci_repost() on PC98.
Reported by: bz@
|
| 279487 |
01-Mar-2015 |
dumbbell |
vgapci: New vga_pci_repost() function
This can be used to restore the VGA mode after a KMS driver is unloaded.
Differential Revision: https://reviews.freebsd.org/D687
|
| 279465 |
01-Mar-2015 |
rstone |
Validate the schema that the PF driver passed to us
Differential Revision: https://reviews.freebsd.org/D90
Reviewed by: emaste
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279453 |
01-Mar-2015 |
rstone |
Pass SR-IOV configuration to kernel using an nvlist
Pass all SR-IOV configuration to the kernel using an nvlist. The
main benefit that this offers is flexibility. It allows a driver
to accept any number of parameters of any type supported by the
SR-IOV configuration infrastructure with having to make any
changes outside of the driver.
It also offers the user very fine-grained control over the
configuration of the VFs -- if they want, they can have different
configuration applied to every VF.
Differential Revision: https://reviews.freebsd.org/D82
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279452 |
01-Mar-2015 |
rstone |
Add function to validate the consistency of SR-IOV config
Add a function that validates that the user-provided SR-IOV
configuration is valid. This includes basic checks that the
structure of the configuration is correct (e.g. all required
configuration nodes are present) as well as validating against
a configuration schema.
The schema validation consists of:
- Ensuring that all required config parameters are present.
- If the schema defines a default value for a parameter,
adding the default value if the parameter is not set.
- Ensuring that no parameters are specified in the config
that are not defined in the schema.
- Ensuring that have the correct type defined in the schema.
- Ensuring that no configuration nodes are present for devices
that do not exist. For example, if 2 VFs are configured,
then we validate that a node called VF-5 does not exist.
Differential Revision: https://reviews.freebsd.org/D81
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279451 |
01-Mar-2015 |
rstone |
Add infrastructure for exporting config schema from PF drivers
Differential Revision: https://reviews.freebsd.org/D80
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279450 |
01-Mar-2015 |
rstone |
Add interface to destroy SR-IOV VFs
Differential Revision: https://reviews.freebsd.org/D79
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279449 |
01-Mar-2015 |
rstone |
Allocate PCI I/O memory spaces for VFs
When creating VFs, we must size each SR-IOV BAR on the PF and
allocate a configuous I/O memory window large enough for every VF.
However, the window only needs to be aligned to a boundary equal
to the size of the window for a single VF.
When a VF attempts to allocate an I/O memory resource, we must
intercept the request in the pci driver and pass it off to the
SR-IOV code, which will allocate the correct window from the
pre-allocated memory space for the PF.
Inform the pci driver about the size and address of the BARs on
the VF when the VF is created. This is required by pciconf -b and
bhyve.
Differential Revision: https://reviews.freebsd.org/D78
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279448 |
01-Mar-2015 |
rstone |
Emulate the Device ID and Vendor ID registers for VFs
The SR-IOV standard requires VFs to read all-ones when the VID
and DID registers are read. The VMM (hypervisor) is required to
emulate them instead. Make pci_read_config() do this emulation.
Change pci_user.c to use pci_read_config() to read config space
registers instead of going directly to the pcib so that the
emulated VID/DID registers work correctly on VFs. This is
required both for pciconf and bhyve PCI passthrough.
Differential Revision: https://reviews.freebsd.org/D77
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279447 |
01-Mar-2015 |
rstone |
Implement interface to create SR-IOV Virtual Functions
Implement the interace to create SR-IOV Virtual Functions (VFs).
When a driver registers that they support SR-IOV by calling
pci_setup_iov(), the SR-IOV code creates a new node in /dev/iov
for that device. An ioctl can be invoked on that device to
create VFs and have the driver initialize them.
At this point, allocating memory I/O windows (BARs) is not
supported.
Differential Revision: https://reviews.freebsd.org/D76
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279443 |
01-Mar-2015 |
rstone |
Add some pcib methods to get ARI-related information
Differential Revision: https://reviews.freebsd.org/D72
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279442 |
01-Mar-2015 |
rstone |
Refactor PCI resource allocation
Refactor PCI resource allocation code to allow a request for a
memory-mapped I/O window that is a multiple of a requested size.
This is needed by the SR-IOV code because the VF BARs are all
allocated contiguously. We can't just allocate a resource that is
a multiple of a single VF BAR because the size of an allocation
implies its alignment requirement.
Differential Revision: https://reviews.freebsd.org/D71
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 279441 |
01-Mar-2015 |
rstone |
Refactor PCI device creation
Refactor creation of PCI devices into helper methods that can be
used by the VF creation code.
Differential Revision: https://reviews.freebsd.org/D67
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
|
| 278860 |
16-Feb-2015 |
jmg |
remove NULL check as M_WAITOK will not return NULL
Reviewed by: jhb
Sponsored by: FreeBSD Foundation
|
| 278320 |
06-Feb-2015 |
jhb |
Add a new device control utility for new-bus devices called devctl. This
allows the user to request administrative changes to individual devices
such as attach or detaching drivers or disabling and re-enabling devices.
- Add a new /dev/devctl2 character device which uses ioctls for device
requests. The ioctls use a common 'struct devreq' which is somewhat
similar to 'struct ifreq'.
- The ioctls identify the device to operate on via a string. This
string can either by the device's name, or it can be a bus-specific
address. (For unattached devices, a bus address is the only way to
locate a device.) Bus drivers register an eventhandler to claim
unrecognized device names that the driver recognizes as a valid address.
Two buses currently support addresses: ACPI recognizes any device
in the ACPI namespace via its full path starting with "\" and
the PCI bus driver recognizes an address specification of
'pci[<domain>:]<bus>:<slot>:<func>' (identical to the PCI selector
strings supported by pciconf).
- To make it easier to cut and paste, change the PnP location string
in the PCI bus driver to output a full PCI selector string rather
than 'slot=<slot> function=<func>'.
- Add a devctl(3) interface in libdevctl which provides a wrapper around
the ioctls and is the preferred interface for other userland code.
- Add a devctl(8) program which is a simple wrapper around the requests
supported by devctl(3).
- Add a device_is_suspended() function to check DF_SUSPENDED.
- Add a resource_unset_value() function that can be used to remove a
hint from the kernel environment. This is used to clear a
hint.<driver>.<unit>.disabled hint when re-enabling a boot-time
disabled device.
Reviewed by: imp (parts)
Requested by: imp (changing PCI location string)
Relnotes: yes
|
| 277710 |
25-Jan-2015 |
jhb |
Pass a valid Dx state variable to PCIB_POWER_FOR_SLEEP() in pcib_resume()
instead of NULL.
Submitted by: dchagin
MFC after: 2 weeks
|
| 276299 |
27-Dec-2014 |
marius |
- Make PCI_QUIRK_MSI_INTX_BUG work by using the ID of the actual PCI device
for the lookup.
- For devices affected by PCI_QUIRK_MSI_INTX_BUG, ensure PCIM_CMD_INTxDIS
is cleared when using MSI/MSI-X.
- Employ PCI_QUIRK_MSI_INTX_BUG for BCM5714(S)/BCM5715(S)/BCM5780(S) rather
than clearing PCIM_CMD_INTxDIS unconditionally for all devices in bge(4).
MFC after: 3 days
|
| 274707 |
19-Nov-2014 |
dchagin |
Revert r274635 as it's completely wrong.
The parent of a pci dev device is a pciX device which do not
implement the PCIB_POWER_FOR_SLEEP method from pcib_if.m.
|
| 274635 |
17-Nov-2014 |
dchagin |
Use the correct device as the power_for_sleep() method
always pass request up to parent bridge.
Reviewed by: jhb
MFC after: 1 week
xMFC: r274386,r274397
|
| 274386 |
11-Nov-2014 |
adrian |
Use the correct device (child) when asking the bus layer about which power
state said device should go into.
This was a snafu introduced in the ACPI/PCI awareness separation.
When putting a device into a power state, the bus (and thus firmware,
eg ACPI) should be asked before hand to check whether the device
can indeed go into that power state.
There's a set of nodes in ACPI under each device - the _SxD nodes - which
state which ACPI power state to put the device into when the system is
going into power save state 'x'. So when going into S3, the existence
of an _S3D node would override whatever the system was trying to do.
By default the PCI code wants to put devices into D3 before suspending.
I have a laptop here (Asus Zenbook - check the PR) whose EHCI controller
really wants to be in D2 during suspend, not D3. So if we put it into
D3 and then try to enter S3, everything hangs. The device itself
can go into D3 - it just can't be there when the call to ACPI to enter
S3 occurs. The PCI patch fixes this.
jkim@ noticed that the same is needed for the ACPI child device
enumeration.
Thankyou to Matt Dillon (the programmer, not the actor) for buying me
this particular laptop so I could debug the issues with the Atheros
AR9485 that is in it. It's his fault that I ended up with this
laptop and was sufficiently annoyed by the lack of USB suspend
to go down this rabbit hole.
Tested:
* Thinkpad T400
* Thinkpad X230
* Thinkpad T42
* Thinkpad T60
* Asus Zenbook (see PR)
* Asus EEEPC 701
* Asus EEEPC 1001PX
TODO:
* Figure out what we should do about devices we unload drivers for
that want to be in a specific state when entering S3 / S4 -
the "put devices into D3 if they're not bound to a driver" option
may also mess with things.
PR: kern/194884
Reviewed by: jhb, jkim
MFC after: 1 week
Relnotes: yes
Sponsored by: Matt Dillon <dillon@apollo.backplane.com> (hardware)
|
| 273174 |
16-Oct-2014 |
davide |
Follow up to r225617. In order to maximize the re-usability of kernel code
in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv().
This fixes a namespace collision with libc symbols.
Submitted by: kmacy
Tested by: make universe
|
| 272799 |
09-Oct-2014 |
adrian |
Add a bus method to fetch the VM domain for the given device/bus.
* Add a bus_if.m method - get_domain() - returning the VM domain or
ENOENT if the device isn't in a VM domain;
* Add bus methods to print out the domain of the device if appropriate;
* Add code in srat.c to save the PXM -> VM domain mapping that's done and
expose a function to translate VM domain -> PXM;
* Add ACPI and ACPI PCI methods to check if the bus has a _PXM attribute
and if so map it to the VM domain;
* (.. yes, this works recursively.)
* Have the pci bus glue print out the device VM domain if present.
Note: this is just the plumbing to start enumerating information -
it doesn't at all modify behaviour.
Differential Revision: D906
Reviewed by: jhb
Sponsored by: Norse Corp
|
| 272732 |
08-Oct-2014 |
yongari |
Oops, fix typo made in r272729.
|
| 272729 |
08-Oct-2014 |
yongari |
Add new quirk PCI_QUIRK_MSI_INTX_BUG to pci(4).
QAC AR816x/E2200 controller has a silicon bug that MSI interrupt
does not assert if PCIM_CMD_INTxDIS bit of command register is set.
Reviewed by: jhb
|
| 272013 |
23-Sep-2014 |
jhibbits |
Stage one of multipass suspend/resume
Summary:
Add the beginnings of multipass suspend/resume, by introducing
BUS_SUSPEND_CHILD/BUS_RESUME_CHILD, and move the PCI driver to this.
Reviewers: jhb
Reviewed By: jhb
Differential Revision: https://reviews.freebsd.org/D590
|
| 270332 |
22-Aug-2014 |
royger |
pci: add a new pci_child_added newbus method.
This is needed so when running under Xen the calls to pci_child_added
can be intercepted and a custom Xen method can be used to register
those devices with Xen. This should not include any functional
change, since the Xen implementation will be added in a following
patch and the native implementation is a noop.
Sponsored by: Citrix Systems R&D
Reviewed by: jhb
dev/pci/pci.c:
dev/pci/pci_if.m:
dev/pci/pci_private.h:
dev/pci/pcivar.h:
- Add the pci_child_added newbus method.
|
| 270212 |
20-Aug-2014 |
royger |
pci: make MSI(-X) enable and disable methods of the PCI bus
Make the functions pci_disable_msi, pci_enable_msi and pci_enable_msix
methods of the newbus PCI bus. This code should not include any
functional change.
Sponsored by: Citrix Systems R&D
Reviewed by: imp, jhb
Differential Revision: https://reviews.freebsd.org/D354
dev/pci/pci.c:
- Convert the mentioned functions to newbus methods.
- Fix the callers of the converted functions.
sys/dev/pci/pci_private.h:
dev/pci/pci_if.m:
- Declare the new methods.
dev/pci/pcivar.h:
- Add helpers to call the newbus methods.
ofed/include/linux/pci.h:
- Add define to prevent the ofed version of pci_enable_msix from
clashing with the FreeBSD native version.
|
| 268351 |
07-Jul-2014 |
marcel |
Remove ia64.
This includes:
o All directories named *ia64*
o All files named *ia64*
o All ia64-specific code guarded by __ia64__
o All ia64-specific makefile logic
o Mention of ia64 in comments and documentation
This excludes:
o Everything under contrib/
o Everything under crypto/
o sys/xen/interface
o sys/sys/elf_common.h
Discussed at: BSDcan
|
| 267992 |
28-Jun-2014 |
hselasky |
Pull in r267961 and r267973 again. Fix for issues reported will follow.
|
| 267985 |
27-Jun-2014 |
gjb |
Revert r267961, r267973:
These changes prevent sysctl(8) from returning proper output,
such as:
1) no output from sysctl(8)
2) erroneously returning ENOMEM with tools like truss(1)
or uname(1)
truss: can not get etype: Cannot allocate memory
|
| 267961 |
27-Jun-2014 |
hselasky |
Extend the meaning of the CTLFLAG_TUN flag to automatically check if
there is an environment variable which shall initialize the SYSCTL
during early boot. This works for all SYSCTL types both statically and
dynamically created ones, except for the SYSCTL NODE type and SYSCTLs
which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to
be used in the case a tunable sysctl has a custom initialisation
function allowing the sysctl to still be marked as a tunable. The
kernel SYSCTL API is mostly the same, with a few exceptions for some
special operations like iterating childrens of a static/extern SYSCTL
node. This operation should probably be made into a factored out
common macro, hence some device drivers use this. The reason for
changing the SYSCTL API was the need for a SYSCTL parent OID pointer
and not only the SYSCTL parent OID list pointer in order to quickly
generate the sysctl path. The motivation behind this patch is to avoid
parameter loading cludges inside the OFED driver subsystem. Instead of
adding special code to the OFED driver subsystem to post-load tunables
into dynamically created sysctls, we generalize this in the kernel.
Other changes:
- Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask"
to "hw.pcic.intr_mask".
- Removed redundant TUNABLE statements throughout the kernel.
- Some minor code rewrites in connection to removing not needed
TUNABLE statements.
- Added a missing SYSCTL_DECL().
- Wrapped two very long lines.
- Avoid malloc()/free() inside sysctl string handling, in case it is
called to initialize a sysctl from a tunable, hence malloc()/free() is
not ready when sysctls from the sysctl dataset are registered.
- Bumped FreeBSD version to indicate SYSCTL API change.
MFC after: 2 weeks
Sponsored by: Mellanox Technologies
|
| 266468 |
20-May-2014 |
mav |
Add IOMMU PCI subclass, found on Tyan S8236 motherboard.
Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after: 2 weeks
|
| 265149 |
30-Apr-2014 |
smh |
Make uninteresting PCI devices with no attached drivers only print out
on a verbose boot
MFC after: 2 weeks
|
| 265107 |
29-Apr-2014 |
rstone |
Be consistent with the whitespace in the rest of these files.
X-MFC-With: r264007
|
| 264091 |
03-Apr-2014 |
rstone |
Correct a PCI enumeration bug introduced in r264011
Ensure that first_func is set to 0 on every iteration of the PCI slot
enumeration loop after the first. There is a continue statement that would
cause first_func to stay at 1 any PCI device where slot 0 has no functions
until we find a slot that does have a function. This would cause us to
not enumerate the first PCI function on the device.
Credit to markj@ for spotting the bug.
X-MFC-With: r264011
|
| 264013 |
01-Apr-2014 |
rstone |
Add missing copyright date.
MFC after: 2 months
|
| 264011 |
01-Apr-2014 |
rstone |
Add support for PCIe ARI
PCIe Alternate RID Interpretation (ARI) is an optional feature that
allows devices to have up to 256 different functions. It is
implemented by always setting the PCI slot number to 0 and
re-purposing the 5 bits used to encode the slot number to instead
contain the function number. Combined with the original 3 bits
allocated for the function number, this allows for 256 functions.
This is enabled by default, but it's expected to be a no-op on currently
supported hardware. It's a prerequisite for supporting PCI SR-IOV, and
I want the ARI support to go in early to help shake out any bugs in it.
ARI can be disabled by setting the tunable hw.pci.enable_ari=0.
Reviewed by: kib
MFC after: 2 months
Sponsored by: Sandvine Inc.
|
| 264007 |
01-Apr-2014 |
rstone |
Add a method to get the PCI RID for a device.
Reviewed by: kib
MFC after: 2 months
Sponsored by: Sandvine Inc.
|
| 264006 |
01-Apr-2014 |
rstone |
Revert PCI RID changes.
My PCI RID changes somehow got intermixed with my PCI ARI patch when I
committed it. I may have accidentally applied a patch to a non-clean
working tree. Revert everything while I figure out what went wrong.
Pointy hat to: rstone
|
| 264001 |
01-Apr-2014 |
rstone |
Add a method to get the PCI Routing ID for a device
Reviewed by: kib
Sponsored by: Sandvine, Inc
|
| 261790 |
12-Feb-2014 |
jhb |
Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge
I/O windows, the default is to preserve the firmware-assigned resources.
PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture
defines a PCI_RES_BUS resource type.
- Add a helper API to create top-level PCI bus resource managers for each
PCI domain/segment. Host-PCI bridge drivers use this API to allocate
bus numbers from their associated domain.
- Change the PCI bus and CardBus drivers to allocate a bus resource for
their bus number from the parent PCI bridge device.
- Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the
full range of bus numbers from secbus to subbus from their parent bridge.
The drivers also always program their primary bus register. The bridge
drivers also support growing their bus range by extending the bus resource
and updating subbus to match the larger range.
- Add support for managing PCI bus resources to the Host-PCI bridge drivers
used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib).
- Define a PCI_RES_BUS resource type for amd64 and i386.
Reviewed by: imp
MFC after: 1 month
|
| 261527 |
05-Feb-2014 |
jhb |
Add two tunables to ignore certain firmware-assigned resources. These
are mostly useful for debugging.
- hw.pci.clear_bars ignores all firmware-assigned ranges for BARs when
set.
- hw.pci.clear_pcib ignores all firmware-assigned ranges for PCI-PCI
bridge I/O windows when set.
MFC after: 1 week
|
| 261526 |
05-Feb-2014 |
jhb |
Simplify pci_reserve_map() by calling resource_list_reserve() to allocate
the resource after creating a resource list entry rather than reimplementing
it by hand.
MFC after: 1 week
|
| 261524 |
05-Feb-2014 |
jhb |
Properly set the alignment flags when allocating the initial range for a
BAR. This only really matters when pci_do_realloc_bars is enabled and
the initial allocation of a specific range fails.
MFC after: 1 week
|
| 261523 |
05-Feb-2014 |
jhb |
Fix a typo.
|
| 261520 |
05-Feb-2014 |
jhb |
Drop the 3rd clause from all 3 clause BSD licenses where I am the sole
holder to convert them to 2 clause BSD licenses.
MFC after: 1 week
|
| 260926 |
20-Jan-2014 |
jhb |
Add support for displaying VPD for PCI devices via pciconf.
- Store the length of each read-only VPD value since not all values are
guaranteed to be ASCII values (though most are).
- Add a new pciio ioctl to fetch VPD for a single PCI device. The values
are returned as a list of variable length records, one for the device
name and each keyword.
- Add a new -V flag to pciconf's list mode which displays VPD data for
each device.
MFC after: 1 week
|
| 259679 |
21-Dec-2013 |
dumbbell |
vga_pci: Improve boot display detection
The previous code was checking the "VGA Enable" bit on the video card's
parent PCI-to-PCI bridge only. This didn't work for the case where the
video card is attached to the root PCI bus (ie. the card has no parent
PCI-to-PCI bridge).
Now, the new code:
1. checks the "VGA Enable" bit on the parent bridge only if it's a
PCI-to-PCI bridge;
2. always checks the "I/O" and "Memory address space decoding" bits
on the video card itself.
However, vendor-specific bits are not used.
This fixes the use of many integrated Radeon cards: without this patch,
we fail to detect them as the boot display and, when radeonkms looks for
the Video BIOS, it skips the shadow copy made by the System BIOS. It
then fails to fully initialize the card, because the shadow copy is the
only way to read the Video BIOS in these situations. A workaround was to
force the boot display selection using the "hw.pci.default_vgapci_unit"
tunable.
A previous version of this patch added a new function doing the checks.
Now, the vga_pci_is_boot_display() function is used to perform the
checks (only until the boot display is found) and return if the given
device is the boot display or not.
Furthermore, vga_pci_attach() logs "Boot video device" if the card being
attached it the Chosen One:
vgapci0: <VGA-compatible display> [...]
vgapci0: Boot video device
Reviewed by: kib@, jhb@ (both a previous version)
Tested by: lunatic_ (#freebsd-xorg, integrated Radeon card,
xmj (#freebsd-xorg, i915+NVIDIA cards)
|
| 257072 |
24-Oct-2013 |
kib |
Make pci_get_dma_tag() non-static. Since the function is only
referenced by pointer, making it non-static should not have even the
negligible impact on the existing code.
Reviewed by: jhb
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
|
| 257071 |
24-Oct-2013 |
kib |
Add some definitions for the bits in root control and status PCIe cap
registers.
Reviewed by: jhb
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
|
| 257070 |
24-Oct-2013 |
kib |
Move the PCI_DMA_BOUNDARY definition into the pcivar.h.
Reviewed by: jhb
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
|
| 255571 |
14-Sep-2013 |
dumbbell |
vgapci: Use vga_pci_alloc_resource() to map PCI Expansion ROM
This is cleaner and fixes Video BIOS mapping when the given device isn't
the boot display.
Submitted by: jhb@
Approved by: re (kib)
|
| 254883 |
25-Aug-2013 |
dumbbell |
vga_pci: Remove left-over debugging printf()'s
|
| 254882 |
25-Aug-2013 |
dumbbell |
vga_pci: Add API to map the Video BIOS
Here are two new functions to map and unmap the Video BIOS:
void * vga_pci_map_bios(device_t dev, size_t *size);
void vga_pci_unmap_bios(device_t dev, void *bios);
The BIOS is either taken from the shadow copy made by the System BIOS at
boot time if the given device was used for the default display (i386,
amd64 and ia64 only), or from the PCI expansion ROM.
Additionally, one can determine if a given device was the default
display at boot time using the following new function:
void vga_pci_unmap_bios(device_t dev, void *bios);
|
| 254207 |
11-Aug-2013 |
rpaulo |
Use device_printf().
|
| 253450 |
18-Jul-2013 |
jhb |
Properly handle I/O windows in bridges with the ISA enable bit set. These
beasts still exist unfortunately. More details can be found in other
references, but the short version is that bridges with this bit set ignore
I/O port ranges that alias to valid ISA I/O port ranges. In the driver
this requires not allocating these alias regions from the parent device
(so they are free to be acquired by ISA devices), and ensuring no child
devices use resources from these alias regions.
- Change the pcib_window structure to allow for an array of backing
resources rather than a single resource and update the existing code
to cope with this. Some of the coping requires using the saved
base and limit values in pcib_window instead of using rman operations
on the backing resource.
- Add special handling for allocating and adjusting the I/O port window
of an ISA-enabled bridge to only allocate the non-alias ranges and
add those to the associated resource manager.
- Reject I/O port allocations for a fixed request that conflicts with an
ISA alias range.
- Remove the "no prefected decode" verbose printf during boot. The absence
of a "prefetched decode" line is sufficient.
- Replace the "subtractively decoded bridge" verbose printf with a single
printf that lists all the "special" decoding modes of a bridge: ISA,
subtractive, and VGA.
- Add a custom bus_release_resource() method to the PCI bus driver so that
it can properly free resources for I/O windows of PCI-PCI bridges.
(These resources are not stored in the bridge device's resource list.)
PR: misc/179033
MFC after: 2 weeks
|
| 253120 |
09-Jul-2013 |
marius |
- As it turns out, not only MSI-X is broken for devices passed through by
VMware up to at least ESXi 5.1. Actually, using INTx in that case instead
may still result in interrupt storms, with MSI being the only working
option in some configurations. So introduce a PCI_QUIRK_DISABLE_MSIX quirk
which only blacklists MSI-X but not also MSI and use it for the VMware
PCI-PCI-bridges. Note that, currently, we still assume that if MSI doesn't
work, MSI-X won't work either - but that's part of the internal logic and
not guaranteed as part of the API contract. While at it, add and employ
a pci_has_quirk() helper.
Reported and tested by: Paul Bucher
- Use NULL instead of 0 for pointers.
Submitted by: jhb (mostly)
Approved by: jhb
MFC after: 3 days
|
| 252315 |
27-Jun-2013 |
jhb |
Make detaching drivers from PCI devices more robust. While here, fix a
bug where a PCI device would be powered down if it failed to probe, but
not when its driver was detached (e.g. via kldunload).
- Add a new helper method resource_list_release_active() which forcefully
releases any active resources of a specified type from a resource list.
- Add a bus_child_detached method for the PCI bus driver which forces any
active resources to be released (and whines to the console if it finds
any) and then powers the device down.
- Call pci_child_detached() if we fail to probe a device when a driver
is kldloaded. This isn't perfect but can avoid leaking resources
from a probe() routine in the kldload case.
Reviewed by: imp, brooks
MFC after: 1 month
|
| 252166 |
24-Jun-2013 |
jhb |
Disable hw.pci.realloc_bars by default. It wasn't needed for the original
tester of this fix, and realloc_bars breaks some other cases as a small
BAR that is reallocated can end up grabbing space needed by a much larger
BAR in the existing window of a PCI-PCI bridge.
MFC after: 3 days
|
| 250740 |
17-May-2013 |
kib |
Add new capability types encodings from HyperTransport I/O Link
Specification revisions 3.00 and 3.10.
Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after: 1 week
|
| 250418 |
09-May-2013 |
jhb |
Revision 233677 broke certain machines. Specifically, if the firmware/BIOS
assigned conflicting ranges to BARs then leaving the BARs alone could
result in one device stealing mmio accesses intended to go to a second
device. Prior to 233677 the PCI bus driver attempted to handle this case
by clearing the BAR to 0 depending on BARs based at 0 not decoding (which
is not guaranteed to be true). Now when a conflicting BAR is detected the
following steps are taken:
1) If hw.pci.realloc_bars (a new tunable) is enabled (default is enabled),
then ignore the current BAR setting from the firmware and attempt to
allocate a fresh resource range for the BAR.
2) If 1) failed (or was disabled), disable decoding for the relevant
BAR type (e.g. disable mem decoding for a memory BAR) and emit a
warning if booting verbose.
Tested by: Alex Keda <admin@lissyara.su>
MFC after: 1 week
|
| 249476 |
14-Apr-2013 |
kib |
Usnure that PCI bus BIS_GET_DMA_TAG() method sees the actual PCI
device which makes the request for dma tag, instead of some descendant
of the PCI device, by creating a pass-through trampoline for vga_pci
and ata_pci buses.
Sponsored by: The FreeBSD Foundation
Suggested by: jhb
Discussed with: jhb, mav
MFC after: 1 week
|
| 249315 |
09-Apr-2013 |
jhb |
Proxy allocation requests for the PCI ROM BAR from child devices similar
to how the VGA bus driver currently proxies allocation requests for other
PCI BARs.
MFC after: 1 week
|
| 247632 |
02-Mar-2013 |
marius |
- Complete r231621 by also blacklisting the bridge used by VMware for PCIe
devices. While at it, update the comment now that we know that MSI-X
doesn't work with ESXi 5.1 for Intel 82576 either and the underlying issue
is a bug in the MSI-X allocation code of the hypervisor.
Reported by: Harald Schmalzbauer
- Make the nomatch table const.
MFC after: 1 week
|
| 247438 |
28-Feb-2013 |
neel |
Remove the quirk to allow use of MSI when the guest is running inside bhyve.
This became redundant after the hostbridge presented to the guest started
advertising the PCI-E capability (r246846).
Obtained from: NetApp
|
| 245065 |
05-Jan-2013 |
neel |
Add quirk to indicate that the bhyve hostbridge is capable of supporting
MSI and MSI-X even though it does not advertise the PCI-E capability
itself.
Obtained from: NetApp
|
| 244695 |
26-Dec-2012 |
davidxu |
Always initialize pattern_buf pointers to NULL, otherwise AMD64 machine
panics with:
free: address xxx(yyy) has not been allocated.
it can be triggered by hald.
|
| 242625 |
05-Nov-2012 |
dim |
Remove duplicate const specifiers in many drivers (I hope I got all of
them, please let me know if not). Most of these are of the form:
static const struct bzzt_type {
[...list of members...]
} const bzzt_devs[] = {
[...list of initializers...]
};
The second const is unnecessary, as arrays cannot be modified anyway,
and if the elements are const, the whole thing is const automatically
(e.g. it is placed in .rodata).
I have verified this does not change the binary output of a full kernel
build (except for build timestamps embedded in the object files).
Reviewed by: yongari, marius
MFC after: 1 week
|
| 241758 |
19-Oct-2012 |
imp |
Add missing Extended Capability ID Numbers from PCIe 3.0.
|
| 240992 |
27-Sep-2012 |
glebius |
Fix zillions of style(9) and spacing bugs introduced by r240981.
Pointy hat to: sobomax
|
| 240990 |
27-Sep-2012 |
glebius |
Fix several build failures for !COMPAT_FREEBSD32 and
!COMPAT_FREEBSD* kernels introduced by r240981.
Pointy hat to: sobomax
|
| 240981 |
27-Sep-2012 |
sobomax |
Add 32-bit ABI compat shims. Those are necessary for i386 binary-only
tools like sysutils/hpacucli (HP P4xx RAID controller management
suite) working on amd64 systems.
PR: 139271
Submitted by: Kazumi MORINAGA, Eugene Grosbein
MFC after: 1 week
|
| 240739 |
20-Sep-2012 |
gavin |
The correct generic term for PCIS_STORAGE_NVM is "NVM" not "NVM Express".
Submitted by: jimharris
MFC after: 6 days
|
| 240699 |
19-Sep-2012 |
gavin |
Recognise NVM Express devices and pretty-print their name.
MFC after: 1 week
|
| 240695 |
19-Sep-2012 |
jimharris |
Add constants for programming interfaces for NVM/solid state storage
controller sub-class code.
Reference: PCI Code and ID Assignment Specification Rev 1.2
Sponsored by: Intel
Inspired by: gavin
MFC after: 1 week
X-MFC-With: r240694
|
| 240694 |
19-Sep-2012 |
gavin |
Add PCI subclass for NVM Express devices.
Reference:
http://www.nvmexpress.org/index.php/download_file/view/42/1/NVM_Express_1_0b.pdf
section 2.1.5.
MFC after: 1 week
|
| 240680 |
18-Sep-2012 |
gavin |
Align the PCI Express #defines with the style used for the PCI-X
#defines. This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.
This is a mostly mechanical rename:
s/PCIR_EXPRESS_/PCIER_/g
s/PCIM_EXP_/PCIEM_/g
s/PCIM_LINK_/PCIEM_LINK_/g
When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.
Discussed with: jhb
MFC after: 1 week
|
| 240602 |
17-Sep-2012 |
gavin |
- Add #defines for the bits within the iPCI Express PCIR_EXPRESS_LINK_CTL
register
- Add missing register PCIR_EXPRESS_ROOT_CAP
- Correct a spelling mistake (SLAT -> SLOT) [1]
Reviewed by: jhb [1]
|
| 240473 |
13-Sep-2012 |
jhb |
- Add some registers defined in PCI 3.0 including new AER bits.
- Add constants for the rest of the fields in the PCI-express device
capability and control registers.
- Tweak some of the recently added PCI-e capability constants (always
use hex for offsets in config space, and include a shortened
version of the relevant register in the name of field constants).
MFC after: 1 week
|
| 240150 |
05-Sep-2012 |
gavin |
Add #defines for the bits in the PCI Express SLOT registers. Names
have been chosen based on the bit names in the PCI Express Base
Specification 3.0, and to match the predominant style of the existing
bit definitions.
MFC after: 1 week
|
| 239103 |
06-Aug-2012 |
jhb |
Explicitly enable busmastering on PCI-PCI bridges. Transactions initiated
on the secondary side of a bridge will not be propagated to the primary
bus unless this is enabled. Busmastering is not enabled by default (we
have relied on firmware to set this bit to date). The OS needs to set it
for any bridges not configured by system firmware.
Tested by: Steve Polyack korvus comcast net
MFC after: 2 weeks
|
| 237673 |
27-Jun-2012 |
marius |
For subtractively decoding bridges, don't try to grow windows but pass
the request up the tree in order to be on the safe side. Growing windows
in this case would mean to switch resources to positive decoding and
it's unclear how to correctly handle this. At least with ALi/ULi M5249
PCI-PCI bridges, this also just doesn't work out of the box.
Reviewed by: jhb
MFC after: 3 days
|
| 237272 |
19-Jun-2012 |
jhb |
Add a 'wmask' variable to hold the expression '(1ul << w->step) - 1' in
pcib_grow_window(). This makes the code slightly easier to read and
prevents the type of bug fixed in r237271.
MFC after: 3 days
|
| 237271 |
19-Jun-2012 |
jhb |
Fix another off-by-one error in the previous fix so that the new start
address is properly aligned. While here, use a simpler expression to
align the new end address that we use elsewhere for aligning the end.
|
| 237008 |
13-Jun-2012 |
jhb |
Fix a couple of bugs that prevented windows in PCI-PCI bridges from
growing "downward" (moving the start address down). First, an off by
one error caused the end address to be moved down an extra alignment
chunk unnecessarily. Second, when aligning the new candidate starting
address, the wrong bits were masked off.
Tested by: Andrey Zonov andrey zonov org
MFC after: 3 days
|
| 235846 |
23-May-2012 |
kib |
Add 'drmn' device as another drm child, to allow drm2 drivers to live
in parallel with drm1.
Sponsored by: The FreeBSD Foundation
MFC after: 1 month
|
| 235833 |
23-May-2012 |
jhb |
Only check to see if a memory resource is a PCI ROM BAR when activating
and deactivating PCI resources. Previously, if a device had more than
48 MSI interrupts, then activating message 48 (which has a rid == PCIR_BIOS)
would incorrectly try to enable the PCI ROM BAR.
Tested by: Olivier Cinquin ocinquin uci edu
MFC after: 3 days
|
| 233678 |
29-Mar-2012 |
jkim |
Fix couple of style nits.
|
| 233677 |
29-Mar-2012 |
jkim |
Revert r233662 and generalize the hack. Writing zero to BAR actually does
not disable it and it is even harmful as hselasky found out. Historically,
this code was originated from (OLDCARD) CardBus driver and later leaked into
PCI driver when CardBus was newbus'ified and refactored with PCI driver.
However, it is not really necessary even for CardBus.
Reviewed by: hselasky, imp, jhb
|
| 233676 |
29-Mar-2012 |
jhb |
Use a more proper fix for enabling HT MSI mapping windows on Host-PCI
bridges. Rather than blindly enabling the windows on all of them, only
enable the window when an MSI interrupt is enabled for a device behind
the bridge, similar to what already happens for HT PCI-PCI bridges.
To implement this, each x86 Host-PCI bridge driver has to be able to
locate it's actual backing device on bus 0. For ACPI, use the _ADR
method to find the slot and function of the device. For the non-ACPI
case, the legacy(4) driver already scans bus 0 looking for Host-PCI
bridge devices. Now it saves the slot and function of each bridge that
it finds as ivars that the Host-PCI bridge driver can then use in its
pcib_map_msi() method.
This fixes machines where non-MSI interrupts were broken by the previous
round of HT MSI changes.
Tested by: bapt
MFC after: 1 week
|
| 233662 |
29-Mar-2012 |
hselasky |
Fix for boot issue: Don't disable BARs on AGP devices. In general:
Don't disable BARs on any PCI display devices, because doing that can
sometimes cause the main memory bus to stop working, causing all
memory reads to return nothing but 0xFFFFFFFF, even though the memory
location was previously written. After a while a privileged
instruction fault will appear and then nothing more can be debugged.
The reason for this behaviour is unknown.
MFC after: 1 week
|
| 232991 |
14-Mar-2012 |
jkim |
Add a PCI quirk to ignore PCI map registers from configuration space.
For example, some BIOS for AMD SB600 south bridge may map HPET MMIO base
address as a memory BAR for SMBus controller depending on a PM register
configuration. Before r231161 (and r232086, subsequent MFC to stable/9),
it was not fatal but hpet(4) just failed to attach. Since we probe and
attach HPET earlier than PCI devices now, it caused unfortunate hard lockup.
With this patch, it does not hang any more and HPET works at the same time.
Clean up some style nits while I am in the neighborhood.
PR: kern/165647
Reviewed by: jhb
MFC after: 3 days
|
| 232704 |
08-Mar-2012 |
kan |
Save more of config space for PCI Express and PCI-X devices.
Expand pci_save_state and pci_restore_state to save more of
the config state for PCI Express and PCI-X devices. Various
writable control registers are present in PCI Express that
can potentially be lost over suspend/resume cycle.
This change is modeled after similar functionality in Linux.
Reviewed by: wlosh,jhb
MFC after: 1 month
|
| 232670 |
07-Mar-2012 |
jhb |
Remove the PAE-specific 2GB DMA boundary since HEAD now supports a proper 4G
boundary for PAE.
|
| 232667 |
07-Mar-2012 |
jhb |
Simplify the PCI bus dma tag code a bit. First, don't create a tag at
all for platforms that only have 32-bit bus addresses. Second, remove
the 'tag_valid' flag from the softc. Instead, if we don't create a
tag in pci_attach_common(), just cache the value of our parent's tag
so that we always have a valid tag to return.
|
| 232472 |
03-Mar-2012 |
jhb |
Expand the set of APIs available for locating PCI capabilities:
- pci_find_extcap() is repurposed to be used for fetching PCI-express
extended capabilities (PCIZ_* constants in <dev/pci/pcireg.h>).
- pci_find_htcap() can be used to locate a specific HyperTransport
capability (PCIM_HTCAP_* constants in <dev/pci/pcireg.h>).
- Cache the starting location of the PCI-express capability for PCI-express
devices in PCI device ivars.
|
| 232465 |
03-Mar-2012 |
jhb |
Update the pci_get_vpd_readonly() wrapper to use 'vptr' instead of
'identptr' for its last parameter to match the default implementation
as well as the method definition in pci_if.m.
|
| 232464 |
03-Mar-2012 |
jhb |
Fix a typo.
|
| 232403 |
02-Mar-2012 |
jhb |
- Add a bus_dma tag to each PCI bus that is a child of a Host-PCI bridge.
The tag enforces a single restriction that all DMA transactions must not
cross a 4GB boundary. Note that while this restriction technically only
applies to PCI-express, this change applies it to all PCI devices as it
is simpler to implement that way and errs on the side of caution.
- Add a softc structure for PCI bus devices to hold the bus_dma tag and
a new pci_attach_common() routine that performs actions common to the
attach phase of all PCI bus drivers. Right now this only consists of
a bootverbose printf and the allocate of a bus_dma tag if necessary.
- Adjust all PCI bus drivers to allocate a PCI bus softc and to call
pci_attach_common() from their attach routines.
MFC after: 2 weeks
|
| 232360 |
01-Mar-2012 |
jhb |
Add pci_save_state() and pci_restore_state() wrappers around
pci_cfg_save() and pci_cfg_restore() for device drivers to use when
saving and restoring state (e.g. to handle device-specific resets).
Reviewed by: imp
MFC after: 2 weeks
|
| 232318 |
29-Feb-2012 |
jhb |
Use pci_printf() instead of a home-rolled version in the VPD parsing code.
|
| 231621 |
14-Feb-2012 |
marius |
- As it turns out, MSI-X is broken for at least LSI SAS1068E when passed
through by VMware so blacklist their PCI-PCI bridge for MSI/MSI-X here.
Note that besides currently there not being a quirk type that disables
MSI-X only and there's no evidence that MSI doesn't work with the VMware
pass-through, it's really questionable whether MSI generally works in
that setup as VMware only mention three know working devices [1, p. 4].
Also not that this quirk entry currently doesn't affect the devices
emulated by VMware in any way as these don't claim support MSI/MSI-X to
begin with. [2]
While at it, make the PCI quirk table const and static.
- Remove some duplicated empty lines.
- Use DEVMETHOD_END.
PR: 163812, http://forums.freebsd.org/showthread.php?t=27899 [2]
Reviewed by: jhb
MFC after: 3 days
|
| 230822 |
31-Jan-2012 |
jhb |
Fix a spelling mistake in the surprise link down error constant.
Submitted by: glebius
|
| 230774 |
30-Jan-2012 |
jhb |
Add a constant for the PCI-e surprise link down uncorrectable error.
|
| 230340 |
19-Jan-2012 |
jhb |
Properly return success once a matching VPD entry is found in
pci_get_vpd_readonly_method(). Previously the loop was always running
to completion and falling through to failing with ENXIO.
PR: kern/164313
Submitted by: Chuck Tuffli chuck tuffli net
MFC after: 1 week
|
| 228496 |
14-Dec-2011 |
jhb |
Implement BUS_ADD_CHILD() for the isab(4) driver. It already calls
bus_generic_probe() and bus_generic_attach() to handle drivers that add
new children via identify methods.
MFC after: 1 week
|
| 228161 |
30-Nov-2011 |
jhb |
Add a constant for the Advisory Non-Fatal Error bit in AER corrected error
status and mask.
|
| 227843 |
22-Nov-2011 |
marius |
- There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
(bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
since r52045) but even recently added device drivers do this unnecessarily.
Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
Discussed with: jhb
- Also while at it, use __FBSDID.
|
| 224269 |
22-Jul-2011 |
hselasky |
Add missing XHCI early takeover code. The XHCI takeover code
is supposed to disable the BIOS from using the XHCI controller
after bootup.
Approved by: re (kib)
Reported by: Mike Tancsa
MFC after: 1 week
|
| 224069 |
15-Jul-2011 |
jhb |
Respect the BIOS/firmware's notion of acceptable address ranges for PCI
resource allocation on x86 platforms:
- Add a new helper API that Host-PCI bridge drivers can use to restrict
resource allocation requests to a set of address ranges for different
resource types.
- For the ACPI Host-PCI bridge driver, use Producer address range resources
in _CRS to enumerate valid address ranges for a given Host-PCI bridge.
This can be disabled by including "hostres" in the debug.acpi.disabled
tunable.
- For the MPTable Host-PCI bridge driver, use entries in the extended
MPTable to determine the valid address ranges for a given Host-PCI
bridge. This required adding code to parse extended table entries.
Similar to the new PCI-PCI bridge driver, these changes are only enabled
if the NEW_PCIB kernel option is enabled (which is enabled by default on
amd64 and i386).
Approved by: re (kib)
|
| 223984 |
13-Jul-2011 |
marius |
PCIB_ALLOC_MSIX() may already fail on the first pass, f.e. when the PCI-PCI
bridge is blacklisted. In that case just return from pci_alloc_msix_method(),
otherwise we continue without a single MSI-X resource, causing subsequent
attempts to use the seemingly available resource to fail or when booting
verbose a NULL-pointer dereference of rle->start when trying to print the
IRQ in pci_alloc_msix_method().
Reviewed by: jhb
MFC after: 1 week
|
| 223952 |
12-Jul-2011 |
jhb |
Properly align the end of a candidate back region based on the window's
granularity when growing a PCI-PCI window up.
Tested by: dougb
MFC after: 3 days
|
| 223885 |
09-Jul-2011 |
kib |
Implement pci_find_class(9), the function to find a pci device by its class.
Sponsored by: The FreeBSD Foundation
Reviewed by: jhb
MFC after: 1 week
|
| 223520 |
24-Jun-2011 |
jhb |
Split out host_pcib_get_busno() from the generic PCI-PCI bridge driver to
start a new file that will hold utility APIs used by various Host-PCI
bridge drivers and drivers that provide PCI domains.
|
| 223371 |
21-Jun-2011 |
jhb |
Minor whitespace and style fixes.
|
| 222930 |
10-Jun-2011 |
jhb |
Fix some off-by-one errors with the ending address of candidate regions
when attempting to grow a window.
|
| 222753 |
06-Jun-2011 |
jhb |
More properly handle Cardbus cards that that store their CIS in a BAR after
the recent changes to track BAR state explicitly. The code would now
attempt to add the same BAR twice in this case. Instead, change this so
that it recognizes this case and only adds it once and do not delete the
BAR outright after parsing the CIS.
Tested by: bschmidt
|
| 222018 |
17-May-2011 |
ru |
Renamed PCI_INTERFACE_XHCI to PCIP_SERIALBUS_USB_XHCI and moved it
to <dev/pci/pcireg.h>.
Reviewed by: hselasky
MFC after: 3 days
|
| 221839 |
13-May-2011 |
brix |
Allow direct children of PCI-ISA bridges to allocate resources from
the parent PCI bus.
Heavily inspired by jhb@ and a similar implementation present in
sys/dev/pci/vga_pci.c.
Reviewed by: jhb
Approved by: jhb
|
| 221393 |
03-May-2011 |
jhb |
Reimplement how PCI-PCI bridges manage their I/O windows. Previously the
driver would verify that requests for child devices were confined to any
existing I/O windows, but the driver relied on the firmware to initialize
the windows and would never grow the windows for new requests. Now the
driver actively manages the I/O windows.
This is implemented by allocating a bus resource for each I/O window from
the parent PCI bus and suballocating that resource to child devices. The
suballocations are managed by creating an rman for each I/O window. The
suballocated resources are mapped by passing the bus_activate_resource()
call up to the parent PCI bus. Windows are grown when needed by using
bus_adjust_resource() to adjust the resource allocated from the parent PCI
bus. If the adjust request succeeds, the window is adjusted and the
suballocation request for the child device is retried.
When growing a window, the rman_first_free_region() and
rman_last_free_region() routines are used to determine if the front or
end of the existing I/O window is free. From using that, the smallest
ranges that need to be added to either the front or back of the window
are computed. The driver will first try to grow the window in whichever
direction requires the smallest growth first followed by the other
direction if that fails.
Subtractive bridges will first attempt to satisfy requests for child
resources from I/O windows (including attempts to grow the windows). If
that fails, the request is passed up to the parent PCI bus directly
however.
The PCI-PCI bridge driver will try to use firmware-assigned ranges for
child BARs first and only allocate a "fresh" range if that specific range
cannot be accommodated in the I/O window. This allows systems where the
firmware assigns resources during boot but later wipes the I/O windows
(some ACPI BIOSen are known to do this) to "rediscover" the original I/O
window ranges.
The ACPI Host-PCI bridge driver has been adjusted to correctly honor
hw.acpi.host_mem_start and the I/O port equivalent when a PCI-PCI bridge
makes a wildcard request for an I/O window range.
The new PCI-PCI bridge driver is only enabled if the NEW_PCIB kernel option
is enabled. This is a transition aide to allow platforms that do not
yet support bus_activate_resource() and bus_adjust_resource() in their
Host-PCI bridge drivers (and possibly other drivers as needed) to use the
old driver for now. Once all platforms support the new driver, the
kernel option and old driver will be removed.
PR: kern/143874 kern/149306
Tested by: mav
|
| 221324 |
02-May-2011 |
jhb |
Add implementations of BUS_ADJUST_RESOURCE() to the PCI bus driver,
generic PCI-PCI bridge driver, x86 nexus driver, and x86 Host to PCI bridge
drivers.
|
| 221138 |
27-Apr-2011 |
jhb |
Only align MSI message groups based on the number of messages being
allocated, not the maximum number of messages the device supports. The
spec only requires the former, and I believe I implemented the latter due
to misunderstanding an e-mail. In particular, this fixes an issue where
having several devices that all support 16 messages can run out of
IDT vectors on x86 even though the driver only uses a single message.
Submitted by: Bret Ketchum bcketchum of gmail
MFC after: 1 week
|
| 220195 |
31-Mar-2011 |
jhb |
Explicitly track the state of all known BARs for each PCI device. The PCI
bus driver will now remember the size of a BAR obtained during the initial
bus scan and use that size when doing lazy resource allocation rather than
resizing the BAR. The bus driver will now also report unallocated BARs to
userland for display by 'pciconf -lb'. Psuedo-resources that are not BARs
(such as the implicit I/O port resources for master/slave ATA controllers)
will no longer be listed as BARs in 'pciconf -lb'. During resume, BARs are
restored from their new saved state instead of having the raw registers
saved and restored across resume. This also fixes restoring BARs at
unusual loactions if said BAR has been allocated by a driver.
Add a constant for the offset of the ROM BIOS BAR in PCI-PCI bridges and
properly handle ROM BIOS BARs in PCI-PCI bridges. The PCI bus now also
properly handles the lack of a ROM BIOS BAR in a PCI-Cardbus bridge.
Tested by: jkim
|
| 219902 |
23-Mar-2011 |
jhb |
Do a sweep of the tree replacing calls to pci_find_extcap() with calls to
pci_find_cap() instead.
|
| 219865 |
22-Mar-2011 |
jhb |
Rename pci_find_extcap() to pci_find_cap(). PCI now uses the term
"extended capabilities" to refer to the new set of capability structures
starting at offset 0x100 in config space for PCI-express devices. For now
both function names will still work. I will merge this to older branches
to ease driver portability, but 9.0 will ship with a new pci_find_extcap()
function that locates extended capabilities instead.
Reviewed by: imp
MFC after: 1 week
|
| 219740 |
18-Mar-2011 |
jhb |
Partially revert previous change. Drop the quirk to disable MSI for HT
chipsets that do not have an HT slave at 0:0:0:0. The Linux quirk is
actually specific to Nvidia chipsets and the check I had added was in
the wrong place.
Prodded by: nathanw
|
| 219737 |
18-Mar-2011 |
jhb |
Fix a few issues with HyperTransport devices and MSI interrupts:
- Always enable the HyperTransport MSI mapping window for HyperTransport
to PCI bridges (these show up as HyperTransport slave devices).
The mapping windows in PCI-PCI bridges are enabled by existing code
in the PCI-PCI bridge driver as MSI requests propagate up the device
tree, but Host-PCI bridges don't really show up in that tree.
- If the PCI device at domain 0 bus 0 slot 0 function 0 is not a
HyperTransport device, then blacklist MSI on any other HT devices in
the system. Linux has a similar quirk.
PR: kern/155442
Tested by: Zack Dannar zdannar of gmail
MFC after: 1 week
|
| 218968 |
23-Feb-2011 |
jhb |
Properly handle BARs bigger than 4G. The '1' was treated as an int
causing the size calculation to be truncated to the size of an int
(32-bits on all current architectures).
Submitted by: Anish akgupt3 of gmail
MFC after: 1 week
|
| 218662 |
13-Feb-2011 |
marcel |
Use the preload_fetch_addr() and preload_fetch_size() convenience
functions to obtain the address and size of the PCI vendor data.
Sponsored by: Juniper Networks.
|
| 216590 |
20-Dec-2010 |
jhb |
Don't whine about child drivers calling pci_enable_busmaster(). That is
perfectly normal.
MFC after: 1 week
|
| 215820 |
25-Nov-2010 |
jhb |
Add device IDs for two more ServerWorks Host-PCI bridges so that we can
read their starting PCI bus number for older systems that do not support
ACPI (or have a broken _BBN method).
PR: kern/148108
MFC after: 1 week
|
| 215719 |
22-Nov-2010 |
jkim |
Resume critical PCI devices (and their children) first, then everything else
later. This give us better chance to catch device driver problems.
|
| 214349 |
25-Oct-2010 |
nwhitehorn |
The EHCI_CAPLENGTH and EHCI_HCIVERSION registers are actually sub-registers
within the first 4 bytes of the EHCI memory space. For controllers that
use big-endian MMIO, reading them with 1- and 2-byte reads would then
return the wrong values. Instead, read the combined register with a 4-byte
read and mask out the interesting quantities.
|
| 214203 |
22-Oct-2010 |
jhb |
- Add a new PCI quirk to whitelist an old chipset that doesn't support
PCI-express or PCI-X capabilities if we are running in a virtual machine.
- Whitelist the Intel 82440 chipset used by QEMU.
Tested by: jfv
MFC after: 1 week
|
| 214146 |
21-Oct-2010 |
jhb |
Clarify a misleading comment. The test in pci_reserve_map() was meant to
ignore BARs that are invalid due to having a size of zero, not to ignore
BARs with an existing base of zero. While here, reorganize the code
slightly to make the intent clearer.
Reported by: avg
MFC after: 1 week
|
| 214122 |
20-Oct-2010 |
jkim |
Update PCI power management registers per PCI Bus Power Management Interface
Specification Rev. 1.2. Rename pp_pcmcsr field of PM capabilities to pp_bse
to avoid further confusions and adjust some comments accordingly. The real
PMCSR (Power Management Control/Status Register) is PCIR_POWER_STATUS and
it is actually BSE (PCI-to-PCI Bridge Support Extensions) register.
|
| 214110 |
20-Oct-2010 |
jkim |
Introduce a new tunable 'hw.pci.do_power_suspend'. This tunable lets you
avoid PCI power state transition from D0 to D3 for suspending case. Default
is 1 or enabled.
|
| 214109 |
20-Oct-2010 |
jkim |
Do not apply do_power_resume for suspending P2P bridge as we did in r214064.
|
| 214065 |
19-Oct-2010 |
jkim |
Remove PCI header type 0 restriction from power state changes. PCI config.
registers for bridges are saved and restored since r200341.
OK'ed by: imp, jhb
|
| 214064 |
19-Oct-2010 |
jkim |
Do not apply do_power_resume for suspending case. When do_powerstate was
splitted into do_power_resume and do_power_nodriver, it became stale.
|
| 213907 |
15-Oct-2010 |
jkim |
Remove unnecessary castings and fix couple of style(9) nits.
|
| 213905 |
15-Oct-2010 |
jkim |
Move setting power state for children into a separate function as they were
essentially the same. This also restores hw.pci.do_power_resume tunable,
which was broken since r211430.
Reviewed by: jhb
|
| 212368 |
09-Sep-2010 |
jhb |
- Rename the constant for the Master Data Parity Error flag in the
PCI status register to map its current name.
- Use PCIM_* rather than PCIR_* for constants for fields in various AER
registers. I got about half of them right in the previous commit.
MFC after: 1 week
|
| 212326 |
08-Sep-2010 |
jhb |
- Add register definitions related to extended capability IDs in
PCI-express. I used PCIZ_* for ID constants (plain capability IDs use
PCIY_*).
- Add register definitions for the Advanced Error Reporting, Virtual
Channels, and Device Serial Number extended capabilities.
- Teach pciconf -c to list extended as well as plain capabilities. Adds
more detailed parsing for AER, VC, and device serial numbers.
MFC after: 2 weeks
|
| 211430 |
17-Aug-2010 |
jhb |
Add a new method to the PCI bridge interface, PCIB_POWER_FOR_SLEEP(). This
method is used by the PCI bus driver to query the power management system
to determine the proper device state to be used for a device during suspend
and resume. For the ACPI PCI bridge drivers this calls
acpi_device_pwr_for_sleep(). This removes ACPI-specific knowledge from
the PCI and PCI-PCI bridge drivers.
Reviewed by: jkim
|
| 210864 |
05-Aug-2010 |
jhb |
- Retire acpi_pcib_resume(). It is has just been an alias for
bus_generic_resume() since the pci_link(4) driver was added.
- Change the ACPI PCI-PCI bridge driver to inherit most of its methods
from the generic PCI-PCI bridge driver. In particular, this will now
restore PCI config registers for ACPI PCI-PCI bridges.
Tested by: Oleg Sharoyko osharoiko of gmail
|
| 210632 |
29-Jul-2010 |
yongari |
Consistently check header type after reading PCIR_HDRTYPE register.
While I'm here use defined macro instead of using magic numbers for
header type.
Reviewed by: jhb
|
| 210597 |
29-Jul-2010 |
neel |
Fix 'pciconf -a' by providing an implementation of PCIOCATTACHED.
Reviewed by: imp
MFC after: 1 week
Pointed out by: Heymian Wong (heymian at mit.alum.edu)
Sponsored by: NetApp
|
| 209907 |
11-Jul-2010 |
raj |
Provide more defines for PCI-Express device ctrl.
|
| 209154 |
14-Jun-2010 |
mav |
Virtualize pci_remap_msi_irq() call from general MSI code. It allows MSI
(FSB interrupts) to be used by non-PCI devices, such as HPET.
|
| 208409 |
22-May-2010 |
mav |
Honor hw.pci.do_power_nodriver on resume. Power-down devices without
driver attached.
|
| 208149 |
16-May-2010 |
nwhitehorn |
Add support for the U4 PCI-Express bridge chipset used in late-generation
Powermac G5 systems. MSI and several other things are not presently
supported.
The U3/U4 internal device support portions of this change were contributed
by Andreas Tobler.
MFC after: 1 week
|
| 205018 |
11-Mar-2010 |
jhb |
Small whitespace fixes.
|
| 203528 |
05-Feb-2010 |
mav |
Add pci_get|set_max_read_req() helper functions to control maximum PCIe
read request size.
Reviewed by: jhb@
|
| 203355 |
01-Feb-2010 |
yongari |
Add more bit definitions to PCI express device control and device
status register.
Reviewed by: jhb
|
| 201609 |
05-Jan-2010 |
jhb |
Move the PCI-specific logic of removing a cardbus device into a
pci_delete_child() function called by the cardbus driver. The new function
uses resource_list_unreserve() to release the BARs decoded by the device
being removed.
Reviewed by: imp
Tested by: brooks
|
| 201279 |
30-Dec-2009 |
jhb |
Teach the PCI bus driver to handle PCIR_BIOS BARs properly and remove special
handling for the PCIR_BIOS decoding enable bit from the cardbus driver.
The PCIR_BIOS BAR does include type bits like other BARs. Instead, it is
always a 32-bit non-prefetchable memory BAR where the low bit is used as a
flag to enable decoding.
Reviewed by: imp
|
| 201277 |
30-Dec-2009 |
jhb |
Remove no longer used pci_release_resource().
|
| 200341 |
10-Dec-2009 |
jkim |
Implement a rudimentary suspend/resume methods for PCI P2P bridge.
Reviewed by: jhb, imp
|
| 200315 |
09-Dec-2009 |
jhb |
For some buses, devices may have active resources assigned even though they
are not allocated by the device driver. These resources should still appear
allocated from the system's perspective so that their assigned ranges are
not reused by other resource requests. The PCI bus driver has used a hack
to effect this for a while now where it uses rman_set_device() to assign
devices to the PCI bus when they are first encountered and later assigns
them to the actual device when a driver allocates a BAR. A few downsides of
this approach is that it results in somewhat confusing devinfo -r output as
well as not being very easily portable to other bus drivers.
This commit adds generic support for "reserved" resources to the resource
list API used by many bus drivers to manage the resources of child devices.
A resource may be reserved via resource_list_reserve(). This will allocate
the resource from the bus' parent without activating it.
resource_list_alloc() recognizes an attempt to allocate a reserved resource.
When this happens it activates the resource (if requested) and then returns
the reserved resource. Similarly, when a reserved resource is released via
resource_list_release(), it is deactivated (if it is active) and the
resource is then marked reserved again, but is left allocated from the
bus' parent. To completely remove a reserved resource, a bus driver may
use resource_list_unreserve(). A bus driver may use resource_list_busy()
to determine if a reserved resource is allocated by a child device or if
it can be unreserved.
The PCI bus driver has been changed to use this framework instead of
abusing rman_set_device() to keep track of reserved vs allocated resources.
Submitted by: imp (an older version many moons ago)
MFC after: 1 month
|
| 199814 |
25-Nov-2009 |
thompsa |
Disable interrupts after doing early takeover of the usb controller in case usb
isnt actually compiled in (or kldloaded) as the controller could cause spurious
interrupts.
Tested by: Florian Smeets
|
| 199229 |
12-Nov-2009 |
jkim |
- Partially revert hackish r198964 and r199002.
- Add a proxy driver vgapm to help vgapci to save/load VGA state.
- Move device_set_desc() to the right place while we are here.
Reviewed by: jhb
|
| 199002 |
06-Nov-2009 |
jkim |
Remove duplicate suspend/resume code from vga_pci.c and let vga(4) register
itself to an associated PCI device if it exists. It is little bit hackish
but it should fix build without frame buffer driver since r198964.
Fix some style(9) nits in vga_isa.c while we are here.
|
| 198964 |
05-Nov-2009 |
jkim |
Save/restore VGA state from vga_pci.c instead of relying on vga_isa.c.
It was not working because we were saving its state after the device was
powered down. Simplify vesa_load_state() as the culprit is fixed now.
|
| 198431 |
23-Oct-2009 |
marcel |
BIOSes, buggy or otherwise, are i386 or amd64 specific.
Have the early USB takeover enabled for i386 and amd64
by default.
This also avoids a panic on PowerPC where the resource
isn't released properly and we find a busy resource
when the USB host controller wants to allocate it...
|
| 198251 |
19-Oct-2009 |
jkim |
Rewrite x86bios and update its dependent drivers.
- Do not map entire real mode memory (1MB). Instead, we map IVT/BDA and
ROM area separately. Most notably, ROM area is mapped as device memory
(uncacheable) as it should be. User memory is dynamically allocated and
free'ed with contigmalloc(9) and contigfree(9). Remove now redundant and
potentially dangerous x86bios_alloc.c. If this emulator ever grows to
support non-PC hardware, we may implement it with rman(9) later.
- Move all host-specific initializations from x86emu_util.c to x86bios.c and
remove now unnecessary x86emu_util.c. Currently, non-PC hardware is not
supported. We may use bus_space(9) later when the KPI is fixed.
- Replace all bzero() calls for emulated registers with more obviously named
x86bios_init_regs(). This function also initializes DS and SS properly.
- Add x86bios_get_intr(). This function checks if the interrupt vector is
available for the platform. It is not necessary for PC-compatible hardware
but it may be needed later. ;-)
- Do not try turning off monitor if DPMS does not support the state.
- Allocate stable memory for VESA OEM strings instead of just holding
pointers to them. They may or may not be accessible always. Fix a memory
leak of video mode table while I am here.
- Add (experimental) BIOS POST call for vesa(4). This function calls VGA
BIOS POST code from the current VGA option ROM. Some video controllers
cannot save and restore the state properly even if it is claimed to be
supported. Usually the symptom is blank display after resuming from suspend
state. If the video mode does not match the previous mode after restoring,
we try BIOS POST and force the known good initial state. Some magic was
taken from NetBSD (and it was taken from vbetool, I believe.)
- Add a loader tunable for vgapci(4) to give a hint to dpms(4) and vesa(4)
to identify who owns the VESA BIOS. This is very useful for multi-display
adapter setup. By default, the POST video controller is automatically
probed and the tunable "hw.pci.default_vgapci_unit" is set to corresponding
vgapci unit number. You may override it from loader but it is very unlikely
to be necessary. Unfortunately only AGP/PCI/PCI-E controllers can be
matched because ISA controller does not have necessary device IDs.
- Fix a long standing bug in state save/restore function. The state buffer
pointer should be ES:BX, not ES:DI according to VBE 3.0. If it ever worked,
that's because BX was always zero. :-)
- Clean up register initializations more clearer per VBE 3.0.
- Fix a lot of style issues with vesa(4).
|
| 198151 |
15-Oct-2009 |
thompsa |
Workaround buggy BIOS code in USB regard. By doing the BIOS to OS handover for
all host controllers at the same time, we avoid problems where the BIOS will
actually write to the USB registers of all the USB host controllers every time
we handover one of them, and consequently reset the OS programmed values.
Submitted by: avg
Reviewed by: jhb
|
| 197450 |
24-Sep-2009 |
avg |
number of cleanups in i386 and amd64 pci md code
o introduce PCIE_REGMAX and use it instead of ad-hoc constant
o where 'reg' parameter/variable is not already unsigned, cast it to
unsigned before comparison with maximum value to cut off negative
values
o use PCI_SLOTMAX in several places where 31 or 32 were explicitly used
o drop redundant check of 'bytes' in i386 pciereg_cfgread() - valid
values are already checked in the subsequent switch
Reviewed by: jhb
MFC after: 1 week
|
| 197406 |
22-Sep-2009 |
jhb |
Don't reread the command register to see if enabling I/O or memory
decoding "took". Other OS's that I checked do not do this and it breaks
some amdpm(4) devices. Prior to 7.2 we did not honor the error returned
when this failed anyway, so this in effect restores previous behavior.
PR: kern/137668
Tested by: Aurelien Mere aurelien.mere amc-os.com
MFC after: 3 days
|
| 197099 |
11-Sep-2009 |
avg |
pci(4): don't perform maximum register number check
Different sub-kinds of PCI buses may have different rules and
thus it is up for the bus backends to do proper input checks.
For example, PCIe allows configuration register numbers < 0x1000,
while for PCI proper the limit is 0x100.
And, in fact, the buses already do the checks.
Reviewed by: jhb
MFC after: 1 week
X-ToDo: add check for negative value to bus backends
X-ToDo: use named constant for maximum PCIe register
|
| 197077 |
10-Sep-2009 |
avg |
pci: remove definitions of duplicate constants
Suggested by: jhb
Reviewed by: jhb
MFC after: 1 week
|
| 195808 |
21-Jul-2009 |
marius |
Add a MD __PCI_BAR_ZERO_VALID which denotes that BARs containing 0
actually specify valid bases that should be treated just as normal.
The PCI specifications have no indication that 0 would be a magic value
indicating a disabled BAR as commonly used on at least amd64 and i386
but not sparc64. It's unclear what to do in pci_delete_resource()
instead of writing 0 to a BAR though as there's no (other) way do
disable individual BARs so its decoding is left enabled in case of
__PCI_BAR_ZERO_VALID for now.
Approved by: re (kib), jhb
MFC after: 1 week
|
| 194644 |
22-Jun-2009 |
jhb |
Enable MSI in the MSI capability registers any time that the first message
in an MSI group is enabled, not just if the address/data pair are not
initialized.
Reported by: rnoland
MFC after: 1 week
|
| 193530 |
05-Jun-2009 |
jkim |
Import ACPICA 20090521.
|
| 193306 |
02-Jun-2009 |
jhb |
Include <machine/stdarg.h> for va_*(). I'm not sure how this compiled
on amd64 without this.
|
| 193257 |
01-Jun-2009 |
jhb |
Add an internal pci_printf() routine similar to device_printf() except
that it prefixes the output with 'pci<domain>:<bus>:<device>:<function>: '.
|
| 193256 |
01-Jun-2009 |
jhb |
Adjust some comments.
|
| 192481 |
20-May-2009 |
imp |
Revert junk from last commit. These are WIP and not ready (and don't
match the description of the last commit).
|
| 192450 |
20-May-2009 |
imp |
We no longer need to use d_thread_t, migrate to struct thread *.
|
| 191222 |
17-Apr-2009 |
jhb |
- Add a few more register defintions for the PCI express capability
registers.
- Cleanup PCI-X capability printf to not leave a dangling "supports" for
some PCI-X bridges.
- Display additional PCI express details including the negotiated and max
link width and the actual and maximum supported max payload.
MFC after: 1 month
|
| 191069 |
14-Apr-2009 |
jhb |
- Consolidate duplicated code for reading and sizing BARs and writing base
addresses to BARs into new pci_read_bar() and pci_write_bar() routines.
pci_add_map(), pci_alloc_map(), and pci_delete_resource() now use these
routines to work with BARs.
- Just pass the device_t for the new PCI device to various routines instead
of passing the device, bus, slot, and function.
Reviewed by: imp
|
| 190670 |
03-Apr-2009 |
stas |
- Fix spacing in the comment.
Reported by: jhb
|
| 190668 |
03-Apr-2009 |
stas |
- Correct the comment.
MFC after: 3 days
|
| 189844 |
15-Mar-2009 |
imp |
Don't adjust ranges at all for subtractive bridges. The simple-minded
stuff we're doing is too simple-minded, so back it out for now.
|
| 189792 |
14-Mar-2009 |
imp |
Two fixes:
(1) Fix pcib_read/write_config prototypes.
(2) When contrainting a resource request for a 'subtractive' bridge,
it is important to select a range outside the base/limit
registers, since those are the only values known to not
possibly work. On my HP laptop, the base bridge excludes I/O
ports 0xa000-0xafff, however that was the range we were passing
up the tree. Instead, when a range spans the "hole" we now
arbitrarily pick the range just above the hole to allocate from.
All of my rl and xl cards, at a minimum, started working again on this
laptop with those fixes.
|
| 189611 |
10-Mar-2009 |
marcel |
Fix a buglet in revision 189401: when restoring a 64-bit BAR,
write the upper 32-bits in the adjacent bar. The consequences
of the buglet were severe enough though: a machine check.
|
| 189447 |
06-Mar-2009 |
rnoland |
Invert the logic error for the MSI/MSIX vs INTx case.
Pointyhat to: me
MFC after: 3 days
|
| 189401 |
05-Mar-2009 |
jhb |
Always read/write the full 64-bit value of 64-bit BARs. Specifically,
when determining the size of a BAR by writing all 1's to the BAR and
reading back the result, always operate on the full 64-bit size.
Reviewed by: imp
MFC after: 1 month
|
| 189400 |
05-Mar-2009 |
jhb |
Honor the prefetchable flag in memory BARs by setting the RF_PREFETCHABLE
flag when calling bus_alloc_resource() to allocate resources from a parent
PCI bridge. For PCI-PCI bridges this asks the bridge to satisfy the
request using the prefetchable memory range rather than the normal
memory range.
Reviewed by: imp
Reported by: scottl
MFC after: 1 week
|
| 189373 |
04-Mar-2009 |
jhb |
The recent PCI resource allocation fixes exposed a bug where the same
BAR could be allocated twice by different children of a vgapci0 device.
To fix this, change the vgapci0 device to track references on its associated
resources so that they are only allocated once from the parent PCI bus and
released when no children are using them. Previously this leaked a small
amount of KVA on at least some architectures.
|
| 189367 |
04-Mar-2009 |
rnoland |
Extend the management of PCIM_CMD_INTxDIS.
We now explicitly enable INTx during bus_setup_intr() if it is needed.
Several of the ata drivers were managing this bit internally. This is
better handled in pci and it should work for all drivers now.
We also mask INTx during bus_teardown_intr() by setting this bit.
Reviewed by: jhb
MFC after: 3 days
|
| 189306 |
03-Mar-2009 |
jhb |
Further refine the handling of resources for BARs in the PCI bus driver.
A while back, Warner changed the PCI bus code to reserve resources when
enumerating devices and simply give devices the previously allocated
resources when they call bus_alloc_resource(). This ensures that address
ranges being decoded by a BAR are always allocated in the nexus0 device
(or whatever device the PCI bus gets its address space from) even if a
device driver is not attached to the device. This patch extends this
behavior further:
- To let the PCI bus distinguish between a resource being allocated by
a device driver vs. merely being allocated by the bus, use
rman_set_device() to assign the device to the bus when it is owned
by the bus and to the child device when it is allocated by the child
device's driver. We can now prevent a device driver from allocating
the same device twice. Doing so could result in odd things like
allocating duplicate virtual memory to map the resource on some
archs and leaking the original mapping.
- When a PCI device driver releases a resource, don't pass the request
all the way up the tree and release it in the nexus (or similar device)
since the BAR is still active and decoding. Otherwise, another device
could later allocate the same range even though it is still in use.
Instead, deactivate the resource and assign it back to the PCI bus
using rman_set_device().
- pci_delete_resource() will actually completely free a BAR including
attemping to disable it.
- Disable BAR decoding via the command register when sizing a BAR in
pci_alloc_map() which is used to allocate resources for a BAR when
the BIOS/firmware did not assign a usable resource range during boot.
This mirrors an earlier fix to pci_add_map() which is used when to
size BARs during boot.
- Move the activation of I/O decoding in the PCI command register into
pci_activate_resource() instead of doing it in pci_alloc_resource().
Previously we could actually enable decoding before a BAR was
initialized via pci_alloc_map().
Glanced at by: bsdimp
|
| 189285 |
02-Mar-2009 |
rnoland |
Disable INTx when enabling MSI/MSIX
This addresses interrupt storms that were noticed after enabling MSI
in drm. I think this is due to a loose interpretation of the PCI 2.3
spec, which states that a function using MSI is prohibitted from using
INTx. It appears that some vendors interpretted that to mean that they
should handle it in hardware, while others felt it was the drivers
responsibility.
This fix will also likely resolve interrupt storm related issues with
devices other than drm.
Reviewed by: jhb@
MFC after: 3 days
|
| 189073 |
26-Feb-2009 |
jhb |
Don't throw away upper 32-bits of the HT MSI address window. In practice
this is harmless since the address window for MSI on x86 is in the lower
4 GB.
Submitted by: mav
MFC after: 1 week
|
| 188639 |
15-Feb-2009 |
mav |
Add SATA and PCI Advanced Features capabilities constants.
|
| 188018 |
02-Feb-2009 |
jhb |
- Add a new ioctl to /dev/pci to fetch details on an individual BAR of a
device. The details include the current value of the BAR (including all
the flag bits and the current base address), its length, and whether or not
it is enabled. Since this operation is not invasive, non-root users are
allowed to use it (unlike manual config register access which requires
root). The intention is that userland apps (such as Xorg) will use this
interface rather than dangerously frobbing the BARs from userland to
obtain this information.
- Add a new sub-mode to the 'list' mode of pciconf. The -b flag when used
with -l will now list all the active BARs for each device.
MFC after: 1 month
|
| 187457 |
20-Jan-2009 |
nwhitehorn |
Change the probe priority for PCI and I2C generic bus modules from
numerical constants to BUS_PROBE_GENERIC.
Suggested by: jhb
|
| 187348 |
16-Jan-2009 |
jhb |
Disable decoding of BARs by devices before we trash the value in the BAR
by writing all 1's to it to determine its length. This fixes issues with
MCFG on at least some machines where a trashed BAR claimed subsequent
attempts at PCI config transactions because the addresses in the MCFG
window fell in the decoding range of the BAR.
In general it is a bad idea to leave the BARs enabled while we are
frobbing with them in this manner.
Sleuthing by: tegge
MFC after: 1 week
|
| 184937 |
13-Nov-2008 |
mav |
Add ADMA, SATA and SAS mass storage subclasses reporting.
|
| 184594 |
03-Nov-2008 |
imp |
Nit: Add a few leading zeros to make this match other mask constants
in this file. Also to make sure that I got other ASI constants right.
|
| 184141 |
21-Oct-2008 |
mav |
Add HDA multimedia subclass.
|
| 184139 |
21-Oct-2008 |
mav |
Add "SD host controller" subclass name.
|
| 183194 |
19-Sep-2008 |
rnoland |
pci_setup_intr() will only enable MSI/MSI-X for direct children. Add methods
to vga_pci.c to request on behalf of it's children. This causes vgapci to show
up as the interrupt owner in vmstat -i, rather than the child device.
Approved by: jhb(mentor)
|
| 183095 |
16-Sep-2008 |
jhb |
Allow child devices of vgapci(4) to query VPD strings and use MSI/MSI-X
interrupts. For the MSI/MSI-X case, we only allow 1 child device to use
MSI or MSI-X at a time.
Tested by: rnoland
|
| 182706 |
03-Sep-2008 |
imp |
Style nit. Continued lines are indented 2 spaces in this file.
|
| 182033 |
23-Aug-2008 |
imp |
Cope with errors from device_get_children(). These errors can happen
only in low memory situations, so the error fork of these fixes is
lightly tested, but they should do the least-wrong thing...
Submitted by: Hans Petter Selasky
|
| 182032 |
23-Aug-2008 |
imp |
Cosmetic nit.
|
| 181934 |
20-Aug-2008 |
jhb |
The config space registers holding the upper 32-bits of the prefetchable
memory area's base and limit are optional. The low 4-bits of the "low"
prefetchable registers indicates whether or not a 32-bit or 64-bit
region is supported. The PCI-PCI driver had been assuming that all bridges
supported a 64-bit region (and thus the two upper 32-bit registers). Fix
the driver to only use those registers if the low 4-bits of the "low"
registers indicate that a 64-bit region is supported. The PCI-PCI bridge
in the XBox happens to be a bridge that only supports a 32-bit region.
Reported by: rink
MFC after: 1 week
|
| 181798 |
17-Aug-2008 |
imp |
Update a comment about not numbering pci busses. This may soon be
OBE, but was sitting around in one of my trees for a while...
|
| 181794 |
16-Aug-2008 |
imp |
Remove useless #if 1.
|
| 181789 |
16-Aug-2008 |
imp |
Add some sysctl reporting for most pci_pci bridges. We now report
domain, pribus (the primary bus, eg the bus that this chip is on),
secbus (the secondary bus, eg the bus immediately behind this chip)
and subbus (the number of the highest bus behind this chip).
Normally, this information is reported via bootverbose parameters, but
that's hard to use for debugging in some cases.
This adds reading of pribus to make this happen. In addition, change
the narrow types to u_int to allow for easier reporting via sysctl for
domain, secbus and subbus. This should have no effect, but if it
does, please let me know.
|
| 181452 |
09-Aug-2008 |
imp |
Change -1 to 0xfffffffful since the interface returns uint32_t.
|
| 181336 |
05-Aug-2008 |
jhb |
Remove the second check for a 64-bit BAR value on a 32-bit system in
pci_add_map(). First, this condition is already handled earlier in
the function. Second, as written the check would never fire as the
'start' value was overwritten with a long value (rman_get_start() returns
long) before the comparison was done.
Discussed with: imp
MFC after: 2 weeks
|
| 181333 |
05-Aug-2008 |
jhb |
If the kernel fails to allocate resources for the initial value of a BAR
for a PCI device during the boot-time probe of the parent PCI bus, then
zero the BAR and clear the resource list entry for that BAR. This forces
the PCI bus driver to request a valid resource range from the parent bridge
driver when the device driver tries to allocate the BAR. Similarly, if the
initial value of a BAR is a valid range but it is > 4GB and the current OS
only has 32-bit longs, then do a full teardown of the initial value of the
BAR to force a reallocation.
Reviewed by: imp
MFC after: 1 week
|
| 180753 |
23-Jul-2008 |
luoqi |
SATA device on some nForce based boards could get confused if MSI is not
used but MSI to HyperTransport IRQ mapping is enabled, and would act as
if MSI is turned on, resulting in interrupt loss.
This commit will,
1. enable MSI mapping on a device only when MSI is enabled for that
device and the MSI address matches the HT mapping window.
2. enable MSI mapping on a bridge only when a downstream device is
allocated an MSI address in the mapping window
PR: kern/118842
Reviewed by: jhb
MFC after: 1 week
|
| 178588 |
26-Apr-2008 |
marius |
Remove some remnant alpha hacks.
Approved by: PCI-maintainers (imp, jhb)
|
| 178161 |
12-Apr-2008 |
phk |
Remove a trailing comma which FlexeLint whines about.
|
| 175875 |
01-Feb-2008 |
jhb |
Relax the check for a PCI-express chipset by assuming the system is a
PCI-express chipset (and thus has functional MSI) if there are any
PCI-express devices in the system, not requiring a root port device.
With PCI-X the chipset detection has to be very conservative because there
are known systems with PCI-X devices that do not appear to have PCI-X
chipsets. However, with PCI-express I'm not sure it is possible to have
a PCI-express device in a system with a non-PCI-express chipset. If we
assume that is the case then this change is valid. It is also required
for at least some PCI-express systems that don't have any devices with
a root port capability (some ICH9 systems).
MFC after: 1 week
Reported by: jfv
|
| 175368 |
15-Jan-2008 |
jhb |
Don't cache the new-bus name of a PCI device in the PCI conf structure,
but reread it from the device_t every time the device list is fetched.
Previously the device name in pciconf -l would not be updated when a driver
was unloaded or if a device was detached and attached to a different
driver.
MFC after: 1 week
PR: kern/104777
Submitted by: "Iasen Kostoff" tbyte | otel net
|
| 174932 |
26-Dec-2007 |
marius |
Fix some bugs in the FreeBSD 4/5/6 pci(4) IOCTLs compatibility code:
- Use the correct offsets when copying out the results of PCIOCGETCONF_OLD.
This happened to not affect the 64-bit architectures because there the
addition of pc_domain to struct pcisel didn't change the overall size of
struct pci_conf. [1]
- Always copy the name and unit information to conf_old so it's also part
of the output once this information is cached in dinfo.
- Use the correct type for flags in struct pci_match_conf_old. This
change is more or less cosmetic though.
Reported and tested by: bde [1]
Reviewed by: imp
MFC after: 3 days
Committed from: 24C3
|
| 173678 |
16-Nov-2007 |
jkim |
Make VPD register access more robust:
- Implement timing out of VPD register access.[1]
- Fix an off-by-one error of freeing malloc'd space when checksum is invalid.
- Fix style(9) bugs, i.e., sizeof cannot be followed by space.
- Retire now obsolete 'hw.pci.enable_vpd' tunable.
Submitted by: cokane (initial revision)[1]
Reviewed by: marius (intermediate revision)
Silence from: jhb, jmg, rwatson
Tested by: cokane, jkim
MFC after: 3 days
|
| 172999 |
26-Oct-2007 |
imp |
Simplify the old compat #ifdefs.
|
| 172932 |
24-Oct-2007 |
marius |
Add ABI backwards compatibility to the FreeBSD 4/5/6 versions of
the PCIOCGETCONF, PCIOCREAD and PCIOCWRITE IOCTLs, which was broken
with the introduction of PCI domain support.
As the size of struct pci_conf_io wasn't changed with that commit,
this unfortunately requires the ABI of PCIOCGETCONF to be broken
again in order to be able to provide backwards compatibility to
the old version of that IOCTL.
Requested by: imp
Discussed with: re (kensmith)
Reviewed by: PCI maintainers (imp, jhb)
MFC after: 5 days
|
| 172394 |
30-Sep-2007 |
marius |
Make the PCI code aware of PCI domains (aka PCI segments) so we can
support machines having multiple independently numbered PCI domains
and don't support reenumeration without ambiguity amongst the
devices as seen by the OS and represented by PCI location strings.
This includes introducing a function pci_find_dbsf(9) which works
like pci_find_bsf(9) but additionally takes a domain number argument
and limiting pci_find_bsf(9) to only search devices in domain 0 (the
only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are
changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order
to no longer report false positives when searching for siblings and
dupe devices in the same domain respectively.
Along with this change the sole host-PCI bridge driver converted to
actually make use of PCI domain support is uninorth(4), the others
continue to use domain 0 only for now and need to be converted as
appropriate later on.
Note that this means that the format of the location strings as used
by pciconf(8) has been changed and that consumers of <sys/pciio.h>
potentially need to be recompiled.
Suggested by: jhb
Reviewed by: grehan, jhb, marcel
Approved by: re (kensmith), jhb (PCI maintainer hat)
|
| 172242 |
19-Sep-2007 |
sepotvin |
- Fix a small bit slip in PCIM_PCAP_D[0-2]PME defines.
- Add the definitions for D3PME_COLD and D3PME_HOT capabilities.
Reviewed by: njl (mentor), imp
Approved by: re (kensmith)
MFC after: 1 week
|
| 171649 |
29-Jul-2007 |
marcel |
In pci_alloc_map(), restore the original value of the BAR for
the duration of the function. The device we would otherwise
have left in an useless state may just as well be the low-level
console. When booting verbose, we do need it addressable if we
want to avoid a MCA.
Approved by: re (kensmith)
|
| 169902 |
23-May-2007 |
gallatin |
Fix a typo in pcib_alloc_msi{x} which resulted in the
device's, not the bridge's, softc to be used to check the
PCIB_DISABLE_MSI flag. This resulted in randomly allowing
or denying MSI interrupts based on whatever value the driver
happened to store at sizeof(device_t) bytes into its softc.
I noticed this when I stopped getting MSI interrupts
after slighly re-arranging mxge's softc yesterday.
|
| 169634 |
16-May-2007 |
jhb |
Don't completely skip pci_cfg_save() in the PCI nomatch routine if
the power_nodriver tunable is off. pci_cfg_save() already checks the
tunable internally, and no other callers of pci_cfg_save() check the
tunable.
Reviewed by: imp
|
| 169616 |
16-May-2007 |
imp |
Change PCIM_CIS_ASI_TUPLE to _CONFIG.
Add PCI_MAX_BAR_0
minor style nit.
Add PCIM_CIS_CONFIG_MASK
|
| 169615 |
16-May-2007 |
imp |
Add some doxygen docs for pci_cfg_{save,restore}.
|
| 169351 |
07-May-2007 |
jhb |
Fix a typo in a bootverbose printf.
MFC after: 3 days
Submitted by: yongari
|
| 169221 |
02-May-2007 |
jhb |
Revamp the MSI/MSI-X code a bit to achieve two main goals:
- Simplify the amount of work that has be done for each architecture by
pushing more of the truly MI code down into the PCI bus driver.
- Don't bind MSI-X indicies to IRQs so that we can allow a driver to map
multiple MSI-X messages into a single IRQ when handling a message
shortage.
The changes include:
- Add a new pcib_if method: PCIB_MAP_MSI() which is called by the PCI bus
to calculate the address and data values for a given MSI/MSI-X IRQ.
The x86 nexus drivers map this into a call to a new 'msi_map()' function
in msi.c that does the mapping.
- Retire the pcib_if method PCIB_REMAP_MSIX() and remove the 'index'
parameter from PCIB_ALLOC_MSIX(). MD code no longer has any knowledge
of the MSI-X index for a given MSI-X IRQ.
- The PCI bus driver now stores more MSI-X state in a child's ivars.
Specifically, it now stores an array of IRQs (called "message vectors" in
the code) that have associated address and data values, and a small
virtual version of the MSI-X table that specifies the message vector
that a given MSI-X table entry uses. Sparse mappings are permitted in
the virtual table.
- The PCI bus driver now configures the MSI and MSI-X address/data
registers directly via custom bus_setup_intr() and bus_teardown_intr()
methods. pci_setup_intr() invokes PCIB_MAP_MSI() to determine the
address and data values for a given message as needed. The MD code
no longer has to call back down into the PCI bus code to set these
values from the nexus' bus_setup_intr() handler.
- The PCI bus code provides a callout (pci_remap_msi_irq()) that the MD
code can call to force the PCI bus to re-invoke PCIB_MAP_MSI() to get
new values of the address and data fields for a given IRQ. The x86
MSI code uses this when an MSI IRQ is moved to a different CPU, requiring
a new value of the 'address' field.
- The x86 MSI psuedo-driver loses a lot of code, and in fact the separate
MSI/MSI-X pseudo-PICs are collapsed down into a single MSI PIC driver
since the only remaining diff between the two is a substring in a
bootverbose printf.
- The PCI bus driver will now restore MSI-X state (including programming
entries in the MSI-X table) on device resume.
- The interface for pci_remap_msix() has changed. Instead of accepting
indices for the allocated vectors, it accepts a mini-virtual table
(with a new length parameter). This table is an array of u_ints, where
each value specifies which allocated message vector to use for the
corresponding MSI-X message. A vector of 0 forces a message to not
have an associated IRQ. The device may choose to only use some of the
IRQs assigned, in which case the unused IRQs must be at the "end" and
will be released back to the system. This allows a driver to use the
same remap table for different shortage values. For example, if a driver
wants 4 messages, it can use the same remap table (which only uses the
first two messages) for the cases when it only gets 2 or 3 messages and
in the latter case the PCI bus will release the 3rd IRQ back to the
system.
MFC after: 1 month
|
| 169219 |
02-May-2007 |
jhb |
Use more specific local variable pointers to narrow some expressions.
MFC after: 1 week
|
| 169037 |
25-Apr-2007 |
jhb |
- HT 2.00b added a new flag to the MSI mapping HT capability to indicate
that the MSI mapping window is fixed at 0xfee00000 and the capability
does not include two more dwords used to program the address. Supporting
this mostly results in quieting spurious warnings during boot about
non-default MSI mapping windows.
- HT 2.00b also added a new HT capability type, so support that in pciconf.
MFC after: 3 days
Tested by: jmg
|
| 168162 |
31-Mar-2007 |
jhb |
Add constants for the fields in a BAR. Also, add two new macros
PCI_BAR_(IO|MEM)() that return true if the passed in value from a BAR
is for an IO or memory BAR, respectively.
Reviewed by: imp
|
| 168157 |
31-Mar-2007 |
jhb |
- Add missing constants for subclasses.
- Add a few progif constants as well.
|
| 167909 |
26-Mar-2007 |
jhb |
Change the VPD code to read the VPD data on-demand when a driver asks for
it via pci_get_vpd_*() rather than always reading it for each device during
boot. I've left the tunable so that it can still be turned off if a device
driver causes a lockup via a query to a broken device, but devices whose
drivers do not use VPD (the vast majority) should no longer result in
lockups during boot, and most folks should not need to tweak the tunable
now.
Tested on: bge(4)
Silence from: jmg
|
| 167239 |
05-Mar-2007 |
jhb |
- Use constants for VPD capability register offsets.
- Add missing ()'s around return values.
|
| 167238 |
05-Mar-2007 |
jhb |
- Flesh out list of UART simple comms programming interfaces.
- Add list of PIC base peripheral programming interfaces.
- Add VPD capability register offsets.
MFC after: 3 days
|
| 166802 |
17-Feb-2007 |
sos |
Add support for chipsets that has NULL'd BAR's for legacy ports.
This allows DMA to be used on a fine little geode system I got here and
most like on lots of older systems like that.
HW donated by: Paul Ghering
|
| 166723 |
14-Feb-2007 |
jhb |
Adjust the global MSI blacklisting strategy so we don't have to explicitly
blacklist a bunch of old chipsets. If a system contains a PCI-PCI bridge
that supports PCI-X, assume the chipset supports PCI-X. If a system
contains a PCI-express root port, assume the chipset supports PCI-express.
If the chipset doesn't support either PCI-X or PCI-express, then blacklist
it by default. We should now only need to explicitly blacklist PCI-X or
PCI-express chipsets that don't properly handle MSI.
|
| 166722 |
14-Feb-2007 |
jhb |
- Fix an off by one error in pci_remap_msix_method() that effectively
broke the method as all the MSI-X table indices were off by one in
the backend MD code.
- Fix a cosmetic nit in the bootverbose printf in pci_alloc_msix_method().
|
| 166714 |
14-Feb-2007 |
jhb |
Add missing 'break' that in this case is harmless.
|
| 166566 |
08-Feb-2007 |
rwatson |
As VPD support still causes hard hangs on boot with some hardware, add a
tunable allowing automatic parsing of VPD data to be disabled. The
default is left as-is; if you are having problems with hard hangs at boot
due to VPD, try setting hw.pci.enable_vpd=0. A proper architectural
solution has been under discussion for some time, but this allows me to
boot my test machines in the mean time.
Submitted by: bz
Head nod: jmg
|
| 166434 |
02-Feb-2007 |
jhb |
Add constants for the PCIY_VENDOR (vendor-specific), PCIY_DEBUG (EHCI
debug port), and PCIY_EXPRESS (PCI-express) capabilities.
|
| 166176 |
22-Jan-2007 |
jhb |
Expand the MSI/MSI-X API to address some deficiencies in the MSI-X support.
- First off, device drivers really do need to know if they are allocating
MSI or MSI-X messages. MSI requires allocating powerof2() messages for
example where MSI-X does not. To address this, split out the MSI-X
support from pci_msi_count() and pci_alloc_msi() into new driver-visible
functions pci_msix_count() and pci_alloc_msix(). As a result,
pci_msi_count() now just returns a count of the max supported MSI
messages for the device, and pci_alloc_msi() only tries to allocate MSI
messages. To get a count of the max supported MSI-X messages, use
pci_msix_count(). To allocate MSI-X messages, use pci_alloc_msix().
pci_release_msi() still handles both MSI and MSI-X messages, however.
As a result of this change, drivers using the existing API will only
use MSI messages and will no longer try to use MSI-X messages.
- Because MSI-X allows for each message to have its own data and address
values (and thus does not require all of the messages to have their
MD vectors allocated as a group), some devices allow for "sparse" use
of MSI-X message slots. For example, if a device supports 8 messages
but the OS is only able to allocate 2 messages, the device may make the
best use of 2 IRQs if it enables the messages at slots 1 and 4 rather
than default of using the first N slots (or indicies) at 1 and 2. To
support this, add a new pci_remap_msix() function that a driver may call
after a successful pci_alloc_msix() (but before allocating any of the
SYS_RES_IRQ resources) to allow the allocated IRQ resources to be
assigned to different message indices. For example, from the earlier
example, after pci_alloc_msix() returned a value of 2, the driver would
call pci_remap_msix() passing in array of integers { 1, 4 } as the
new message indices to use. The rid's for the SYS_RES_IRQ resources
will always match the message indices. Thus, after the call to
pci_remap_msix() the driver would be able to access the first message
in slot 1 at SYS_RES_IRQ rid 1, and the second message at slot 4 at
SYS_RES_IRQ rid 4. Note that the message slots/indices are 1-based
rather than 0-based so that they will always correspond to the rid
values (SYS_RES_IRQ rid 0 is reserved for the legacy INTx interrupt).
To support this API, a new PCIB_REMAP_MSIX() method was added to the
pcib interface to change the message index for a single IRQ.
Tested by: scottl
|
| 166109 |
19-Jan-2007 |
jhb |
- Change the PCI-X registers constants to be relative to the PCI-X PCI
capability rather than hardcoded offsets for a particular card. While
I'm here, expand the constants some.
- Change the ahd(4) driver to use pci_find_extcap() to locate the PCI-X
capability to keep up with the first change.
Reviewed by: scottl, gibbs (earlier version)
|
| 166053 |
16-Jan-2007 |
jhb |
Disable MSI for the Intel 845 and 865 chipsets and update comment for
E7210 to note it is the same devid as the 875 chipset.
|
| 166048 |
16-Jan-2007 |
jhb |
Fix the subvendor ID for PCI-PCI bridges.
- Retire the PCI_SUB*_1 constants and don't try to read a subvendor ID out
of them. There isn't a standard subvendor ID field for PCI-PCI bridges.
Instead, the dword at offset 0x34 is actually mostly reserved except for
the LSB which is the capabilities pointer.
- Add support for the PCI-PCI bridge subvendor ID capability (13) and use
it to set the subvendor ID for PCI-PCI bridges.
MFC after: 1 month
|
| 165995 |
13-Jan-2007 |
jhb |
- Add a new flag to the PCI-PCI driver to disable MSI on devices behind the
bridge if it doesn't pass MSI messages up correctly. We set the flag
in pcib_attach() if the device ID is disabled via a PCI quirk.
- Disable MSI for devices behind the AMD 8131 HT-PCIX bridge. Linux has
the same quirk.
Tested by: no one despite repeated calls for testers
|
| 165981 |
12-Jan-2007 |
jhb |
Disable MSI for two ServerWorks chipsets. The first is based on a user
report. The second is blacklisted in Linux.
|
| 165980 |
12-Jan-2007 |
jhb |
Blacklist a few more Intel chipsets re: MSI based on user reports:
E7500 and 855.
|
| 165973 |
12-Jan-2007 |
jhb |
- Condense the comment for Intel chipset MSI blacklist entries.
- Blacklist the E7210.
PR: kern/105768 (2)
Reported by: marcus (2)
|
| 165577 |
28-Dec-2006 |
jhb |
Disable MSI on the Intel E7505 chipset. It is reported broken on a Tyan
S2665ANF motherboard.
Reported by: "Eugene M. Kim" <blue at white lv>
|
| 165229 |
14-Dec-2006 |
jhb |
Disable MSI for the Intel E7501 chipset.
Reported by: jdp
|
| 165228 |
14-Dec-2006 |
jhb |
Add a first pass at a way to blacklist MSI on systems where it doesn't
work:
- A new PCI quirk (PCI_QUIRK_DISABLE_MSI) is added to the quirk table.
- A new pci_msi_device_blacklisted() determines if a passed in device
matches an MSI quirk in the quirk table. This can be overridden (all
quirks ignored) by setting the hw.pci.honor_msi_blacklist to 0.
- A global blacklist check is performed in the MI PCI bus code by checking
to see if the device at 0:0:0 is blacklisted.
Tested by: jdp
|
| 165217 |
14-Dec-2006 |
jhb |
Replace #define<space> with #define<tab> so the code is consistent with
style(9) and avoids mixing the two formats.
|
| 165131 |
12-Dec-2006 |
jhb |
- Add constants for HT PCI capability registers including the various
subtypes of HT capabilities.
- Add constants for the MSI mapping window HT PCI capability.
- On i386 and amd64, enable the MSI mapping window on any HT bridges we
encounter and report any non-standard mapping window addresses.
|
| 165130 |
12-Dec-2006 |
jhb |
Give the WREG() macro the same lifetime as the REG() macro.
|
| 165129 |
12-Dec-2006 |
jhb |
Add some bootverbose printf's to detail how many MSI messages are allocated
and to which IRQs.
Requested by: scottl
|
| 164467 |
21-Nov-2006 |
jmg |
don't mark the cksum as invalid here... off is incorrect when we get
here, it's either unset, or it's valid, so we don't need to do anything
different...
Reported by: Neterion (via rwatson)
|
| 164338 |
16-Nov-2006 |
jhb |
Look for capabilities in PCI-PCI bridges using the same CAP PTR register
as for type 0 devices.
Submitted by: grehan
MFC after: 1 week
|
| 164282 |
14-Nov-2006 |
jhb |
Fix a couple of comment typos.
Reported by: ru
|
| 164264 |
13-Nov-2006 |
jhb |
First cut at MI support for PCI Message Signalled Interrupts (MSI):
- Add 3 new functions to the pci_if interface along with suitable wrappers
to provide the device driver visible API:
- pci_alloc_msi(dev, int *count) backed by PCI_ALLOC_MSI(). '*count'
here is an in and out parameter. The driver stores the desired number
of messages in '*count' before calling the function. On success,
'*count' holds the number of messages allocated to the device. Also on
success, the driver can access the messages as SYS_RES_IRQ resources
starting at rid 1. Note that the legacy INTx interrupt resource will
not be available when using MSI. Note that this function will allocate
either MSI or MSI-X messages depending on the devices capabilities and
the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. Also note
that the driver should activate the memory resource that holds the
MSI-X table and pending bit array (PBA) before calling this function
if the device supports MSI-X.
- pci_release_msi(dev) backed by PCI_RELEASE_MSI(). This function
releases the messages allocated for this device. All of the
SYS_RES_IRQ resources need to be released for this function to succeed.
- pci_msi_count(dev) backed by PCI_MSI_COUNT(). This function returns
the maximum number of MSI or MSI-X messages supported by this device.
MSI-X is preferred if present, but this function will honor the
'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. This function
should return the largest value that pci_alloc_msi() can return
(assuming the MD code is able to allocate sufficient backing resources
for all of the messages).
- Add default implementations for these 3 methods to the pci_driver generic
PCI bus driver. (The various other PCI bus drivers such as for ACPI and
OFW will inherit these default implementations.) This default
implementation depends on 4 new pcib_if methods that bubble up through
the PCI bridges to the MD code to allocate IRQ values and perform any
needed MD setup code needed:
- PCIB_ALLOC_MSI() attempts to allocate a group of MSI messages.
- PCIB_RELEASE_MSI() releases a group of MSI messages.
- PCIB_ALLOC_MSIX() attempts to allocate a single MSI-X message.
- PCIB_RELEASE_MSIX() releases a single MSI-X message.
- Add default implementations for these 4 methods that just pass the
request up to the parent bus's parent bridge driver and use the
default implementation in the various MI PCI bridge drivers.
- Add MI functions for use by MD code when managing MSI and MSI-X
interrupts:
- pci_enable_msi(dev, address, data) programs the MSI capability address
and data registers for a group of MSI messages
- pci_enable_msix(dev, index, address, data) initializes a single MSI-X
message in the MSI-X table
- pci_mask_msix(dev, index) masks a single MSI-X message
- pci_unmask_msix(dev, index) unmasks a single MSI-X message
- pci_pending_msix(dev, index) returns true if the specified MSI-X
message is currently pending
- Save the MSI capability address and data registers in the pci_cfgreg
block in a PCI devices ivars and restore the values when a device is
resumed. Note that the MSI-X table is not currently restored during
resume.
- Add constants for MSI-X register offsets and fields.
- Record interesting data about any MSI-X capability blocks we come
across in the pci_cfgreg block in the ivars for PCI devices.
Tested on: em (i386, MSI), bce (amd64/i386, MSI), mpt (amd64, MSI-X)
Reviewed by: scottl, grehan, jfv
MFC after: 2 months
|
| 164140 |
09-Nov-2006 |
jmg |
fix hanging on invalid data... (This doesn't fix hanging due to broken
hardware)...
Tested by: Ian Dowse, Adam K Kirchhoff and Vladimir Kushnir
|
| 164130 |
09-Nov-2006 |
jhb |
Don't try to print a NULL string during boot. If a device doesn't have a
valid name yet, just omit the name during the bootverbose printfs.
MFC after: 1 week
|
| 164067 |
07-Nov-2006 |
jhb |
Various whitespace cleanups.
|
| 163975 |
04-Nov-2006 |
imp |
Doh! Actually commit checking against NULL for res.
Noticed by: dougb@
|
| 163809 |
30-Oct-2006 |
imp |
Assign start to the value we were able to allocate and use that to
write out the BAR. Otherwise, we were trying to shift a 32-bit
quantity on 32-bit platforms. Also, 'start' check sanity to where it
is known.
|
| 163805 |
30-Oct-2006 |
imp |
More fully support 64-bit bars. Prior to this commit, we supported
only those bars that had addresses assigned by the BIOS and where the
bridges were properly programmed. Now even unprogrammed ones work.
This was needed for sun4v. We still only implement up to 2GB memory
ranges, even for 64-bit bars. PCI standards at least through 2.2 say
that this is the max (or 1GB is, I only know it is < 32bits).
o Always define pci_addr_t as uint64_t. A pci address is always 64-bits,
but some hosts can't address all of them.
o Preserve the upper half of the 64-bit word during resource probing.
o Test to make sure that 64-bit values can fit in a u_long (true on some
platforms, but not others). Don't use those that can't.
o minor pedantry about data sizes.
o Better bridge resource reporting in bootverbose case.
o Minor formatting changes to cope with different data types on different
platforms.
Submitted by: jmg, with many changes by me to fully support 64-bit
addresses.
|
| 163546 |
20-Oct-2006 |
jmg |
fix tab indentation for CP and RV...
If the length is zero, catch this early, instead of making dflen go negative
and letting bad things happen... We also check to see if RV (checksum) is
0, and handle that has a checksum failure...
Properly handle checksum failures by not processing read-write VPD data,
and removing all the found read-only data...
Tested by: oleg (dflen going negative)
|
| 163256 |
12-Oct-2006 |
imp |
Remove redundant casts. The casts inside the macros should be
sufficient (or fixed if not).
|
| 163163 |
09-Oct-2006 |
jmg |
provide routines to access VPD data at the PCI layer...
remove sk's own implementation, and use the new calls to get the data...
Reviewed by: -arch
|
| 163055 |
06-Oct-2006 |
ru |
Actually make bounds checking for PCIOCREAD and PCIOCWRITE work.
|
| 162457 |
20-Sep-2006 |
jmg |
spell PCIS_CRYPTO_ENTERTAIN properly...
MFC after: 3 days
|
| 160964 |
04-Aug-2006 |
yar |
Commit the results of the typo hunt by Darren Pilgrim.
This change affects documentation and comments only,
no real code involved.
PR: misc/101245
Submitted by: Darren Pilgrim <darren pilgrim bitfreak org>
Tested by: md5(1)
MFC after: 1 week
|
| 160312 |
12-Jul-2006 |
jhb |
Simplify the pager support in DDB. Allowing different db commands to
install custom pager functions didn't actually happen in practice (they
all just used the simple pager and passed in a local quit pointer). So,
just hardcode the simple pager as the only pager and make it set a global
db_pager_quit flag that db commands can check when the user hits 'q' (or a
suitable variant) at the pager prompt. Also, now that it's easy to do so,
enable paging by default for all ddb commands. Any command that wishes to
honor the quit flag can do so by checking db_pager_quit. Note that the
pager can also be effectively disabled by setting $lines to 0.
Other fixes:
- 'show idt' on i386 and pc98 now actually checks the quit flag and
terminates early.
- 'show intr' now actually checks the quit flag and terminates early.
|
| 159085 |
30-May-2006 |
imp |
Add a define for the Standard SD Host Controller Base Peripheral.
|
| 158881 |
24-May-2006 |
jhb |
Workaround a hang on some nForce2 systems that can happen if the CPU goes
into and out of the halt state very quickly.
Submitted by: Andriy Gapon <avg at icyb dot net dot ua>
MFC after: 1 week
|
| 158457 |
11-May-2006 |
jhb |
Fixup some comments to allow for the fact that PCI domains are not specific
to Alpha hoses.
|
| 158066 |
27-Apr-2006 |
marcel |
The size of I/O ranges can be anything from 16 bytes to 2G bytes.
Lower the minimum for memory mapped I/O from 32 bytes to 16 bytes.
This fixes bus enumeration on ia64 now that the Diva auxiliary
serial port is attached to.
|
| 157949 |
21-Apr-2006 |
jkim |
Free allocated environment variables after use.
Coverity ID: 366
Found by: Coverity Prevent
|
| 155186 |
01-Feb-2006 |
jhb |
Don't add an agp child in vgapci's attach routine if the PCIY_AGP
capability is present as not all devices supported by the agp_i810 driver
(such as i915) have the AGP capability. Instead, add an identify routine
to the agp_i810 driver that uses the PCI ID to determine if it should
create an agp child device.
|
| 154599 |
20-Jan-2006 |
jhb |
Make the 'pci_devclass' pointer variable private (drivers really shouldn't
share devclass pointers, a mistake I've encouraged in the past) and
move the declaration of the pci_driver kobj class from cardbus.c to
pci_private.h so that other drivers can inherit from pci_driver.
|
| 154079 |
06-Jan-2006 |
jhb |
- Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all the
various pcib drivers to use their own private devclass_t variables for
their modules.
- Use the DEFINE_CLASS_0() macro to declare drivers for the various pcib
drivers while I'm here.
|
| 153956 |
01-Jan-2006 |
imp |
Use __HAVE_ACPI and __PCI_REROUTE_INTERRUPT as appropriate rather than
the complicated #ifdefs.
|
| 153954 |
01-Jan-2006 |
imp |
Remove left-over #ifdef alpha routines. They aren't used by any of
our drivers, and don't appear to be necessary for GENERIC and LINT on
the alpha. They don't belong in a MI header anyway...
|
| 153948 |
01-Jan-2006 |
imp |
Remove stray debug from p4 integration.
|
| 153906 |
30-Dec-2005 |
imp |
Make RID2BAR actually return a number that can be plugged into PCIR_BAR()
rather than a bitmask.
Submitted by: ru@
|
| 153899 |
30-Dec-2005 |
imp |
Remove debug now that I've looped back the big changes into my p4 tree.
|
| 153898 |
30-Dec-2005 |
imp |
Expose pci_add_resources to the outside world, add a 'force' flag to
force allocation of unallocated BARs (cardbus uses this to preallocate
everything). Add a prefetchmask to allow for busses that get prefetch
hints to set them. Addjust pci_add_map and pci_ata_maps to take a new
force flag which pci_add_resources will pass in. Implement 'force' in
pci_add_map. Write new value of allocated resource into the bar, if
the allocation succeeded (we should have done this before, but with
the new force the bug was very obvious).
|
| 153861 |
29-Dec-2005 |
imp |
Add a macro to map from BAR to rid # (inverse of PCIR_BARS).
|
| 153646 |
22-Dec-2005 |
jhb |
Return BUS_PROBE_GENERIC rather than 0 in the probe routine.
Requested by: marius
|
| 153577 |
20-Dec-2005 |
jhb |
Add a vgapci(4) stub device driver for VGA PCI devices. This device serves
as a bus so that other drivers such as drm(4), acpi_video(4), and agp(4)
can attach to it thus allowing multiple drivers for the same device. It
also removes the need for the drmsub hack for the i8[13]0/i915 drm and agp
drivers.
|
| 153570 |
20-Dec-2005 |
jhb |
Move the hostb driver out of the i386 and amd64 PCI code (where it was
duplicated anyways) and into a single MI driver. Extend the driver a bit
to implement the bus and PCI kobj interfaces such that other drivers can
attach to it and transparently act as if their parent device is the PCI
bus (for the most part).
|
| 153560 |
20-Dec-2005 |
jhb |
Add a new method PCI_FIND_EXTCAP() to the pci bus interface that is used
to search for a specific extended capability. If the specified capability
is found for the given device, then the function returns success and
optionally returns the offset of that capability. If the capability is
not found, the function returns an error.
|
| 152218 |
09-Nov-2005 |
imp |
Improve diagnostic message.
|
| 151847 |
29-Oct-2005 |
imp |
MFp4: When doing lazy allocation, it turns out that we need to record the
actual resource values we received from the system rather than the range
we requested. Since we request a range starting at 0, we would record
that number. Later, since this == 0, we'd allocate again. However,
we wouldn't write the new resource into the BAR. This resulted in
a resource leak as well as a BAR that couldn't access the resource at
all since rman_get_start, et al, were wrong.
MFC After: 1 week (assuming RELENG_6 is open for business)
|
| 151846 |
29-Oct-2005 |
imp |
Use symbolic name rather thanhard coding the cap pointer offset for
type two devices.
|
| 151788 |
28-Oct-2005 |
imp |
Add PCIM_BIOS_ADDR_MASK too
|
| 151787 |
28-Oct-2005 |
imp |
Some cardbus CIS definitions moved here since they are PCI registers.
|
| 151786 |
28-Oct-2005 |
imp |
Minor style(9) nitage.
|
| 151645 |
25-Oct-2005 |
wpaul |
Add a 1 microsecond delay in pci_add_children(), right before the read
of the PCIR_HDRTYPE register. It's the value returned from this
read access that determines whether or not we decide a device is
present at the current slot index. For some reason that I can't
adequately explain, this read fails on my machine when probing the
USB controller on my machine (which happens a multifunction device
at slot index 3 hung off the PCI-PCI bridge on the AMD8111 (bus
index 1)). The read will return 0xFF even though it should return
0x80 to indicate the presence of a multifunction device.
As near as I can tell, there's some timing issue involved with reading
the 'dead' slot indexes 0 through 2 that causes the read of the actual
device at slot 3 to fail. I tried a couple of different tricks to
correct the problem (the patch to amd64/pci/pci_cfgreg.c fixes it
for the amd64 arch), but adding this delay is the only thing that
always allows the USB controllers to be correctly probed 100% of the
time. Whatever the problem is, it's likely confined to the AMD8111
chipset. However, a simple 1us delay is fairly harmless and should
have no side effects for other hardware. I consider this to be
voodoo, but it's fairly benign voodoo and it makes my USB keyboard
and mouse work again.
Note that this is the second time that I've had to resort to a
1us delay to fix a PCI-related problem with this AMD8111/Opteron
system (the first being a fix I made a while back to the NDISulator).
It's possible the delay really belongs in the cfgreg code itself,
or that pci_cfgreg needs some custom hackery for an errata in the
8111. (I checked but couldn't find any documented errata on AMD's
site that could account for these problems.)
|
| 150715 |
29-Sep-2005 |
jhb |
- Consolidate duplicated code for assigning interrupts to PCI devices via
routing, etc. in a static pci_assign_interrupt() function.
- Add a sledgehammer that allows the user to override the interrupt
assignment of any PCI device via a tunable (e.g. "hw.pci0.7.INTB=5" would
force any functions on the pci device in slot 7 of bus 0 that use B# to
use IRQ 5). This should be used with great caution! Generally, if the
interrupt routing in use provides specific tunables (such as hard-wiring
the IRQ for a given $PIR or ACPI PCI link device), then those should be
used instead. One instance where this tunable might be useful is if a
box has an MPTable with duplicate entries for the same PCI device with
different IRQs.
MFC after: 1 week
|
| 150714 |
29-Sep-2005 |
jhb |
Don't save and restore the ELCR register across suspend and resume for
the Intel 82371AB PCI-ISA bridge. We now do this all the time for the
!APIC case in the atpic driver. This cuts the raw line count for this
driver by about 40%.
MFC after: 1 week
|
| 150430 |
21-Sep-2005 |
imp |
Split power state control into two variables. hw.pci.do_powerstate
has been removed. It has been replaced by hw.pci.do_power_nodriver
and hw.pci.do_power_resume. The former defaults to 0 while the latter
defaults to 1.
When do_powerstate was set to 0, it broke suspend/resume for a lot of
people as an unintended consequence. This change will only affect the
areas that were intended to affect. This change will have no effect on
servers, but will help laptops quite a bit.
MFC After: 3 days.
|
| 149974 |
11-Sep-2005 |
imp |
Change hw.pci.do_powerstate from a boolean to a range. 0 means the
same as today: do no power management. 1 means be conservative about
what you power down (any device class that has caused problems gets
added here). 2 means be agressive about what gets powered down (any
device class that's fundamental to the system is here). 3 means power
them all down, reguardless. The default is 1.
The effect in the default system is to add mass storage devices to the
list that we don't power down. From all the pciconf -l lists that
I've seen for the aac and amr issue, the bad device has been a mass
storage device class.
This is an attempt at a compromise between the very small number of
systems that have extreme issues with powerdown, and the very large
number of systems that gain real benefits from powerdown (I get about
20% more battery life when I attach a minimal set of drivers on my
Sony). Hopefully it will strike the proper balance.
MFC After: 3 days (before next beta)
|
| 149972 |
11-Sep-2005 |
imp |
Allow one to access the cached values for CMDREG, CACHELNSZ, MINGNT,
MAXLAT and LATTIMER.
Improve error message when a bogus RID type is requested for a bar.
|
| 149776 |
03-Sep-2005 |
imp |
More consistantly return the correct BAR size. Before, we'd only
return the correct bar size if we encountered a 64-bit BAR that had
its resources already assigned. If the resources weren't yet
assigned, we'd bogusly assume it was a 32-bit bar and return 1.
|
| 149693 |
01-Sep-2005 |
jhb |
Typo in comment.
|
| 149686 |
01-Sep-2005 |
imp |
Treat resources that are 0xfffff.... as being 'unassigned'.
Reviewed by: jhb
Tested by: Mark Kirkwood
MFC After: 3 days
|
| 149521 |
26-Aug-2005 |
jkim |
fix CardBus issue for Compaq R3000 series laptop
Approved by: anholt (mentor)
|
| 149478 |
26-Aug-2005 |
ps |
For FreeBSD 4 binaries, when trying to read from a device that does
not exsist, do not have ioctl return an error, but instead set -1
in the data returned to the user. This allows the HP bios flash
utilities to work without requiring changes to their code.
Reviewed by: jhb
|
| 147033 |
05-Jun-2005 |
imp |
As threatened by BURN_BRIDGES, restire PCIR_MAPS and PCIR_HEADERTYPE
|
| 146947 |
03-Jun-2005 |
imp |
Mask off the bar's value after the probe test write before testing
against 0 in pci_alloc_map, just like we do in pci_add_map. Also,
make sure that we restore the value to the BAR that was there before
if the bar is 0. Chances are that it was 0 before the write too and
that the restoration is a nop, but better safe than sorry.
Notice by: dwhite
|
| 146868 |
01-Jun-2005 |
jhb |
Typo.
Submitted by: njl
|
| 146845 |
31-May-2005 |
jhb |
Don't enable I/O or memory mode in a device's command register if the BAR
we are processing has a base address of zero. Note that this will only
change behavior for devices where all the BARs of a given type have a base
address of 0 since we will enable the appropriate access when we encounter
the first BAR with a base that is not 0. Specifically, this allows certain
Toshiba laptops to no longer require 'hw.pci.enable_io_modes=0' to avoid
hangs during boot.
PR: kern/20040
PR: i386/63776 (possibly)
PR: i386/68900 (possibly)
PR: i386/74532 (possibly)
MFC after: 1 week
|
| 145661 |
29-Apr-2005 |
imp |
Add a detach for pci bridge and pci bus drivers. This allows one to
theoretically unload pci bridges or pci drivers. It will also allow
detach to work if one needed to detach a subtree.
This is inspired by looking at the p4 commits from bms to his 5.4
tree, but I didn't look at the final results.
|
| 145652 |
29-Apr-2005 |
marcel |
In pcib_alloc_resource() check if the resource allocation request is
for the VGA I/O or memory ranges, when it's not within the default
ranges decoded by the bridge. When allocation for VGA addresses is
attempted, check that the bridge has the VGA Enable bit set before
allowing it.
As such, newbusified VGA drivers can allocate their resources when
the VGA adapter is behind a PCI-to-PCI bridge.
Reviewed by: imp@, jhb@
|
| 145651 |
29-Apr-2005 |
marcel |
Add pci_is_vga_ioport_range() and pci_is_vga_memory_range() as inline
functions. These functions centralize the details of which I/O port
and memory ranges belong to VGA.
Reviewed by: imp@, jhb@
|
| 145650 |
29-Apr-2005 |
marcel |
Add defines for the Bridge Control Register bits.
Obtained from: jhb@
|
| 145079 |
14-Apr-2005 |
jhb |
Call pci_print_verbose() before pci_add_resources() so that the order of
printf's during a verbose boot is more intuitive (the BAR listings and
interrupt routing info now comes after the config header dump rather than
just before it).
|
| 145026 |
13-Apr-2005 |
imp |
Fix compile error :-(.
|
| 145022 |
13-Apr-2005 |
bms |
Use pci_find_bsf() to retrieve the PCI device associated with
a bus/device/function tuple.
This change enables pciconf(8) to work with CardBus devices.
Reviewed by: imp
|
| 145019 |
13-Apr-2005 |
imp |
Default to a interrupt router that returns an invalid interrupt.
Otherwise, busses that implement the pcib interface that forget to
implement pcib_route_interrupt would return EIO, which the caller
interprets as 'use interrupt 6'. This is likely the cause of much of
the grief that we had when I enabled power modes for the cardbus
bridge, since the card needed to reroute the interrupt to it and it
was getting 6 which was d by the pccbb sanity checks.
|
| 144890 |
11-Apr-2005 |
imp |
It isn't a whinable offence to want memory when the bar says ioport.
Put that behind bootverbose to make the ata driver less chatty on
advanced hardware.
Requested by: sos
|
| 144887 |
10-Apr-2005 |
imp |
Go ahead and try to allocate PCI_BAR(5) for ata devices.
|
| 144511 |
01-Apr-2005 |
jmg |
fix misspelling of 0x30...
Spotted by: reviewing MFC commit
|
| 144492 |
01-Apr-2005 |
jmg |
move the statement about switching power states to just before we do it, so
we don't print a false statement if the destination powerstate is
unsupported...
|
| 144162 |
26-Mar-2005 |
jmg |
fix a copy/paste typo for scanner/gameport...
Spotted by: Michal Mertl <mime@traveller.cz>
|
| 144156 |
26-Mar-2005 |
jmg |
add some additional pci classes and sub-classes..
Reviewed by: imp (almost 6 months ago)
|
| 144110 |
25-Mar-2005 |
jhb |
Add code to read the primary PCI bus number out of the Compaq/HP 6010
hotplug Host to PCI bridge. This is only needed for the non-ACPI case
as the BIOS includes a proper _BBN method in ACPI.
|
| 144038 |
23-Mar-2005 |
jmg |
relocate the power state transition statements to the
pci_set_powerstate_method function...
Reviewed by: imp
MFC after: 1 week
|
| 143785 |
18-Mar-2005 |
imp |
Use STAILQ in preference to SLIST for the resources. Insert new resources
last in the list rather than first.
This makes the resouces print in the 4.x order rather than the 5.x order
(eg fdc0 at 0x3f0-0x3f5,0x3f7 is 4.x, but 0x3f7,0x3f0-0x3f5 is 5.x). This
also means that the pci code will once again print the resources in BAR
ascending order.
|
| 143669 |
15-Mar-2005 |
imp |
If bus_generic_susped returns an error, devlist is not freed. Free it.
Submitted by: Ted Unangst (using the Coverity Prevent analysis tool)
|
| 142735 |
28-Feb-2005 |
imp |
Expose pci_cfg_safe/restore for subclasses of pci to use.
|
| 142715 |
27-Feb-2005 |
phk |
Use dynamic major number allocation.
|
| 142524 |
25-Feb-2005 |
sam |
kill unused variable
Noticed by: Coverity Prevent analysis tool
|
| 142051 |
18-Feb-2005 |
imp |
For the I/O port case, we need to set ok to 1 if we have what looks
like a valid range. We already do this in the memory case (although
the code there is somewhat different than the I/o case because we have
to deal with different kinds of memory). Since most laptops don't
have non-subtractive bridges, this wasn't seen in practice.
Evidentally the Compaq R3000 hits this problem with PC Cards.
Some minor style fixes while I'm here.
Submitted by: Jung-uk Kim
|
| 141426 |
07-Feb-2005 |
ticso |
Enable interrupt routing as first choice on alpha.
The alpha default handler knows how to trigger a fallback.
|
| 140971 |
29-Jan-2005 |
njl |
Fix typo.
|
| 139749 |
06-Jan-2005 |
imp |
Start each of the license/copyright comments with /*-, minor shuffle of lines
|
| 139532 |
31-Dec-2004 |
imp |
Fix last second typos that crept in :-(.
|
| 139505 |
31-Dec-2004 |
imp |
Implement mimimum system software delays, per PCI PM 1.1 spec, as
suggested by Peter Edwards. This seems to fix my fxp problems and
likely will fix his as well. Use DELAY rather than *sleep because we
can be called from any context.
|
| 138537 |
08-Dec-2004 |
imp |
Fix comments to match last commit, and minor reformatting...
|
| 138536 |
08-Dec-2004 |
imp |
It turns out that a lot of newer systems have 'base peripherals' on
the PCI bus. We presently have no drivers for these devices, so they
are powered down. This is undesirable behavior since it breaks the
system when the base peripherals go away suddenly in the middle of
boot.
# if we ever get generic drivers for memory and/or base peripherals, then
# we can remove the tests here.
|
| 138338 |
03-Dec-2004 |
njl |
ACPI is not on pc98 either.
Informed by: nyan
|
| 138336 |
03-Dec-2004 |
njl |
Non-x86 platforms cannot use the ACPI includes. This should be fixed but
for now, only include the headers for i386, amd64, or ia64.
Pointed out by: grehan
|
| 138306 |
02-Dec-2004 |
njl |
Turn ACPI and PCI devices off or to a lower power state in suspend and
back on again in resume. Override the default of D3 with the value the
BIOS specifies in _SxD, if present. Skip serial devices (PNP05xx) since
they seem to hang when set to D3 and may require special driver support.
Also, skip non-type 0 PCI devices (i.e., bridges) since our we don't yet
save/restore their config space and that seems to be necessary.
If this gives you trouble with suspend/resume, you can disable the new
ACPI and PCI power behavior separately with these tunables & sysctls:
debug.acpi.do_powerstate
hw.pci.do_powerstate
Approved by: imp (pci)
Tested by: acpi@ (numerous)
|
| 137494 |
10-Nov-2004 |
imp |
Make pci_do_powerstate default to 1 now that we've done the release to
get more testing. This should help things a little.
|
| 137117 |
01-Nov-2004 |
jhb |
- Change the ddb paging "support" to use a variable (db_lines_per_page) to
control the number of lines per page rather than a constant. The variable
can be examined and changed in ddb as '$lines'. Setting the variable to
0 will effectively turn off paging.
- Change db_putchar() to force out pending whitespace before outputting
newlines and carriage returns so that one can rub out content on the
current line via '\r \r' type strings.
- Change the simple pager to rub out the --More-- prompt explicitly when
the routine exits.
- Add some aliases to the simple pager to make it more compatible with
more(1): 'e' and 'j' do a single line. 'd' does half a page, and
'f' does a full page.
MFC after: 1 month
Inspired by: kris
|
| 136499 |
14-Oct-2004 |
green |
Fix a spelling error in a panic string.
|
| 135677 |
23-Sep-2004 |
cognet |
Re-route interrupts on arm as well.
|
| 131459 |
02-Jul-2004 |
imp |
Disable native ata support for now, too much breaks
|
| 131398 |
01-Jul-2004 |
jhb |
Trim a few things from the dmesg output and stick them under bootverbose to
cut down on the clutter including PCI interrupt routing, MTRR, pcibios,
etc.
Discussed with: USENIX Cabal
|
| 131288 |
29-Jun-2004 |
sos |
Update the special handling code for ATA devices to allow usage of
PCI native addressing. That means that if the HW says that using "real"
addresses instead of the hardwired legacy compat ones is allowed, we will
use them.
|
| 130585 |
16-Jun-2004 |
phk |
Do the dreaded s/dev_t/struct cdev */
Bump __FreeBSD_version accordingly.
|
| 129879 |
30-May-2004 |
phk |
Add missing <sys/module.h> includes
|
| 129876 |
30-May-2004 |
phk |
Add some missing <sys/module.h> includes which are masked by the
one on death-row in <sys/kernel.h>
|
| 129669 |
24-May-2004 |
imp |
Use PCI_BAR() in preference to PCI_MAPS + x * 4.
Submitted by: jhb
|
| 129664 |
24-May-2004 |
imp |
Do not write to those config registers that are unambiguously defined
in the various pci specifications as readonly. vendor, subvendor,
device and subdevice are required to be loaded in hardware by some
means that isn't the system BIOS or other system software (although
some devices do have ways of accomplishing this). class and subclass
are defined to be read-only in section 6.2.1 (v2.2). Apart from the
status register, which we weren't touching, these are the only
read-only registers I could find in the 2.2 spec.
progif is also defined as being read-only in section 6.2.1. However,
the PCI IDE programming document specifically states that some of the
bits are read/write. Since we may have to restore registers before we
have a driver attached, go ahead and restore this one byte when
transitioning between D3 and D0.
The PCI spec also says that writes to reserved and unimplemented
registers must be completed normally. It makes no statements about
writes to read-only registers, so be as conservative as possible,
while covering the exception to the rule that is documented in a
subpart of the standard.
Requested by: socttl
|
| 129555 |
21-May-2004 |
imp |
Fix cutNpasto in last commit.
|
| 129546 |
21-May-2004 |
imp |
ifdef writing to registers that the base pci standard says are
read-only on D3->D0 power state transition. Add a define to enable
them, but include a comment to contact me if there's a problem.
|
| 129538 |
21-May-2004 |
imp |
Compeletely rewrite the description of hw.pci.do_powerstate to sound
better.
|
| 129537 |
21-May-2004 |
imp |
Improve the English somewhat.
Prodded by: ru@
|
| 129536 |
21-May-2004 |
imp |
Ooops, forgot to commit the updated definition for hw.pci.do_powerstate
when I committed code that changed its meaning.
|
| 129535 |
21-May-2004 |
imp |
MFp4:
Split the baby. For idepci devices, now both legacy mode bits need
not be set. We can run an idepci in a split mode. However, it only
works better than before, not works. It works better in that when one
device is legacy and the other isn't and disabled, we now operate
correctly.
sos submitted a version of this patch.
|
| 129534 |
21-May-2004 |
imp |
Move pci_do_powerstate up a level. Now it just means 'do not turn devices
off into d3 state when there's no driver for the device'. This should
help suspend/resume in the default case.
|
| 129533 |
21-May-2004 |
imp |
MFp4: o save/restore subvendor, subdevice, vendor, device, baseclass,
subclass, progif and revid. While these are typically read
only fields, they aren't always read-only. progif is writable
for ata devices, for example. It does no harm when they are
read only, and helps when they aren't.
|
| 129530 |
21-May-2004 |
imp |
make the pci power state and resource code a lot less chatty. The
chattiness was left in for debugging, but now that nearly all of the
problems relating to the changes have been fixed, it is only annoying. It
is still available via bootverbose.
Prodded by: jhb
|
| 128715 |
28-Apr-2004 |
tmm |
Remove the EBus stopgap of r1.248; a proper fix is in place now.
|
| 128652 |
26-Apr-2004 |
imp |
Fix two typos from PR: 65694
1) In pci.c, we need to check the child device's state, not the parent
device's state.
2) In acpi_pci.c, we have to run the power state change after the acpi
method when the old_state is > new state, not the other way around.
Submitted by: Dmitry Remesov
PR: 65694
|
| 128579 |
23-Apr-2004 |
marius |
Add a stopgap for the EBus breakage on sparc64 since the PCI code does
resource pre-allocation. The problem is that the BARs of the EBus bridges
contain the ranges for the resources for the EBus devices beyond the bridge.
So when the EBus code tries to allocate the resource for an EBus device
it's already allocated by the PCI code.
To be removed again as soon as we have a proper solution in the EBus Code.
Reviewed by: tmm
Approved by: marcel (mentor)
|
| 128534 |
21-Apr-2004 |
imp |
ata devices in legacy are special, and we must treat them as such.
While I would have prefered to have a solution that didn't move
knowledge of this into the pci layer. However, this is literally the
only exception that's listed in the PCI standard to the usual way of
decoding BARs. atapci devices in legacy mode now ignore the first 4
bars and hard code the values to the legacy ide values (well, for each
of the controllers that are in legacy mode). The 5th bar is handled
normally.
Remove the zero bar handling. zero bars should be ignored at all
other times, and since we handle that specially, we don't need the
older workaround.
|
| 128498 |
20-Apr-2004 |
sos |
Do not pre-allocate resources for BAR's on ATA MASTERDEV's thats on
the standard ATA primary and secondary addresses.
Reintroduce the size 1 ALTIO space so that we can have both ATA and
floppies back working.
|
| 128318 |
16-Apr-2004 |
imp |
ooops. I disabled pci_enable_io_modes not pci_do_powerstate in the last
commit. That was in error.
Noticed by: sos
|
| 128301 |
16-Apr-2004 |
imp |
make the bad bar warning less scary, and toss it behind a bootverbose.
It is harmless, but freaking people out.
|
| 128300 |
16-Apr-2004 |
imp |
Turn off the power stuff for a little while longer. There appears to be
something subtle wrong with it.
|
| 128250 |
14-Apr-2004 |
imp |
Now that the dust has settled on the resource issues, turn on the
power parts of my patches and see what breaks. Don't (yet) throw
the chatty messages behind a if (bootverbose).
|
| 128198 |
13-Apr-2004 |
imp |
Some devices have what appear to be invalid BARs. They are invalid in
the sense that any write to them reads back as a 0. This presents a
problem to our resource allocation scheme. If we encounter such vars,
the code now treats them as special, allowing any allocation against
them to succeed. I've not seen anything in the standard to clearify
what host software should do when it encounters these sorts of BARs.
Also cleaned up some output while I'm here and add commmented out
bootverbose lines until I'm ready to reduce the verbosity of boot
messages.
This gets a number of south bridges and ata controllers made mostly by
VIA, AMD and nVidia working again. Thanks to Soren Schmidt for his
help in coming up with this patch.
|
| 128107 |
11-Apr-2004 |
imp |
Add system tunable to turn off power state changes. Default to off until
we get the resource allocation stuff hammered out.
Fix and off by one error that caused unnecessary filtering of valid
BARs for only 4 bytes than ICH3 and other PCI IDE controllers have.
Andrew Gallatin submitted this, although it doesn't solve the problems
ICH3 controllers have with the new code, it does restore the former
resource list on the probe line.
|
| 128075 |
09-Apr-2004 |
imp |
Only print state change message for real state changes. When we set a
device in D0 to D0, that's a no-op, however the messages seem to be
confusing some people. Eventually, these messages will be parked
behind a if (bootverbose).
# I don't think this will fix any real bugs...
|
| 128058 |
09-Apr-2004 |
imp |
Omnibus PCI commit:
o Save and restore bars for suspend/resume as well as for D3->D0
transitions.
o preallocate resources that the PCI devices use to avoid resource
conflicts
o lazy allocation of resources not allocated by the BIOS.
o set unattached drivers to state D3. Set power state to D0
before probe/attach. Right now there's two special cases
for this (display and memory devices) that need work in other
areas of the tree.
Please report any bugs to me.
|
| 128019 |
07-Apr-2004 |
imp |
Remove advertising clause from University of California Regent's
license, per letter dated July 22, 1999 and email from Peter Wemm,
Alan Cox and Robert Watson.
Approved by: core, peter, alc, rwatson
|
| 127135 |
17-Mar-2004 |
njl |
Convert callers to the new bus_alloc_resource_any(9) API.
Submitted by: Mark Santcroos <marks@ripe.net>
Reviewed by: imp, dfr, bde
|
| 126080 |
21-Feb-2004 |
phk |
Device megapatch 4/6:
Introduce d_version field in struct cdevsw, this must always be
initialized to D_VERSION.
Flip sense of D_NOGIANT flag to D_NEEDGIANT, this involves removing
four D_NOGIANT flags and adding 145 D_NEEDGIANT flags.
|
| 124641 |
17-Jan-2004 |
imp |
It appears that the changes in the resources allocated is causing much
pain and suffering. Attempt to back it out by removing the 'if the
requested range is larger than the window, clip to the window' code.
This is a band-aide until the issues are better understood and the
issues with the lazy allocation patches are resolved.
|
| 124365 |
11-Jan-2004 |
imp |
Add support for subtractive decoding bridges. These bridges pass all
signals to addresses to the child busses. Typically, ProgIf of 1
means a subtractive bridge. However, Intel has a whole lot of ones
with a ProgIf of 80 that are also subtractive. We cope with these
bridges too. This eliminates hw.pci.allow_unsupported_io_range
because that had almost the same effect as these patches (almost means
'buggy'). Remove the bogus checks for ISA bus locations: these cycles
aren't special and are only passed by transparent bridges.
We allow any range to succeed. If the range is a superset of the
range that's decoded, trim the resource to that range. Otherwise,
pass the range unchanged. This will change the location that PC Card
and CardBus cards are attached. This might bogusly cause some
overlapping allocation that wasn't present before, but the overlapping
fixes need to be in the pci level.
There's also a few formatting changes here.
|
| 124356 |
11-Jan-2004 |
imp |
MF-p4/diff reduction:
Eliminate trailing blank line in this file.
|
| 123794 |
24-Dec-2003 |
imp |
Minor whitespace changes to conform better to stlye(9) and reduce diffs
with uncommitted changes I have in p4.
|
| 122849 |
17-Nov-2003 |
peter |
Initial landing of SMP support for FreeBSD/amd64.
- This is heavily derived from John Baldwin's apic/pci cleanup on i386.
- I have completely rewritten or drastically cleaned up some other parts.
(in particular, bootstrap)
- This is still a WIP. It seems that there are some highly bogus bioses
on nVidia nForce3-150 boards. I can't stress how broken these boards
are. I have a workaround in mind, but right now the Asus SK8N is broken.
The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed.
- Most of my testing has been with SCHED_ULE. SCHED_4BSD works.
- the apic and acpi components are 'standard'.
- If you have an nVidia nForce3-150 board, you are stuck with 'device
atpic' in addition, because they somehow managed to forget to connect the
8254 timer to the apic, even though its in the same silicon! ARGH!
This directly violates the ACPI spec.
|
| 121988 |
03-Nov-2003 |
jhb |
Enable PCI interrupt routing for i386 SMP kernels.
|
| 121858 |
01-Nov-2003 |
dfr |
Make the cardbus driver a derived class of the pci driver. In theory, this
should allow many of the pci methods to be re-staticised.
|
| 121307 |
21-Oct-2003 |
silby |
Change all SYSCTLS which are readonly and have a related TUNABLE
from CTLFLAG_RD to CTLFLAG_RDTUN so that sysctl(8) can provide
more useful error messages.
|
| 121013 |
11-Oct-2003 |
se |
The code that was meant to test alignment of the register offset
parameter in the read and write case dereferenced an unitialized
pointer and can't possibly ever have catched an actual invalid
argument.
This was apparently true for the read/write and getconf cases. The
latter does not even receive the paramter that is to be verified.
I'm surprised that this did not cause kernel panics, but it seems
that the uninitialized local variable happens to contain data that
may be used as a pointer to memory that satisfies the test condition.
Make the code work as intended by moving the test inside the switch
case where the pointer has been properly initialized.
Since the read and write case shared just about all code (except
for the single call to PCIB_READ_CONFIG resp. PCIB_WRITE_CONFIG) I
have merged both cases.
Noticed by: trhodes@FreeBSD.org (Tom Rhodes)
|
| 120155 |
17-Sep-2003 |
iwasaki |
Add pci_resume() to reestablish interrupt routing after
suspend/resume.
Especially after hibernation, interrupt routing went back to initial
status on some machines.
|
| 120063 |
14-Sep-2003 |
scottl |
Teach the PCI code to parse MSI extended capabilities. Re-arrange the
pcicfg struct a bit to hold extcap structures instead of structure members.
|
| 120055 |
14-Sep-2003 |
scottl |
Expand the extended capabilities list and add definitions for MSI.
|
| 120051 |
14-Sep-2003 |
scottl |
Remove most of the magic constants from the extcap parsing code.
|
| 119722 |
03-Sep-2003 |
jhb |
Bring back PCIR_HEADERTYPE as an alias for PCIR_HDRTYPE under BURN_BRIDGES
for backwards compat. The old name will be gone in 6.0, but will be
around in 5.x. This will help unbreak 3rd party code, e.g. the nvidia
DRM module.
|
| 119719 |
03-Sep-2003 |
jhb |
Replace another instance of PCIR_MAPS with PCIR_BAR(x).
Reminded by: dfr
|
| 119690 |
02-Sep-2003 |
jhb |
Use PCIR_BAR(x) instead of PCIR_MAPS.
Glanced over by: imp, gibbs
Tested by: i386 LINT
|
| 119689 |
02-Sep-2003 |
jhb |
- Deprecate PCIR_MAPS under BURN_BRIDGES (meaning it will be gone in 6.0)
and replace it with the more intuitive name PCIR_BARS.
- Add a PCIR_BAR(x) macro that returns the config space register offset of
the 32-bit BAR x.
MFC after: 3 days
|
| 119656 |
01-Sep-2003 |
dfr |
Don't try to enable io or memory access for non-standard resource
addresses. This stops resource allocations for e.g. amdpm failing - this
has its own special ways of enabling access.
|
| 119539 |
28-Aug-2003 |
jhb |
- Rename PCIx_HEADERTYPE* to PCIx_HDRTYPE* so the constants aren't so long.
- Add a new PCIM_HDRTYPE constant for the field in PCIR_HDRTYPE that holds
the header type.
- Replace several magic numbers with appropriate constants for the header
type register and a couple of PCI_FUNCMAX.
- Merge to amd64 the fix to the i386 bridge code to skip devices with
unknown header types.
Requested by: imp (1, 2)
|
| 119538 |
28-Aug-2003 |
jhb |
Add constants for capability IDs and header types.
Submitted by: Samy Al Bahra <samy@kerneled.com>
|
| 119418 |
24-Aug-2003 |
obrien |
Use __FBSDID().
Also some minor style cleanups.
|
| 119285 |
22-Aug-2003 |
imp |
Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
|
| 119266 |
22-Aug-2003 |
imp |
Prefer the uintXX_t to the u_intXX_t names.
|
| 118327 |
01-Aug-2003 |
imp |
Define PCI_MAXHDRTYPE to be 2. We know about header types 0, 1 and 2.
Update the MI device scanning code to use PCI_MAXHDRTYPE rather than
the hard coded 2.
|
| 118269 |
31-Jul-2003 |
jhb |
Update the 'ps', 'show pci', and 'show ktr' ddb commands to use the new
pager callout instead of homerolling their own paging facility.
|
| 117337 |
08-Jul-2003 |
jhb |
- Make the isab devclass global to allow for multiple ISA bridge drivers.
- Factor out code common to all ISA bridge drivers attach methods into a
isab_attach() function.
- Rename the PCI-ISA bridge driver's attach function to pci_isab_attach()
and have it call isab_attach().
|
| 117115 |
01-Jul-2003 |
tmm |
Add a new PCI interface method, assign_interrupt, to determine the
interrupt to be used for a device. This is intended solely for internal
use of PCI bus implementations, and exists so that PCI bus drivers
implementing special interrupt assignment methods which require
additional work at the bus level to work right can be easily derived
from the generic driver (or any other one) without resorting to hacks.
It will be used in the sparc64 ofw_pcibus driver, which will be
committed shortly.
Make use of this method in the generic implementation, and add it to
the method table of bus drivers derived from the PCI one.
Reviewed by: imp, -hackers
|
| 117113 |
01-Jul-2003 |
tmm |
Allow to write the intpin ivar using the pci_set_intpin() accessor. There
are some Sun PCI devices around which bogusly set intpin to 0, although
they use the intline mechanism; this allows the device driver to correct
that.
Reviewed by: imp
|
| 116704 |
23-Jun-2003 |
jmg |
prevent the number of patterns from exceeding the number of pci devices.
Submitted by: rwatson
|
| 116702 |
23-Jun-2003 |
jmg |
cleanup /dev/pci code some:
read permision only required for listing, read/write required for
read/write to registers
fix a possible memory leak
clean up error handling a bit
Reviewed by: silence
|
| 116670 |
22-Jun-2003 |
nyan |
Re-enabled PCI irq routing on pc98.
|
| 116661 |
22-Jun-2003 |
jmg |
use a REG macro that was already defined.
Reorder how the pci probing in handled. before adding devices, check to
see if the slot is a multi-function device to see if we should probe all
the functions.
Original idea by: imp
|
| 116104 |
09-Jun-2003 |
jhb |
When we re-route a PCI interrupt, write the new IRQ value into the intline
register.
Reviewed by: imp
|
| 116031 |
08-Jun-2003 |
nyan |
Don't route PCI irq on pc98.
|
| 115956 |
07-Jun-2003 |
jhb |
- Adjust the comment about re-routing PCI interrupts to be less
ia64-specific.
- When trying to re-route interrupts, don't change cfg->intline if the
re-route fails by returning an invalid vector. This fixes machines
without any way of routing interrupts such as older PC's without a
$PIR table.
We do not currently write the new intline value back to the hardware, but
we should. That will likely be added in a later commit.
|
| 115857 |
04-Jun-2003 |
jhb |
Batton down the hatches!!!
Always route PCI interrupts on i386 UP machines. I was planning to enable
this for i386 anyways once SMP support is done. Having this enabled fixes
problems on many people's laptops.
Requested by: imp
|
| 115551 |
31-May-2003 |
phk |
Remove unused variable(s).
Remove break after return;
Found by: FlexeLint
|
| 115234 |
22-May-2003 |
ticso |
Calculate routed interrupts using the slot number from the device and
not that of the bridge.
Approved by: re (jhb)
|
| 113906 |
23-Apr-2003 |
des |
Add constants for USB programming interfaces. These are already defined
(with other names) in the USB driver sources, but I felt that pcireg.h
should have a complete list - at least of classes and interfaces that we
know about and use.
|
| 113544 |
16-Apr-2003 |
mdodd |
Return status for PCI methods '{enable,disable}_{io,busmaster}'.
Reviewed by: imp
|
| 113527 |
15-Apr-2003 |
imp |
When the driver allocates memory or I/O ports, enable that bit in the
command config register. At the present, this represents a nop
because these bits should have been set earlier in the process. In
the future, we'll only set these bits when the driver requests the
resource, not when the bus code detects the resource.
Reviewed by: mdodd
|
| 111815 |
03-Mar-2003 |
phk |
Gigacommit to improve device-driver source compatibility between
branches:
Initialize struct cdevsw using C99 sparse initializtion and remove
all initializations to default values.
This patch is automatically generated and has been tested by compiling
LINT with all the fields in struct cdevsw in reverse order on alpha,
sparc64 and i386.
Approved by: re(scottl)
|
| 111695 |
01-Mar-2003 |
se |
Make /dev/pci use MAJOR_AUTO.
|
| 111119 |
19-Feb-2003 |
imp |
Back out M_* changes, per decision of the TRB.
Approved by: trb
|
| 111066 |
18-Feb-2003 |
imp |
Include class designation in pnpinfo for generic driver loading
|
| 111056 |
17-Feb-2003 |
imp |
Move the pnp and location info into the common pci bus. Make all known
pci busses implement this.
Also minor comment smithing in cardbus. Fix copyright to this year
with my name on it since I've been doing a lot to this file.
Reviewed by: jhb
|
| 111048 |
17-Feb-2003 |
imp |
These don't need to be semi-public after all.
|
| 110974 |
16-Feb-2003 |
imp |
Use rman_get_device rather than rle->resl->r_dev.
make pci_hdrtypedata and pci_read_extcap accessible (but maybe in the end
we'll make them private again).
|
| 109623 |
21-Jan-2003 |
alfred |
Remove M_TRYWAIT/M_WAITOK/M_WAIT. Callers should use 0.
Merge M_NOWAIT/M_DONTWAIT into a single flag M_NOWAIT.
|
| 109229 |
14-Jan-2003 |
benno |
Make the base pcib_route_interrupt method available to other pci-pci bridge
sub-classes.
This allows the powerpc kernel to build again.
Forgotten by: benno
Spotted by: grehan
|
| 107546 |
03-Dec-2002 |
imp |
Properly account for prefetchable memory when a request is being made.
We allow the request to go through if it matches either a prefetchable
or a non-prefetchable part of the bridge. We do not check to make
sure it is the right kind of memory because most drivers to not yet
properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not
entirely sure it does it right). RF_PREFETCHABLE was invented for
cardbus, so hasn't been properly documented yet.
This is still overridable by hw.pci.allow_unsupported_io_ranges, but
the need for that is greatly reduced, especially for the nvida driver.
Approved by: re
Reviewed by: jhb and many testers
Submitted by: Matt Emmerton (although this has been reworked somewhat)
|
| 107300 |
27-Nov-2002 |
imp |
Add a new cardbus specific ivar: PCI_IVAR_ETHADDR. Some pci-like
buses support querying the MAC address in a standard-for-that-bus way.
The base pci bus returns NULL for this IVAR always.
Submitted by: sam
Approved by: re (blanket for NEWCARD)
|
| 107248 |
25-Nov-2002 |
jhb |
Fix a couple of bugs in host_pcib_get_busno():
- If a PCI device is not present, then a 32-bit read_config() is going to
return 0xffffffff not 0xffff.
- For the 82454NX chipset, the MIOC that we read the bus numbers of the
various host-PCI bridges from is at function (slot) 0x10 not 0x0.
Approved by: re (rwatson)
|
| 107172 |
22-Nov-2002 |
jhb |
Add a function host_pcib_get_bnsno() that attempts to determine the bus
number of the child bus of a host to PCI bridge by reading from proprietary
configuration registers in the host to PCI bridge devices.
Approved by: re
|
| 106859 |
13-Nov-2002 |
mux |
Unbreak kernel build.
Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com>
|
| 106844 |
13-Nov-2002 |
mdodd |
Convert kernel compile option PCI_ALLOW_UNSUPPORTED_IO_RANGE to
a loader tunable hw.pci.allow_unsupported_io_range.
Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com>
Approved by: re (murray)
|
| 106843 |
13-Nov-2002 |
mdodd |
Staticize local variable.
Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com>
Obtained from: re (murray)
|
| 106219 |
30-Oct-2002 |
iedowse |
Save and restore the interrupt Edge/Level Control Registers (ELCR)
across system suspends on the Intel 82371AB PCI-ISA bridge. On a
Sony Vaio C1XD that I have, these registers are not set correctly
after an ACPI resume. The result is that after resuming, a shared
IRQ is left in edge-triggered mode so the interrupt can later become
jammed in a state where the line remains asserted, but the handler
is never called.
Reviewed by: jhb
|
| 105290 |
16-Oct-2002 |
jhb |
Whitespace.
|
| 104287 |
01-Oct-2002 |
bde |
Removed the only PCI_DEBUG ifdef in the kernel. PCI_DEBUG was not a
supported option and it disabled a whole 2 lines of bootverbose messages.
I wanted to see 1 of the messages (about the latency timers). This
is a wrong place to decode pci configurations, but the code is already
here and handles more details than pciconf(8).
|
| 104279 |
01-Oct-2002 |
phk |
The bus number is unsigned, it cannot be less than zero.
Found by: FlexeLint
|
| 104101 |
28-Sep-2002 |
phk |
Don't use GCC shorthand for ?: unless it really matters.
|
| 103042 |
06-Sep-2002 |
jhb |
Export pcib_attach() as a "protected" for use in subclasses of the PCI-PCI
bridge driver.
|
| 103016 |
06-Sep-2002 |
jhb |
Prefer the physical bus number of the PCI bus as the unit of the pciX
device created.
|
| 102977 |
05-Sep-2002 |
jhb |
Make the printf messages when routing interrupts more consistent in the
various PCI bridge drivers.
|
| 102921 |
04-Sep-2002 |
jhb |
Fix up a comment.
|
| 102919 |
04-Sep-2002 |
jhb |
- Make pci_load_vendor_data() static and do it during MOD_LOAD instead of
when the first PCI bus attaches.
- Create /dev/pci during MOD_LOAD as well.
- Destroy /dev/pci during MOD_UNLOAD (not that you can kldunload pci, but
might as well get the code right)
|
| 102511 |
28-Aug-2002 |
guido |
Add a new command: show pciregs, equivalent to pciconf -l
Reviewed by: Doug Rabson (quite some time ago)
MFC after: 1 week
|
| 102447 |
26-Aug-2002 |
jhb |
Overhaul the ACPI PCI bridge driver a bit:
- Add an ACPI PCI-PCI bridge driver (the previous driver just handled
Host-PCI bridges) that is a PCI driver that is a subclass of the generic
PCI-PCI bridge driver. It overrides probe, attach, read_ivar, and
pci_route_interrupt.
- The probe routine only succeeds if our parent is an ACPI PCI bus which
we test for by seeing if we can read our ACPI_HANDLE as an ivar.
- The attach routine saves a copy of our handle and calls the new
acpi_pcib_attach_common() function described below.
- The read_ivar routine handles normal PCI-PCI bridge ivars and adds an
ivar to return the ACPI_HANDLE of the bus this bridge represents.
- The route_interrupt routine fetches the _PRT (PCI Interrupt Routing
Table) from the bridge device's softc and passes it off to
acpi_pcib_route_interrupt() to route the interrupt.
- Split the old ACPI Host-PCI bridge driver into two pieces. Part of
the attach routine and most of the route_interrupt routine remain in
acpi_pcib.c and are shared by both ACPI PCI bridge drivers.
- The attach routine verifies the PCI bridge is present, reads in
the _PRT for the bridge, and attaches the child PCI bus.
- The route_interrupt routine uses the passed in _PRT to route a PCI
interrupt.
The rest of the driver is the ACPI Host-PCI bridge specific bits that
live in acpi_pcib_acpi.c.
- We no longer duplicate pcib_maxslots but use it directly.
- The driver now uses the pcib devclass instead of its own devclass.
This means that PCI busses are now only children of pcib devices.
- Allow the ACPI_HANDLE for the child PCI bus to be read as an ivar
of the child bus.
- Fetch the _PRT for routing PCI interrupts directly from our softc
instead of walking the devclass to find ourself and then fetch our
own softc.
With this change and the new ACPI PCI bus driver, ACPI can now properly
route interrupts for devices behind PCI-PCI bridges. That is, the
Itanium2 with like 10 PCI busses can now boot ok and route all the PCI
interrupts. Hopefully this will also fix problems people are having with
CardBus bridges behind PCI-PCI bridges not properly routing interrupts
when ACPI is used.
Tested on: i386, ia64
|
| 102441 |
26-Aug-2002 |
jhb |
Export a few symbols as globals to allow subclassing of this driver. In
OOP speak, you would mark these as 'protected' members. Specifically:
- Make the pcib_softc struct public so it can be used by subclasses.
- Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(),
and pcib_{read,write}_config() globals that can be used by subclasses.
- Make the pcib devclass a global variable.
- Move most of the pcib_attach() function into a global
pcib_attach_common() function that can be called by the attach routines
of subclasses.
Tested on: i386, alpha, sparc64, ia64
|
| 102440 |
26-Aug-2002 |
jhb |
Various changes to make it easier to subclass the PCI bus device.
- Make the pci devclass a global variable.
- Add child devices in pci_attach() instead of pci_probe(). Change
pci_probe() to just check for a valid bus number from the associated
bridge and return -1000 if successful. This allows subclasses of the
PCI bus driver to override the generic driver.
- Move the code to load the vendor data into its own public function.
Really though, doing this at attach is just plain wrong. This should
really be done in the module load routine instead. As a side effect,
the 'busno' variable in pci_attach() is now no longer static (minor
bug that was harmless so far.)
- Change pci_add_children() to take an extra argument that is the size of
the device info structure passed to pci_read_device() and make it public
so subclasses of the PCI bus can call it in their attach routines.
- Move the bits to attach a probed PCI child to a PCI bus into a global
pci_add_child() function. This will allow subclasses that can detect
a PCI device not found in the normal PCI probe to add those devices in
their own attach routine. (I have seen this in the ACPI tree on my
laptop for example.) As a side effect, change the static function
pci_add_resources() to get the busno, slot, and func from the passed
in dinfo structure instead of requiring them as function arguments.
Tested on: i386, alpha, ia64, sparc64
|
| 102145 |
19-Aug-2002 |
mux |
style(9) nit.
|
| 102144 |
19-Aug-2002 |
mux |
Use the __BUS_ACCESSOR macro for PCIB_ACCESSOR instead of
reimplementing it.
Reviewed by: tmm
|
| 101243 |
02-Aug-2002 |
imp |
While PCI interrupts are shareable, this should not have been committed just
yet.
|
| 100702 |
26-Jul-2002 |
imp |
Make PCI_ENABLE_IO_MODES a sysctl hw.pci.enable_io_modes. It can also
be set at boot time. It defaults to 1 now since it can be set in the
boot loader. If this proves unwise, we can reset it to defaulting to 0.
|
| 98017 |
07-Jun-2002 |
imp |
0 is not an invalid interrupt in the PCI world (just in the ia32
world), do not treat it as such. This fixes the alpha boot problem.
Reviewed by: drew, des
|
| 97892 |
05-Jun-2002 |
gibbs |
Add some PCI-X register definitions.
PCIM_CMD_SERREN -> PCIM_CMD_SERRESPEN to be consistent with
the PERR definition.
|
| 97697 |
01-Jun-2002 |
imp |
Use PCI_INTERRUPT_VALI in stead of hard coded 255
|
| 97696 |
01-Jun-2002 |
imp |
More style(9) nits
|
| 97695 |
01-Jun-2002 |
imp |
Define a PCI_INVALID_IRQ to augment PCI_INTERRUPT_VALID
|
| 97690 |
01-Jun-2002 |
imp |
Make this file mostly conform to style(9).
Approved by: msmith in principle before walkabout
|
| 94901 |
17-Apr-2002 |
mdodd |
Add MODULE_VERSION.
|
| 94573 |
13-Apr-2002 |
imp |
Fix an edge case wrt membase, but more changes needed
|
| 94349 |
10-Apr-2002 |
n_hibma |
intline == 0 is not a valid intline on 386. See pci_cfgintr() in
sys/i386/pci/pci_cfgreg.c.
This should resolve some cases where adding USB support to the kernel
produced an interrupt storm.
|
| 92233 |
13-Mar-2002 |
imp |
Add 5th parameter to pci_read_device specifying the size of the object
to create.
|
| 91406 |
27-Feb-2002 |
jhb |
Simple p_ucred -> td_ucred changes to start using the per-thread ucred
reference.
|
| 91355 |
27-Feb-2002 |
imp |
Use the pci.c code wherever possible, rather than copying all the pci
code into cardbus and s/pci/cardbus. This exposes a few pci_*
functions that are now static.
This work is similar to work Justin posted to the mobile list about a
year or two ago, which I have neglected since then.
This is a subset of his current work with the multiple inheritance
newbus architecutre. When completed, that will eliminate the need for
pci/pci_private.h.
Similar work is needed for the cardbus_cis and pccard_cis code as well.
|
| 91278 |
26-Feb-2002 |
imp |
Fix warnings introduced in the PCI_ALLOW_UNSUPPORTED_IO_RANGE case.
|
| 91064 |
22-Feb-2002 |
phk |
Allow PCI_ALLOW_UNSUPPORTED_IO_RANGE to leave broken setups broken enough
to work.
|
| 90898 |
19-Feb-2002 |
imp |
Put the stard/end adjustments back. They are needed. Also make start
== 0 a special case. I hope this fixes the real problem that phk and
others were seeing.
|
| 90554 |
12-Feb-2002 |
msmith |
Don't claim to have routed an interrupt when the method actually returned an
error.
|
| 90435 |
09-Feb-2002 |
imp |
Make unsupported memory range message bootverbose only
|
| 90388 |
08-Feb-2002 |
imp |
Remove bogus range restrictions that attempted to restrict the range
of I/O in 1.5. It looks like I got it right only for some of the
cases. Instead, allow ISA addresses as a special case. Most PCI
bridges decode this range. I need to investigate PCI bridges better
to know if this is always true or not, but for now assume that it is
since that seems to be the most common case.
# We need to allocate addresses better for the pccard stuff...
Submitted by: phk, mitsunaga-san
|
| 89383 |
15-Jan-2002 |
imp |
Make PCI_ALLOW_UNSUPPORTED_IO_RANGE an option until the ISA address
problem is fixed at the bridge level. This is needed for some newer
laptops that have the cardbus bridge not on pci0.
|
| 89171 |
10-Jan-2002 |
mdodd |
Implement 2 small helper functions:
pci_find_bsf() - Find a device_t by bus/slot/function.
pci_find_device() - Find a device_t by vendor/device ID.
|
| 88375 |
21-Dec-2001 |
tmm |
Use the new resource_list_print_type() function to print resource list
contents, and the new __BUS_ACCESSOR macro to construct the accessor
functions.
|
| 88323 |
21-Dec-2001 |
pirzyk |
Add support for the Intel 82443MX chipset
PR: kern/33032
MFC after: 1 month
|
| 88184 |
19-Dec-2001 |
mdodd |
Don't put variable declarations in header files, put prototypes.
'pci_devq' provides useful information now.
|
| 86906 |
26-Nov-2001 |
imp |
Experimental patch to try to properly clip the range of the memory
request to one that's supported by the bridge. I'm not 100% sure this
is correct, but it makes it easier for the cardbus bridge to allocate
its memory.
Similar code is needed for the I/O range. Also, I'm not sure if I
should be doing this based on memory or pmemory (but likely should do
it based on some flag that tells us to prefetch or not).
Talked about a long time ago with: msmith
|
| 85457 |
25-Oct-2001 |
jlemon |
Add PCI_ENABLE_IO_MODES option, for BIOSen that neglect this.
Submitted by: Andrew R. Reiter arr@watson.org
|
| 84542 |
05-Oct-2001 |
dfr |
Re-route interrupts on ia64 so that we can get the I/O SAPIC interrupt
numbers (the BIOS leaves legacy PIC interrupt numbers in the intline
registers).
|
| 83975 |
26-Sep-2001 |
rwatson |
o Modify access control code for /dev/pci device to use securelevel_gt()
instead of direct securelevel variable test.
Obtained from: TrustedBSD Project
|
| 83951 |
26-Sep-2001 |
brooks |
Add a standard hack in the spirit of PCI_ENABLE_IO_MODES to allow systems
with weird PCI-PCI bridge configurations to work. Defining
PCI_ALLOW_UNSUPPORTED_IO_RANGE causes the sanity checks to pass even
with out of range values.
Reviewed by: msmith
|
| 83366 |
12-Sep-2001 |
julian |
KSE Milestone 2
Note ALL MODULES MUST BE RECOMPILED
make the kernel aware that there are smaller units of scheduling than the
process. (but only allow one thread per process at this time).
This is functionally equivalent to teh previousl -current except
that there is a thread associated with each process.
Sorry john! (your next MFC will be a doosie!)
Reviewed by: peter@freebsd.org, dillon@freebsd.org
X-MFC after: ha ha ha ha
|
| 82768 |
01-Sep-2001 |
n_hibma |
Small nit: Make both prints use 'at device %d.%d'.
|
| 82440 |
27-Aug-2001 |
imp |
Ugggg. I thought I'd already committed this to -current:
If the intline is 0 or 255, then it needs an interrupt routed. Some
Sony laptops improperly flag devices that need an interrupt with 0 :-(.
|
| 77649 |
03-Jun-2001 |
peter |
Fix reversed arguments to pci_write_config()
PR: kern/9408
Submitted by: Philipp Mergenthaler <philipp.mergenthaler@stud.uni-karlsruhe.de>
|
| 77543 |
31-May-2001 |
gallatin |
Backout previous revision. While it fixed many platforms, it broke
all alphas with devices behind ppb's. I'm working on a better solution now.
Note that all alphas that use per-platform interrupt mapping are broken
again (as they have been for several months)
|
| 77280 |
27-May-2001 |
gallatin |
finally fix intr routing on alphas such as the as500 after months of
breakage:
- call PCIB_ROUTE_INTERRUPT() regardless of how valid the intline looks.
Some alphas leave garbage in the intline and leave the intr mapping
to OS platform support routines that map slots/buses to intlines
- Down in the alpha pci code, first try platform.pci_intr_route() and
if it doesn't exist or returns garbage, just read the intline out of
config space.
tested on AS500 (garbage in intline) and UP1000 (PC-like, intline is valid)
Note that a nice little hack like the APIC_IO section of pci_cfgregread()
is not workable. This is because the calling interface for
alpha_pci_route_interrupt() requires us to figure out the bus/slot/etc
from a device_t. At pci_read_device() time, we don't have a device_t
for the bus/slot/func in question.
|
| 74810 |
26-Mar-2001 |
phk |
Send the remains (such as I have located) of "block major numbers" to
the bit-bucket.
|
| 74284 |
15-Mar-2001 |
peter |
The serverworks OSB4 pci->isa bridge has the same mapping register at
offset 0x90 for the SMBus device as the PIIX4.
|
| 73185 |
27-Feb-2001 |
peter |
Slightly reimplement some recently added helper functions as methods, so
that drivers are not reaching into the internals of the pci bus. There
are no driver changes, the public interface is the same.
|
| 72082 |
06-Feb-2001 |
asmodai |
Fix typo: wierd -> weird.
There is no such thing as wierd in the english language.
|
| 70687 |
05-Jan-2001 |
nsouch |
Remove vga_pci generic driver.
Approved by: Mike Smith <msmith@freebsd.org>
|
| 70560 |
01-Jan-2001 |
mjacob |
Sanity check ptr for legal values so it is less likely
(but not impossible) to get stuck in an infinite loop.
Obtained from: msmith@freebsd.org
|
| 70230 |
20-Dec-2000 |
gibbs |
Add PCIR_CAP_PTR as a define for the location of the capability
pointer of type 0 devices. This is required by my last aic7xxx change.
|
| 69957 |
13-Dec-2000 |
msmith |
Remove a redundant prototype.
|
| 69956 |
13-Dec-2000 |
msmith |
Don't try to free the now-nonexistent hdrspec field. This one snuck by
me in the previous round of patches. Oops.
|
| 69953 |
13-Dec-2000 |
msmith |
Next round of PCI subsystem updates:
- Break out the /dev/pci driver into a separate file.
- Kill the COMPAT_OLDPCI support.
- Make the EISA bridge attach a bit more like the old code; explicitly
check for the existence of eisa0/isa0 and only attach if they don't
already exist. Only make one bus_generic_attach() pass over the
bridge, once both busses are attached. Note that the stupid Intel
bridge's class is entirely unpredictable.
- Add prototypes and re-layout the core PCI modules in line with
current coding standards (not a major whitespace change, just moving
the module data to the top of the file).
- Remove redundant type-2 bridge support from the core PCI code; the
PCI-CardBus code does this itself internally. Remove the now
entirely redundant header-class-specific support, as well as the
secondary and subordinate bus number fields. These are bridge
attributes now.
- Add support for PCI Extended Capabilities.
- Add support for PCI Power Management. The interface currently
allows a driver to query and set the power state of a device.
- Add helper functions to allow drivers to enable/disable busmastering
and the decoding of I/O and memory ranges.
- Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some
places.
- Make the PCI-PCI bridge code a little more paranoid about valid
I/O and memory decodes.
- Add some more PCI register definitions for the command and status
registers. Correct another bogus definition for type-1 bridges.
|
| 69908 |
12-Dec-2000 |
msmith |
- We have access to our own device_t here, so use pci_read_config
rather than finding our parent pcib and using its PCI_READ_CONFIG
method.
- Fix the defines for the 32-bit I/O decode registers, and properly
process the 16-bit versions. Now we will correctly check that I/O
resources behind the bridge are going to be decoded.
- Bring the quirk for the Orion PCI:PCI bridge in here (since it
seems to want to set the secondary/supplementary bus numbers).
- Use PCI_SLOTMAX rather than a magic number.
|
| 69907 |
12-Dec-2000 |
msmith |
Don't try to fix up the Orion here; the interface we use is wrong for the
new code (and about to disappear too).
|
| 69890 |
12-Dec-2000 |
msmith |
- Don't return early from the PCI:EISA bridge attachment, or we will lose
the ISA bus.
- Don't expect that a PCI:ISA bridge will have a correct class value;
if we're checking PCI IDs, only depend on these.
This should fix the loss of ISA on machines with PCI:EISA bridges like the
AS4100.
|
| 69849 |
11-Dec-2000 |
msmith |
It looks like we can't count on these devices always having a consistent
class/subclass, so give up trying to cull the list. Instead, complain
in the bootverbose case, but otherwise just accept that we will have to
carry this list of device IDs around.
|
| 69818 |
10-Dec-2000 |
msmith |
The ICH2 reports itself as a PCI:ISA bridge, so don't special-case it
here.
Submitted by: Michael Harnois <mdharnois@home.com>
|
| 69794 |
09-Dec-2000 |
msmith |
Cosmetic nit; separate slot/function with '.' not ':'
|
| 69792 |
09-Dec-2000 |
msmith |
- Fix the device database parsing code so that it actually works.
- Improve the formatting for devices identified by the database.
- Fix the pcib_route_interrupt method definition, as an old version
snuck in here somehow 8(
- Remove a couple of the vendor/device IDs for PCI:ISA bridges which
correctly identify themselves.
Submitted by: peter
|
| 69783 |
08-Dec-2000 |
msmith |
Next phase in the PCI subsystem cleanup.
- Move PCI core code to dev/pci.
- Split bridge code out into separate modules.
- Remove the descriptive strings from the bridge drivers. If you
want to know what a device is, use pciconf. Add support for
broadly identifying devices based on class/subclass, and for
parsing a preloaded device identification database so that if
you want to waste the memory, you can identify *anything* we know
about.
- Remove machine-dependant code from the core PCI code. APIC interrupt
mapping is performed by shadowing the intline register in machine-
dependant code.
- Bring interrupt routing support to the Alpha
(although many platforms don't yet support routing or mapping
interrupts entirely correctly). This resulted in spamming
<sys/bus.h> into more places than it really should have gone.
- Put sys/dev on the kernel/modules include path. This avoids
having to change *all* the pci*.h includes.
|
| 69480 |
01-Dec-2000 |
gallatin |
Convert the pcib_{read,write}_config args from signed to unsigned,
like the args to the config space accessors these functions replaced.
This reduces the likelyhood of overflow when the args are used in
macros on the alpha. This prevents memory management faults when
probing the pci bus on sables, multias and nonames.
Approved by: dfr
Tested by: Bernd Walter <ticso@cicely8.cicely.de>
|
| 69295 |
28-Nov-2000 |
mdodd |
Reduce code duplication by using the GET_RESOURCE_LIST bus method and related
generic resource_list management functions.
I'll deal with the EISA bits later.
Not objected to by: new-bus
|
| 67866 |
29-Oct-2000 |
darrenr |
fix warning compile error about unused variable
|
| 67863 |
29-Oct-2000 |
phk |
Fix params passed to pci_porten() and pci_memen().
|
| 67820 |
28-Oct-2000 |
msmith |
Unconditionally turning on the I/O and memory enable bits in the PCI
command register is too aggressive. Revert to the previous behaviour, but
leave the new behaviour available as an undocumented option. It's not
clear what the Right, Right Thing is to do here, but the more conservative
approach is safer.
|
| 67763 |
28-Oct-2000 |
msmith |
Allow PCI busses to be connected to host bridges detected by ACPI as well.
|
| 67312 |
19-Oct-2000 |
msmith |
Write the routed interrupt back to PCI configuration space.
|
| 67222 |
16-Oct-2000 |
imp |
Forgot to commit this last night.
Define interrupt routing method.
Submitted by: msmith
|
| 67205 |
16-Oct-2000 |
gallatin |
The previous commit broke kernel builds on alpha (and probably ia64).
#ifdef away the offending code until somebody with more newbus fu than
me can figure out where to put a default function that returns 255
without touching each alpha chipset driver..
|
| 67184 |
16-Oct-2000 |
imp |
When a pci device hasn't had an interrupt routed to it (signified by
the intline of 255) go ahead and route the interrupt when we allocate
an interrupt.
Submitted by: msmith
|
| 66842 |
09-Oct-2000 |
msmith |
Validate the PCI bus number that we fetch from our parent, since there's no
guarantee that everything attached to *it* is a PCI bus.
|
| 66515 |
02-Oct-2000 |
archie |
Add definition for PCIS_SERIALBUS_SMBUS PCI device subclass.
Remove cut & paste leftovers.
|
| 66416 |
28-Sep-2000 |
peter |
Get out the roto-rooter and clean up the abuse of nexus ivars by the
i386/isa/pcibus.c. This gets -current running again on multiple host->pci
machines after the most recent nexus commits. I had discussed this with
Mike Smith, but ended up doing it slightly differently to what we
discussed as it turned out cleaner this way. Mike was suggesting creating
a new resource (SYS_RES_PCIBUS) or something and using *_[gs]et_resource(),
but IMHO that wasn't ideal as SYS_RES_* is meant to be a global platform
property, not a quirk of a given implementation. This does use the ivar
methods but does so properly. It also now prints the physical pci bus that
a host->pci bridge (pcib) corresponds to.
|
| 65944 |
16-Sep-2000 |
gibbs |
Add PCIM_CMD_MWRICEN, the bit in the command register in PCI space
that enables memory write and invalidate cycles on a bus master.
|
| 65457 |
05-Sep-2000 |
peter |
When dumping the 'found devices' list in verbose mode, actually show the
bus/slot/function numbers. The old PCI code used other markers or
something, but without it here under the new pci code it is very hard to
tell which device is which (this only affects bootverbose mode).
|
| 65347 |
01-Sep-2000 |
msmith |
If a base address register has been set up by the BIOS, but the relevant
enable bit hasn't been set in the command register, set the bit and
honour the register. It seems that quite a few lazy BIOS writers
aren't bothering to do this, which upsets the existing code and causes
us to miss out on properly-configured devices.
|
| 65299 |
31-Aug-2000 |
peter |
Remove duplicate static definition of pci_devclass
|
| 65176 |
28-Aug-2000 |
dfr |
* Completely rewrite the alpha busspace to hide the implementation from
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
which call busspace.
* Rework pci config accesses to route through the pcib device instead of
calling a MD function directly.
With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
|
| 61451 |
09-Jun-2000 |
dfr |
Nuke the useless chip driver. It gets in the way when you want to load
a functional driver for the device.
|
| 61047 |
28-May-2000 |
peter |
Encapsulate the old PCI compatability support and APIs completely under
"options COMPAT_OLDPCI". This option already existed, but now also tidies
up the declarations in #include <pci/pci*.h>. It is amazing how much stuff
was using the old pre-FreeBSD 3.x names and going silently undetected.
|
| 60938 |
26-May-2000 |
jake |
Back out the previous change to the queue(3) interface.
It was not discussed and should probably not happen.
Requested by: msmith and others
|
| 60833 |
23-May-2000 |
jake |
Change the way that the queue(3) structures are declared; don't assume that
the type argument to *_HEAD and *_ENTRY is a struct.
Suggested by: phk
Reviewed by: phk
Approved by: mdodd
|
| 60686 |
18-May-2000 |
dfr |
Print the correct value for the map type on a verbose boot.
PR: kern/18662
Submitted by: tamaru@ap.t.u-tokyo.ac.jp
|
| 60116 |
07-May-2000 |
mjacob |
Update 'hose' (actually, MCPCIA instance #) for Alpha Rawhide systems.
We have *got* to fix this bogosity of trying to steal part of the PCI
address space for this stuff.
|
| 59783 |
30-Apr-2000 |
bde |
Fixed the type of some ivar access functions. Ivars have type uintptr_t,
not u_long. On i386's with 64-bit longs, returning u_longs indirectly
in (more than) the space reserved for uintptr_t's tended to corrupt the
previous frame pointer in the stack frame, so it was not easy to debug.
The type mismatches are hidden by the bogus cast in DEVMETHOD().
|
| 59368 |
18-Apr-2000 |
phk |
Remove unneeded <sys/buf.h> includes.
Due to some interesting cpp tricks in lockmgr, the LINT kernel shrinks
by 924 bytes.
|
| 59093 |
08-Apr-2000 |
dfr |
* Factor out the object system from new-bus so that it can be used by
non-device code.
* Re-implement the method dispatch to improve efficiency. The new system
takes about 40ns for a method dispatch on a 300Mhz PII which is only
10ns slower than a direct function call on the same hardware.
This changes the new-bus ABI slightly so make sure you re-compile any
driver modules which you use.
|
| 58332 |
20-Mar-2000 |
peter |
Unused definitions.
|
| 58320 |
20-Mar-2000 |
peter |
Bandaid for src/sys/modules which broke world
|
| 58287 |
19-Mar-2000 |
peter |
Connect the ISA and PCI compatability shims to an option. In this case
it's options COMPAT_OLDISA and COMPAT_OLDPCI. This is meant to be a
fairly strong incentive to update the older drivers to newbus, but doesn't
(quite) leave anybody hanging with no hardware support. I was talking with
a few folks and I was encouraged to simply break or disable the shims but
that was a bit too drastic for my liking.
|
| 58244 |
18-Mar-2000 |
n_hibma |
Print the PCI resources even if they are disabled. This shows more clearly
when the BIOS is forgetful about initialising the USB controllers.
|
| 58124 |
15-Mar-2000 |
mjacob |
Alpha 8200 port: Until we fix things better, determine which alpha CPU
platform we're running on so we know how many bits to reserve at the top
end for the 'hose' value. It turns out that there's *just* enough room
to support all possible hoses on TurboLaser.
Reviewed by: gallatin@freebsd.org, dfr@free3bsd.org
|
| 57392 |
22-Feb-2000 |
billf |
o No need to print the vendor/device ID for things that matched succesfully.
o ``<device name>'' versus ``device name'' for things that fall under nomatch.
Reviewed by: dfr (in principle)
Approved by: Baron von Hubbard
|
| 57332 |
19-Feb-2000 |
dfr |
Remove the vga-pci driver. It serves no purpose and it hides the hardware
from useful drivers such as the 3D DRI drivers I will be porting for
hardware accelerated OpenGL. The hardware will still be reported during
boot using the nomatch system.
Approved by: jkh
|
| 56943 |
01-Feb-2000 |
peter |
Spell "pci_delete_resource" correctly.
Approved by: jkh (who must be very sick of requests now :-)
|
| 56839 |
29-Jan-2000 |
peter |
Put a FYI in the compatability shims so that people are aware that they
are using an old unconverted driver. Most (if not all) of the drivers
for common hardware are newbus these days. However, we don't want
to encourage people to take the easy way out and write new drivers
using the shims. This is just passive "encouragement".
Reviewed by: phk
|
| 55770 |
10-Jan-2000 |
yokota |
Added PCIR_BIOS (0x30).
|
| 55593 |
08-Jan-2000 |
peter |
Show the port/mem/irq of pci devices too.
|
| 55590 |
08-Jan-2000 |
peter |
Clean up the cfgmech/pci_mechanism debris. The reason for the existance
of this is no longer an issue as we have a replacement driver for the
one that needed it.
Reviewed by: dfr
|
| 55464 |
05-Jan-2000 |
peter |
Zap pci_map_dense() and pci_map_bwx() - they were for compatability but
are not used. All the drivers that use memory mapped IO on the Alpha have
been ported already.
|
| 54412 |
10-Dec-1999 |
peter |
Make the usb and ide/ata device identification a little saner. Rather than
attaching to the device via chip*, use the newbus nomatch method to report
the device. This leaves them unattached so that a driver can be easily
loaded to grab them later.
|
| 54322 |
08-Dec-1999 |
ken |
[ repository copy of sys/pci/pci_ioctl.h to sys/sys/pciio.h happened in the
background ]
Rename sys/pci/pci_ioctl.h to sys/sys/pciio.h to make it easier for
userland programs to use this interface. Reformat the file, and add a
BSD-style copyright to it.
Add a new man page for pci(4). The PCIOCGETCONF, PCIOCREAD, and PCIOCWRITE
ioctls are documented, but the PCIOCATTACHED ioctl is not documented
because it is not implemented.
Change includes of <pci/pci_ioctl.h> to <sys/pciio.h> or remove them
altogether. In many cases, pci_ioctl.h was unused.
Reviewed by: steve
|
| 54153 |
05-Dec-1999 |
peter |
Raise the pci compat driver match priority a bit so that it's not
quite so close to the chip* drivers.
|
| 54073 |
03-Dec-1999 |
mdodd |
Remove the 'ivars' arguement to device_add_child() and
device_add_child_ordered(). 'ivars' may now be set using the
device_set_ivars() function.
This makes it easier for us to change how arbitrary data structures are
associated with a device_t. Eventually we won't be modifying device_t
to add additional pointers for ivars, softc data etc.
Despite my best efforts I've probably forgotten something so let me know
if this breaks anything. I've been running with this change for months
and its been quite involved actually isolating all the changes from
the rest of the local changes in my tree.
Reviewed by: peter, dfr
|
| 53906 |
30-Nov-1999 |
peter |
Make the pci driver compat shim return a preference for probe
rather than an "it's mine!" so that other newbus-aware drivers can
bid for the device too. This should allow the sym driver to out-bid
the ncr driver for devices it supports without having to modify ncr.c
at all. ncr would then function as a catch-all.
|
| 53588 |
22-Nov-1999 |
n_hibma |
Feh, kind of went wrong the previous commit. dev should child (in some
cases) plus a typo.
|
| 53544 |
22-Nov-1999 |
n_hibma |
Move the pretty printing of the description for USB controllers to
pci_probe_nomatch, so it won't be in the way when loading USB as a module.
The reason for them being there in the first place is that every
motherboard comes with USB kit and this way it looks more pretty (peter).
The real solution will be to define some method of detaching a driver
after it has attached.
|
| 53461 |
20-Nov-1999 |
peter |
Allow NULL for startp and/or countp in bus_get_resource() so that you can
get one of the two without having to use a dummy variable.
|
| 52853 |
03-Nov-1999 |
gallatin |
now that a map's base addr is 64-bits, the alpha multi-hose hack needs
to be cast to 64-bits in pci_add_map. This should allow XP1000s and
DS20s to boot -current again.
|
| 52644 |
30-Oct-1999 |
phk |
Change useracc() and kernacc() to use VM_PROT_{READ|WRITE|EXECUTE} for the
"rw" argument, rather than hijacking B_{READ|WRITE}.
Fix two bugs (physio & cam) resulting by the confusion caused by this.
Submitted by: Tor.Egge@fast.no
Reviewed by: alc, ken (partly)
|
| 52636 |
29-Oct-1999 |
phk |
Don't test boolean return against != 1.
Don't needlessly assign the error variable in an if statement.
|
| 52590 |
28-Oct-1999 |
dfr |
Fix some resource allocation peculiarities of the intpm device.
|
| 52508 |
26-Oct-1999 |
dfr |
Make sure we add an interrupt resource if intline!=255.
|
| 52327 |
17-Oct-1999 |
dfr |
Correct a stupid type which prevented us from working with any device
which needed port resources.
|
| 52243 |
14-Oct-1999 |
dfr |
* Implement bus_set/get/delete_resource for pci.
* Change the hack used on the alpha for mapping devices into DENSE or
BWX memory spaces to a simpler one. Its still a hack and should be
a seperate api to explicitly map the resource.
* Add $FreeBSD$ as necessary.
|
| 52175 |
12-Oct-1999 |
gallatin |
allow pci_ioctl to work with multi-hose alphas.
Rather than teaching pci_ioctl about hoses, we just pass down a magic number
& let the platform code figure out what the hose is based on what the bus
number is.
concept approved by dfr
|
| 52063 |
09-Oct-1999 |
peter |
Add the 16550 programming interface code for PCIS_SIMPLECOMM_UART.
|
| 51916 |
03-Oct-1999 |
gallatin |
A band-aid to prevent multi-hose alpha chipsets (aka tsunami) from
panic'ing because the hose is not filled in. We should probably extend the
pciioctl interface to take hoses into account..
|
| 51845 |
01-Oct-1999 |
roger |
Backout part of the changes made in 1.111
For unknown devices the output will now be
pci0: unknown card (vendor=0x109e, dev=0x0878) at 14.1 irq 19
instead of
pci0: unknown card DD^0878 (vendor=0x109e, dev=0x0878) at 14.1 irq 19
Before this change, the code used to take the PCI vendor id and translate it
into a three letter ASCII name.
For PnP devices, the vendor id _does_ map to a nice ASCII name
(eg Creative Labs PnP ID maps to "CTL", ESS PnP ID maps to "ESS")
But there is no such mapping for PCI devices, as can be seen by the
example above where the Brooktree PCI vendor ID maps to "DD^"
The PCI Special Interest Group confirmed they do not have any mappings
from vendor ID to ASCII.
|
| 51658 |
25-Sep-1999 |
phk |
Remove five now unused fields from struct cdevsw. They should never
have been there in the first place. A GENERIC kernel shrinks almost 1k.
Add a slightly different safetybelt under nostop for tty drivers.
Add some missing FreeBSD tags
|
| 50827 |
03-Sep-1999 |
luoqi |
Handle for passthru resource release correctly.
|
| 50477 |
28-Aug-1999 |
peter |
$Id$ -> $FreeBSD$
|
| 50254 |
23-Aug-1999 |
phk |
Convert DEVFS hooks in (most) drivers to make_dev().
Diskslice/label code not yet handled.
Vinum, i4b, alpha, pc98 not dealt with (left to respective Maintainers)
Add the correct hook for devfs to kern_conf.c
The net result of this excercise is that a lot less files depends on DEVFS,
and devtoname() gets more sensible output in many cases.
A few drivers had minor additional cleanups performed relating to cdevsw
registration.
A few drivers don't register a cdevsw{} anymore, but only use make_dev().
|
| 49195 |
29-Jul-1999 |
mdodd |
Alter the behavior of sys/kern/subr_bus.c:device_print_child()
- device_print_child() either lets the BUS_PRINT_CHILD
method produce the entire device announcement message or
it prints "foo0: not found\n"
Alter sys/kern/subr_bus.c:bus_generic_print_child() to take on
the previous behavior of device_print_child() (printing the
"foo0: <FooDevice 1.1>" bit of the announce message.)
Provide bus_print_child_header() and bus_print_child_footer()
to actually print the output for bus_generic_print_child().
These functions should be used whenever possible (unless you can
just use bus_generic_print_child())
The BUS_PRINT_CHILD method now returns int instead of void.
Modify everything else that defines or uses a BUS_PRINT_CHILD
method to comply with the above changes.
- Devices are 'on' a bus, not 'at' it.
- If a custom BUS_PRINT_CHILD method does the same thing
as bus_generic_print_child(), use bus_generic_print_child()
- Use device_get_nameunit() instead of both
device_get_name() and device_get_unit()
- All BUS_PRINT_CHILD methods return the number of
characters output.
Reviewed by: dfr, peter
|
| 49157 |
28-Jul-1999 |
dfr |
Add support for SYS_RES_DENSE and SYS_RES_BWX resource types. These are
equivalent to SYS_RES_MEMORY for x86 but for alpha, the rman_get_virtual()
address of the resource is initialised to point into either dense-mapped
or bwx-mapped space respectively, allowing direct memory pointers to be
used to device memory.
Reviewed by: Andrew Gallatin <gallatin@cs.duke.edu>
|
| 49130 |
27-Jul-1999 |
mdodd |
Case matters.
DEv_METHOD to DEV_METHOD.
|
| 49129 |
27-Jul-1999 |
mdodd |
Implement the BUS_PROBE_NOMATCH method for the PCI bus.
This function is called for each device for which no driver
was found.
Output is similar to the eisa_probe_nomatch() function but with the
added benefit of displaying the assigned IRQ (since PCI gives us
this information up front.)
Output is like so:
pci0: unknown card CPQ0508 (vendor=0x0e11, dev=0x0508) at 11.0 irq 9
pci0: unknown card DFZ0508 (vendor=0x10da, dev=0x0508) at 11.0 irq 9
pci0: unknown card DBL0508 (vendor=0x104c, dev=0x0508) at 11.0 irq 9
pci0: unknown card DDM0011 (vendor=0x108d, dev=0x0011) at 11.0 irq 9
I'm not happy with the 3 lines of macro cruft that got added but
I consider it a temporary annoyance as those bits will be moved to
some place where PCI, EISA and ISAPNP code will be able to use them.
(Not surprisingly, this message is longer than the code in question.)
Reviewed by: peter, dfr
|
| 48528 |
03-Jul-1999 |
peter |
Eliminate a bunch of #include "pci.h" and #if NPCI > 0 around entire
files. config will leave the whole file out if configured to do so.
|
| 48432 |
01-Jul-1999 |
peter |
#include <machine/md_var.h> to bring the prototype for
alpha_platform_assign_pciintr() into scope (!).
|
| 47646 |
31-May-1999 |
roger |
On the new Meteor cards, the Philips SAA 7116 is connected to the PCI bus
via an IBM PCI-PCI bridge (82351 or 82352 or 82353)
The driver must identify if it is on a secondary PCI bus, which is
created via the IBM PCI-PCI bridge. If it is, then it must initialise
the IBM PCI-PCI bridge correctly.
To do this, the following new functions are added.
Because they use the pcici_t tag, they are considered 2.2 compatibility APIs
pcici_t * pci_get_parent_from_tag(pcici_t tag);
int pci_get_bus_from_tag(pcici_t tag);
(The _from_tag suffix is used to prevent clashes with similarly named
newbus PCI API functions)
Submitted by: Anton Berezin <tobez@plab.ku.dk>
Reviewed by: Doug Rabson <dfr@nlsystems.com>
Reworked by: Me (roger)
|
| 47640 |
31-May-1999 |
phk |
Simplify cdevsw registration.
The cdevsw_add() function now finds the major number(s) in the
struct cdevsw passed to it. cdevsw_add_generic() is no longer
needed, cdevsw_add() does the same thing.
cdevsw_add() will print an message if the d_maj field looks bogus.
Remove nblkdev and nchrdev variables. Most places they were used
bogusly. Instead check a dev_t for validity by seeing if devsw()
or bdevsw() returns NULL.
Move bdevsw() and devsw() functions to kern/kern_conf.c
Bump __FreeBSD_version to 400006
This commit removes:
72 bogus makedev() calls
26 bogus SYSINIT functions
if_xe.c bogusly accessed cdevsw[], author/maintainer please fix.
I4b and vinum not changed. Patches emailed to authors. LINT
probably broken until they catch up.
|
| 47625 |
30-May-1999 |
phk |
This commit should be a extensive NO-OP:
Reformat and initialize correctly all "struct cdevsw".
Initialize the d_maj and d_bmaj fields.
The d_reset field was not removed, although it is never used.
I used a program to do most of this, so all the files now use the
same consistent format. Please keep it that way.
Vinum and i4b not modified, patches emailed to respective authors.
|
| 47612 |
30-May-1999 |
dfr |
In pci_alloc_resource() only check start and end to see if its a default.
|
| 47339 |
20-May-1999 |
gallatin |
Add support for multiple PCI "hoses" used on various alpha platforms.
The specific intent of this commit is to pave the way for importing
Compaq XP1000 support. These changes should not affect the i386 port.
Reviewed by: Doug Rabson <dfr@nlsystems.com>
(actually, he walked me through most of it & deserves more than reviewd-by
credit )
|
| 47307 |
18-May-1999 |
peter |
Move pcibus (host -> pci bus) probe/attach routines from nexus
to pcibus.c. pci_cfgopen() becomes static and there are no more
bus #ifdef's in nexus.c.
|
| 46993 |
11-May-1999 |
peter |
Use the probe priority mechanism to make sure the chip* probes do not
displace a real driver.
Revert rev 1.109.
Pick up a few things from elsewhere (a couple of SiS id's).
As an *experiment*, have the chip* driver claim (for reporting purposes)
IDE controllers if there isn't another PCI-aware ide or ata driver to
grab them. I've exported the match function since it could be used from
the ata-all.c code replacing ata_pcimatch() - but I have not touched the
ata code. I'd like to catch a few more devices this way, including USB
and other bridges etc.
|
| 46917 |
10-May-1999 |
dfr |
Add missing suspend/resume methods.
|
| 46832 |
09-May-1999 |
peter |
For the ioctl that reads the pci configuration, look up the name and unit
on the fly so that we can see the driver assignment of new pci devices
as well in the 'pciconf -l' display.
|
| 46831 |
09-May-1999 |
peter |
GC unused variable in struct.
|
| 46801 |
09-May-1999 |
peter |
Argh, don't clobber the pci device list if there are multiple busses!
(An AGP counts as a PCI bus, it seems...)
This stopped 'pciconf -l' from working on AGP or PCI->PCI bridge systems.
|
| 46743 |
08-May-1999 |
dfr |
Move the declaration of the interrupt type from the driver structure
to the BUS_SETUP_INTR call.
|
| 46730 |
08-May-1999 |
peter |
Print 'irq nn' on the device attach line like the old pci code did.
However, we are not printing 'int a/b/c/d' yet, is it worth it on non-SMP
systems? (It's useful when tracing PCI->IO-APIC routing on SMP systems)
|
| 46712 |
08-May-1999 |
peter |
GC pci_bushigh() - no longer used.
|
| 46591 |
06-May-1999 |
peter |
Fix a goof on my part; s/struct moduledata */struct module */
|
| 46023 |
24-Apr-1999 |
peter |
Replace the pcidevice_set linker set based configuration mechanism for old
style pci drivers with a simple one-line change to use a module that
registers itself under new-bus and should in theory enable just about all
of the pci drivers to be loadable (kldload and loader(8)) but without
having the impact of converting the APIs yet.
This also fixes the problem of having undefined variables when only
new-style pci drivers are present.
|
| 45739 |
17-Apr-1999 |
peter |
Well folks, this is it - The second stage of the removal for build support
for LKM's..
|
| 45720 |
16-Apr-1999 |
peter |
Bring the 'new-bus' to the i386. This extensively changes the way the
i386 platform boots, it is no longer ISA-centric, and is fully dynamic.
Most old drivers compile and run without modification via 'compatability
shims' to enable a smoother transition. eisa, isapnp and pccard* are
not yet using the new resource manager. Once fully converted, all drivers
will be loadable, including PCI and ISA.
(Some other changes appear to have snuck in, including a port of Soren's
ATA driver to the Alpha. Soren, back this out if you need to.)
This is a checkpoint of work-in-progress, but is quite functional.
The bulk of the work was done over the last few years by Doug Rabson and
Garrett Wollman.
Approved by: core
|
| 45573 |
11-Apr-1999 |
eivind |
Staticize.
|
| 44128 |
18-Feb-1999 |
n_hibma |
Moved [uo]hci_pci.c from /sys/dev/pci to /sys/pci after Soren
threatened to send Bruce. These files are no longer shared
with NetBSD anyway.
Requires a config and make depend.
|
| 44071 |
15-Feb-1999 |
n_hibma |
Added vendor Compaq/CMDTACH and USB067[03]
|
| 43023 |
22-Jan-1999 |
n_hibma |
Added OPTi FireLink and NEC (Toshiba and others) to OHCI ID's
|
| 42867 |
19-Jan-1999 |
se |
Fix problem with zero valued map registers followed by valid map entries.
The previous code just ignored the invalid map register, but this gave
surprising results because of the way pci_map_port() associated the map
register offset supplied with a map entry in the map array.
|
| 42614 |
13-Jan-1999 |
bde |
Let drivers specify interrupt flags (INTR_EXCL and/or INTR_FAST)
using the new pci_map_int_right() variant of pci_map_int(). Fast
interrupts work for PCI devices if and only if they are exclusive.
(The PCI interrupt mux doesn't support fast interrupts and can't
support a mixture of fast and slow interrupts even in principle.)
Don't assume that intrmask_t == unsigned in pci_map_int().
|
| 42608 |
13-Jan-1999 |
n_hibma |
Removed warning and comments
|
| 42559 |
12-Jan-1999 |
eivind |
Clean out warnings by changin ID string declarations to be char xxx[]
instead of char *xxx.
|
| 42557 |
12-Jan-1999 |
eivind |
Remove 'pci_bridgeto' - it was just an empty placeholder.
|
| 42489 |
10-Jan-1999 |
n_hibma |
Remove warning
|
| 42383 |
07-Jan-1999 |
n_hibma |
Clean up, nothing major
|
| 42358 |
06-Jan-1999 |
n_hibma |
Added proper names to the device messages at probe and attach.
Missing ones:
Device Id ADS technologies
Device Id's SiS hardware
|
| 42344 |
06-Jan-1999 |
n_hibma |
Removed NetBSD specific code
|
| 41802 |
14-Dec-1998 |
julian |
The OHCI interfaces I have access to map their control regs etc. into
memory address space rather than IO space.. reflect this when looking for the
interface revision register.
If this is not true for them all then we probably need some smarter code.
|
| 41784 |
14-Dec-1998 |
n_hibma |
Added Id
|
| 41771 |
14-Dec-1998 |
dillon |
probe function changed from returning char * to const char *.
|
| 41766 |
14-Dec-1998 |
dillon |
pci_device pd_probe function changed from returning char * to returning
const char *. Originally I was going to add casts from const char * to
char * in some of the pci device drivers, but the reality is that the
pci device probes return constant quoted strings.
|
| 41668 |
11-Dec-1998 |
n_hibma |
Fixed same as Julian did in uhci_pci.c and fixed the fetching of the revision ohci_pci.c; clean up
|
| 41662 |
10-Dec-1998 |
julian |
The shift and the masking were in the wrong order for extracting
the INTERFACE type byte from the longword register.
|
| 41624 |
09-Dec-1998 |
n_hibma |
Preliminary support for OHCI motherboards
|
| 41623 |
09-Dec-1998 |
n_hibma |
1) Fixed bug: sc was used unitialised in uhci_run
2) Clean up the code and remove superfluous statements
|
| 41366 |
26-Nov-1998 |
n_hibma |
Initial commit of ported NetBSD USB stack
|
| 41030 |
09-Nov-1998 |
peter |
s/%#p/%p/ to fix a warning. This looks like a leftover of once being
%#x, which causes a leading 0x to be prepended. %p has this by default
and the '#' is ignored by the kernel prinf code for %p.
|
| 40856 |
03-Nov-1998 |
julian |
In the cyrix Cx5530, there are null (empty) Base address registers before the
base register that controls Ultra-DMA, so we need to examine all possible
base registers instead of just giving up at the first empty one.
Also, looking at the source code to the BIOS, I see that they are also
checking for 0xffffffff as an invalid value so do the same. Stefan may like
to clean this up, but at least now I can find my PCI IDE registers.
|
| 40030 |
07-Oct-1998 |
gibbs |
ahc_pci.c:
Disable DPARCKEN in the DSCOMMAND0 register on the aic7890/91/96/97.
Parity checking is broken for some chip/MB combinations and this
is the work around recommended by Adaptec.
dpt_pci.c:
Remove a superflous '{' that prevented DPT_ALLOW_MEMIO from working.
pcireg.h:
Add a definition for Parity Error Reponse bit in the PCI Space
command register.
|
| 40004 |
06-Oct-1998 |
dfr |
Add functions for accessing dense and bwx memory for pci devices. These
routines are necessary to allow the use of certain types of hardware on
the alpha, particularly a Myrinet card.
Submitted by: Andrew Gallatin <gallatin@cs.duke.edu>
|
| 39346 |
16-Sep-1998 |
dfr |
Some workarounds for a common DEC pci-pci bridge found on alphas.
Fix printf format errors which show up on the alpha.
|
| 39310 |
15-Sep-1998 |
gibbs |
Correct printf format bugs.
|
| 39231 |
15-Sep-1998 |
gibbs |
Revive PCIConf.
Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
|
| 38888 |
06-Sep-1998 |
tegge |
Maintain a mapping from irq number to (ioapic number, int pin) tuple,
and use this when masking/unmasking interrupts.
Maintain a mapping from (iopaic number, int pin) tuple to irq number,
and use this when configuring devices and programming the ioapics.
Previous code assumed that irq number was equal to int pin number, and
that the ioapic number was 0.
Don't let an AP enter _cpu_switch before all local apics are initialized.
|
| 38304 |
13-Aug-1998 |
gibbs |
Use "baseclass" instead of "class" for storing the contents of PCI register
0xB so that C++ programs can use the PCI conf interface.
|
| 37842 |
22-Jul-1998 |
dfr |
Add a call to a platform-specific irq remapping function for alpha platforms
which don't record the correct irqs in PCI config space.
Submitted by: Andrew Gallatin <gallatin@cs.duke.edu>
|
| 37841 |
22-Jul-1998 |
dfr |
On the alpha, ports may be allocated above 64k.
Change the port address argument to pci_map_port to pci_port_t* which is
defined as u_int on the alpha, u_short on i386. This is a stopgap with a
hopefully limited lifetime.
Discussed with: Stefan Esser <se@freebsd.org>
|
| 36735 |
07-Jun-1998 |
dfr |
This commit fixes various 64bit portability problems required for
FreeBSD/alpha. The most significant item is to change the command
argument to ioctl functions from int to u_long. This change brings us
inline with various other BSD versions. Driver writers may like to
use (__FreeBSD_version == 300003) to detect this change.
The prototype FreeBSD/alpha machdep will follow in a couple of days
time.
|
| 34990 |
01-Apr-1998 |
tegge |
Add two workarounds for broken MP tables:
- Attempt to handle PCI devices where the interrupt is
an ISA/EISA interrupt according to the mp table.
- Attempt to handle multiple IO APIC pins connected to
the same PCI or ISA/EISA interrupt source. Print a
warning if this happens, since performance is suboptimal.
This workaround is only used for PCI devices.
With these two workarounds, the -SMP kernel is capable of running on
my Asus P/I-P65UP5 motherboard when version 1.4 of the MP table is disabled.
|
| 32726 |
24-Jan-1998 |
eivind |
Make all file-system (MFS, FFS, NFS, LFS, DEVFS) related option new-style.
This introduce an xxxFS_BOOT for each of the rootable filesystems.
(Presently not required, but encouraged to allow a smooth move of option *FS
to opt_dontuse.h later.)
LFS is temporarily disabled, and will be re-enabled tomorrow.
|
| 31016 |
07-Nov-1997 |
phk |
Remove a bunch of variables which were unused both in GENERIC and LINT.
Found by: -Wunused
|
| 29636 |
20-Sep-1997 |
dyson |
Addition of support of the slightly rogue Promise IDE interface(Dyson), support
of multiple PCI IDE controllers(Dyson), and some updates and cleanups from
John Hood, who originally made our IDE DMA stuff work :-).
I have run tests with 7 IDE drives connected to my system, all in DMA
mode, with no errors. Modulo any bugs, this stuff makes IDE look
really good (within it's limitations.)
Submitted by: John Hood <cgull@smoke.marlboro.vt.us>
|
| 29368 |
14-Sep-1997 |
peter |
Update select -> poll in drivers.
|
| 28517 |
21-Aug-1997 |
fsmp |
Reorder function decls alphabetically.
|
| 28505 |
21-Aug-1997 |
fsmp |
A few more casts and a function declaration for warning free kernel builds.
|
| 27845 |
02-Aug-1997 |
bde |
Removed unused #includes.
|
| 26946 |
25-Jun-1997 |
fsmp |
Modified to use renamed get_pci_apic_irq() -> pci_apic_pin() function.
|
| 26391 |
02-Jun-1997 |
se |
Move call of pci_addcfg() before test of cfg->subordinatebus, since the
device probe of a host to PCI bridge may modify that value, based on
its knowledge of device specific registers. This makes the Intel XXpress
work, as verified by: Terje Marthinussen <terjem@cc.uit.no>.
|
| 26347 |
01-Jun-1997 |
peter |
PCI_CLASS_MASS_STORAGE (under PCI_COMPAT) was used in a driver in LINT
still (stallion.c).
|
| 26253 |
28-May-1997 |
se |
Add one more compatibility define to make the Adaptec driver compile
with option AHC_ALLOW_MEMIO again ....
|
| 26232 |
28-May-1997 |
se |
Define command register enable bits, which are required for a consitency
test added to pci_compat.c
|
| 26230 |
28-May-1997 |
se |
Two minor changes to the code that builds the pci map array:
1) Stop at the first map register that contains a zero value.
2) When testing for the map size work up from low values, since
this works around a bug in some BusLogic SCSI card, which has
the 16 upper port base address bits hardwired to zero.
The config register dump printed in the bootverbose case has
been slightly rearranged.
|
| 26202 |
27-May-1997 |
fsmp |
Minor cleanup of APIC_IO code.
Submitted by: Stefan Esser <se@freebsd.org>
|
| 26186 |
27-May-1997 |
fsmp |
Add support for APIC_IO to pci IRQ configuration.
The support for APIC_IO was lost in the new set of pci modules. This patch
restores the ability to build SMP/APIC_IO kernels.
|
| 26159 |
26-May-1997 |
se |
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
|
| 25417 |
03-May-1997 |
phk |
Initialize PCI/CardBus bridges.
Tested on: HP Omnibook 800 / TI PCI1130
Reviewed by: se
|
| 25164 |
26-Apr-1997 |
peter |
Man the liferafts! Here comes the long awaited SMP -> -current merge!
There are various options documented in i386/conf/LINT, there is more to
come over the next few days.
The kernel should run pretty much "as before" without the options to
activate SMP mode.
There are a handful of known "loose ends" that need to be fixed, but
have been put off since the SMP kernel is in a moderately good condition
at the moment.
This commit is the result of the tinkering and testing over the last 14
months by many people. A special thanks to Steve Passe for implementing
the APIC code!
|
| 25121 |
24-Apr-1997 |
se |
Add definition of PCI_SUBID_REG2, the subvendor/device ID for
a header type 2 device.
|
| 25112 |
23-Apr-1997 |
se |
Add preliminary support for PCI config header type 2:
Fetch subvendor/device ID from config space register 0x40.
|
| 25039 |
20-Apr-1997 |
phk |
The bit of the cardbus bridge support code se and I have been able to agree
on so far... :-)
Reviewed by: se
|
| 24282 |
25-Mar-1997 |
se |
Fix printing of map sizes: large numbers got a negative sign before.
|
| 24280 |
25-Mar-1997 |
se |
Add a few vendor IDs and class and sub-class encodings.
Submitted by: phk
|
| 22975 |
22-Feb-1997 |
peter |
Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not
ready for it yet.
|
| 22283 |
05-Feb-1997 |
ache |
Fix misspelled variable name, -current build stopper
|
| 22260 |
04-Feb-1997 |
se |
Add interface revision field to pci_register_lkm parameter list.pci.c pcibus.h
This parameter is intended to allow new kernels to work with old LKM binaries,
provided the revision ID is incremented whenever the PCI LKM interface is
changed. The revision ID does not at all protect against changes in data
structures accesses by the driver.
|
| 21988 |
25-Jan-1997 |
se |
Improve on previous fix: Clean up getirq() as well, and remove redundant
warning messages.
|
| 21965 |
23-Jan-1997 |
se |
Make IRQ 0 invalid in pci_map_int(), since it is hardwired to the
programmable interval timer chip in PC systems.
|
| 21934 |
21-Jan-1997 |
se |
Add PCI LKM support.
|
| 21673 |
14-Jan-1997 |
jkh |
Make the long-awaited change from $Id$ to $FreeBSD$
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.
Boy, I'm glad we're not using sup anymore. This update would have been
insane otherwise.
|
| 19696 |
12-Nov-1996 |
se |
Add support for header type == 1 devices (PCI 2.1 compatible PCI to PCI
bridges with support for 64 bit memory addresses and 32 bit I/O addresses).
The code is not complete. It ignores the upper half of the long addresses.
This is not a problem on PC compatible systems, but has to be fixed for
real computers.
|
| 19695 |
12-Nov-1996 |
se |
Fix PCI to PCI bridge register bit field masks.
Thanks to "Mike Durian" <durian@plutotech.com> for the very good
problem report and his support as a beta tester of this patch.
|
| 19101 |
22-Oct-1996 |
se |
Add support for ioctl() accesses to PCI config space registers.
Garrett Wollman sent me this code a few weeks ago for review, and I made
some significant changes, which he in turn accepted ...
In order to make use of these changes, a device entry has to added to /dev.
Submitted by: wollman
|
| 18922 |
14-Oct-1996 |
se |
pci_map_mem() did a too restrictive check on the mapping type:
PCI_MAP_MEMORY_TYPE_32BIT_1M should be accepted as well as
PCI_MAP_MEMORY_TYPE_32BIT (and now is).
(Problem reported by David Greenman.)
|
| 18233 |
10-Sep-1996 |
bde |
Removed more devconf leftovers.
|
| 18158 |
08-Sep-1996 |
phk |
Various cleanups for remanents of devconf.
|
| 18084 |
06-Sep-1996 |
phk |
Remove devconf, it never grew up to be of any use.
|
| 18064 |
05-Sep-1996 |
se |
Fix code that deals with multiple host to PCI bridges by making the next
one use the highest seen bus number plus 1 as its starting point.
|
| 18000 |
02-Sep-1996 |
se |
Add preliminary support for the Orion PCI chip set. It is special in the
way it attaches multiple PCI buses directly to the CPU, instead of having
them hanging off from PCI to PCI bridges. This code is a hack, and will
be obsoleted by the planned rework of the PCI code, which will change the
dealing with PCI to PCI bridges and other special devices significantly.
The patch also adds a kern_devconf entry for PCI bus 0 which is assumed
to be a child of cpu0. The new PCI code will make it possible to hand out
the kern_devconf structure to a pci device being attached, since this is
(regretably, IMHO) required by a few ISA devices.
Finally there are new PCI ids for some Intel chip set devices, which had
already been known to 2.1.5R, but did not make it into -current. This closes
"kern/1558: PCI probe seems to have lost a device in -current".
|
| 16248 |
09-Jun-1996 |
asami |
Scan PCI buses in order the BIOS has assigned them. This is sometimes
necessary to boot from a SCSI disk connected to a twin-channel adapter,
and you have multiple of them (disks and adapters).
Reviewed by: se
|
| 15812 |
18-May-1996 |
se |
Fix range check to actually test the variable that will be used as
an index later.
Submitted by: Erich Stefan Boleyn <erich@uruk.org>
|
| 15378 |
25-Apr-1996 |
asami |
Fix logic bug in pci bridge code. For a PCI-PCI bridge, secondary
should be <= than subordinate, not the other way around.
They are both true if the bridge is not cascaded (i.e., twin-channel
scsi/e-net adapters won't be affected by this bug), which is probably why
it was unnoticed until today.
|
| 15261 |
14-Apr-1996 |
se |
Update PCI bus code from my current sources:
- always use pci_conf_read() and pci_conf_write(). (This is required to
simulate non-existant devices in my system for PCI bridge code tests.)
- reorder some functions (put the main functions at the end).
- correct off by one bug in the code dealing with unitialized PCI to PCI
bridge chips. (Bug found by ASAMI Satoshi.)
- print function number for multi-function devices.
|
| 15116 |
07-Apr-1996 |
bde |
Removed now-unused #includes of <machine/cpu.h>. They were for bootverbose
being declared in the wrong place.
|
| 14703 |
19-Mar-1996 |
bde |
Fixed unsigned longs that should have been vm_offset_t.
vm_offset_t is currently unsigned long but should probably be plain
unsigned for i386's to match the choice of minimal types to represent
for fixed-width types in Lite2. Anyway, it shouldn't be assumed
to be unsigned long.
I only fixed the type mismatches that were detected when I changed
vm_offset_t to unsigned. Only pointer type mismatches were detected.
|
| 14153 |
19-Feb-1996 |
se |
Remove limit of port I/O addresses to 65K, since PCI specifies 32 bit
port addresses (even though the PC architecture doesn't support them).
Add code to limit the I/O map size based on the lowest set bit of the
address. This cures the problem with the BT946C only having a 16 bit
map register, in voiolation of the PCI specs, without giving up the
general support of >65K port regions.
|
| 14133 |
17-Feb-1996 |
se |
Add generic PCI to PCI bridge support.
Improve verbose boot messages for unidentified chips.
|
| 13721 |
30-Jan-1996 |
se |
Add heuristic to detect multi-function devices that don't announce this
feature in the header type register, though it is required by the PCI spec.
This should correctly probe both functions of the Intel 82371FB chip,
without the need for a special case based on the device ID.
|
| 13656 |
27-Jan-1996 |
wollman |
Decode configuration for the IDE part of the Triton chipset. This
includes a hack in the probe code: the 82371FB is a multifuction
device, but doesn't properly set the configuration bit which
indicates this. So, we just hard-wire all 82371FBs as multifunction
devices.
This does not actually make the bus-master IDE stuff work, although
if anyone wants to work on that, I have the databooks that tell
how to use it.
|
| 13633 |
25-Jan-1996 |
se |
Add support for multi-function devices.
|
| 13597 |
23-Jan-1996 |
se |
Make PCI interrupt handlers return void like everybody else does.
Reviewed by: davidg
|
| 13497 |
19-Jan-1996 |
se |
Fix bad typo: > was used instead of >> ...
Submitted by: Matt Thomas <matt@lkg.dec.com>
|
| 13496 |
19-Jan-1996 |
se |
Improve PCI probe messages by printing the bus number.
Add missing newline to PCI to PCI bridge message.
Submitted by: Matt Thomas <matt@lkg.dec.com>
|
| 12879 |
16-Dec-1995 |
bde |
Completed function declarations and/or added prototypes and/or added
#includes to get prototypes.
pci now uses a different interrupt handler type for interrupts that it
dispatches and the isa interrupt handler type for the interrupts that
it handles.
|
| 12872 |
15-Dec-1995 |
se |
Fix the off-by-one error in the calculation of the valid port range.
Reduce default value of pcicb_membase to 0x2000000 (from 0x4000000)
since this seems to be the lower bound used by many systems.
Submitted by: Mihoko Tanaka <m_tanaka@pa.yokogawa.co.jp>
|
| 12820 |
14-Dec-1995 |
phk |
Another mega commit to staticize things.
|
| 12662 |
07-Dec-1995 |
dg |
Untangled the vm.h include file spaghetti.
|
| 12651 |
06-Dec-1995 |
se |
Set default burst length limit to 32 bytes, since this seems to be
an acceptable value for all current chip sets (just a hint to PCI
device drivers, used in the NCR driver, for example).
Add PCI Vendor ID of ACER.
|
| 12454 |
21-Nov-1995 |
bde |
Made pci.c compile again. It unfortunately depends on the isa interrupt
interface. Adding prototypes just made the dependency explicit.
|
| 12453 |
21-Nov-1995 |
bde |
Completed function declarations and/or added prototypes.
|
| 12429 |
20-Nov-1995 |
phk |
Mega commit for sysctl.
Convert the remaining sysctl stuff to the new way of doing things.
the devconf stuff is the reason for the large number of files.
Cleaned up some compiler warnings while I were there.
|
| 11130 |
02-Oct-1995 |
dg |
Fixed bug where wrong thing was being checked for NULL before calling
free(), resulting in a panic. This happend whenever an irq had already
been allocated by another device (like something on the ISA bus).
|
| 10748 |
14-Sep-1995 |
se |
Add vendor ID of Compaq, now that I found what it is ...
|
| 10726 |
14-Sep-1995 |
se |
Minor changes to the PCI probe messages.
|
| 10603 |
07-Sep-1995 |
se |
Make mapping messages depend on bootverbose flag.
Add PCI subclass to unknown device message.
|
| 9769 |
29-Jul-1995 |
dg |
Initialize "name" to quiet compiler.
|
| 9737 |
27-Jul-1995 |
se |
Add a few vendor IDs.
|
| 9736 |
27-Jul-1995 |
se |
Get rid of references to the linker supplied set length field.
Use the terminating NULL pointer as the end of list marker instead.
|
| 9363 |
28-Jun-1995 |
se |
Change message "not supported" to "no driver assigned", because
people tend to assume their devices won't work if they see this
message, though it may indicate that those devices just don't
need any PCI driver (e.g. devices that emulate an ISA card, or
that have been initialised by the BIOS and need no further care).
|
| 9361 |
28-Jun-1995 |
se |
Failure of the consistency checks for BIOS assigned mappings of busses
connected via PCI to PCI bridges is considered non fatal for now.
|
| 8876 |
30-May-1995 |
rgrimes |
Remove trailing whitespace.
|
| 8263 |
04-May-1995 |
dg |
bzero the malloced pci_devconf structure. This should fix the problem with
several of freefall's recent crashes.
|
| 7373 |
25-Mar-1995 |
bde |
Forward-declare kern_devconf for use in a prototype. Some drivers
include <pci/pcivar.h> without including <sys/devconf.h> and other
drivers include <pci/pcivar.h> before including <sys/devconf.h> if
certain identifiers are defined.
The devconf headers have convoluted interdependencies. <sys/devconf.h>
includes <machine/devconf.h> which includes <pci/pcivar.h>. Most
drivers include <sys/devconf.h> so even isa drivers depend on
<pci/pcivar.h>. For similar reasons, most drivers depend on another
pci header, on an isa header and on two scsi headers.
|
| 7265 |
23-Mar-1995 |
dg |
Restore my changes to initialize the kdc_shutdown routine pointer. Stefan
clobbered it in his previous commit and not having it causes the machine
to panic during reboot (as well as not doing the important shutdown callout).
|
| 7233 |
21-Mar-1995 |
se |
Completely new PCI code:
1) Supports PCI to PCI bridge devices (and tries to initialise them,
even if the BIOS is brain dead).
2) Supports shared PCI interrupts. Interrupt handlers now MUST return
'0' if they found nothing to do, '1' otherwise.
New features tested with i486 systems based on the Intel Saturn and
a DEC 4channel Ethernet card only, but expected to work on most systems.
The option PCI_REMAP has been removed !
Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
|
| 7104 |
17-Mar-1995 |
dg |
Added a new field to the pci_device struct called pd_shutdown to specify
a device specific shutdown routine for devconf. Assign the value of this
to the kern_devconf struct. Implement a device shutdown routine for if_de
that disables the device. This will stop the device from corrupting memory
after a reboot.
|
| 6842 |
02-Mar-1995 |
se |
Speed up PCI attach code by ommiting test if its result is ignored anyway.
|
| 6767 |
27-Feb-1995 |
se |
First try to add support for PCI-PCI bridge chips (written for the
DEC 21050 chip in particular, don't have specs of other such chips).
This should add support for Multiple-Ethernet PCI cards (e.g. Znyx 314).
Reviewed by: se
Submitted by: <wolf@kintaro.cologne.de> Wolfgang Stanglmeier
|
| 6704 |
25-Feb-1995 |
se |
Deal with systems, that lack a fully decoded PCI configuration space.
Submitted by: <wolf@kintaro.cologne.de> Wolfgang Stanglmeier
|
| 6630 |
22-Feb-1995 |
se |
New PCI attach code:
PCI BIOS mappings are retained, except if option PCI_REMAP
is specified in the kernel config file.
There is now a list of attach addresses, and the first
address that seems to make some device registers appear
is chosen.
Reviewed by: se
Submitted by: wolf
|
| 6401 |
14-Feb-1995 |
se |
ncr.c:
New config option "NCR_IOMAPPED" makes the driver use port I/O.
Put back in 53c815 defines, submitted by Mikael Hybsch <micke@dynas.se>.
These had got lost between cvs rev. 1.14 and now ...
pci.c:
Really write config space register.
Assign ports starting at 0xbc00.
Submitted by: wolf
Reviewed by: se
|
| 6360 |
14-Feb-1995 |
phk |
YFfix
|
| 6282 |
09-Feb-1995 |
se |
Try to detect overlapping PCI memory assignment.
(This can only happen with devices that are mapped
by the BIOS.)
Reviewed by: se
Submitted by: wolf (Wolfgang Stanglmeier)
|
| 6140 |
02-Feb-1995 |
se |
Removed misleading copyright note. This file contains just
definitions taken from the PCI specs. Part of them were typed
in by Wolfgang Stanglmeier, the (at that time unneeded) rest
by Charles Hannum (thanks !).
|
| 6132 |
02-Feb-1995 |
dg |
Reapplied all of Stefan's changes. What a mess - the files were modified
and moved at the same time. This made it *very* difficult to fix the
revision log lossage that happend when the files were moved. SIGH.
|
| 6131 |
02-Feb-1995 |
dg |
Fixed up include paths after copying these in the repository.
|
| 6100 |
01-Feb-1995 |
se |
Reviewed by: se
Submitted by: wolf (Wolfgang Stanglmeier)
Files moved here from sys/i386/pci, since they are meant to be
architecture independent.
|
| 4100 |
02-Nov-1994 |
se |
Submitted by:
Added hooks for "lsdev" ...
PCI devices should need no individual code for lsdev.
|
| 3870 |
25-Oct-1994 |
se |
Modified fifth parameter (imask) to register_intr() according to
new definition of that function.
|
| 3533 |
12-Oct-1994 |
se |
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de>
Bug fixed, that caused system hang on first interrupt on some motherboards.
New version of PCI bus configuration code, now supports dynamic interrupt
configuration (using BIOS supplied values).
NCR SCSI and DEC Ethernet driver patched to use this feature.
*** Remove PCI IRQ specifications from your kernel config file ! ***
|
| 3531 |
12-Oct-1994 |
se |
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de>
Files merged and name change: pci_device.h + pcibios.h -> pcireg.h
|
| 3251 |
01-Oct-1994 |
wollman |
Correct DEC -> Digital Equipment Corporation.
|
| 3166 |
28-Sep-1994 |
se |
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de>
New version with improved support for WIDE SCSI using the NCR 53c825.
Test for buggy secondary cache implementations.
PCI Int to IRQ mapping now specified per slot.
|
| 2815 |
16-Sep-1994 |
se |
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de> + <se>
Improved bus probing, symbolic names for registers..
Chip set parameters get dumped for intel PCI chip sets
(82424+82434 only, for now).
|
| 2753 |
14-Sep-1994 |
wollman |
Added a bit of missing functionality to make this work correctly on a
wider variety of systems. Include the deivers from pci_intel.c in
pci_config.c (I hope this is what was intended; my system works ok).
Use pmap_mapdev(). Automatically map any large linear frame buffers
or whatnot in VGA-style devices which ordinarily would not have their
own drivers, and don't call not_supported() for them. (This shuts up
complaints about my Matrox card.) Include the beginnings of what could
eventually become dynamically-loadable PCI devices. Allow for the
possibility of PCI devices simply providing a PCI veneer over an existing
ISA device, and shut up about them, too.
Make autoconfiguration text conform more to the style of other supported
buses.
|
| 2432 |
01-Sep-1994 |
se |
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de> + Stefan Esser <se>
Directory for PCI autoconfigure and device driver code.
|