rcreg.h revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (C) 1995 by Pavel Antonov, Moscow, Russia.
5 * Copyright (C) 1995 by Andrey A. Chernov, Moscow, Russia.
6 * Copyright (C) 2002 by John Baldwin <jhb@FreeBSD.org>
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: stable/11/sys/dev/rc/rcreg.h 330897 2018-03-14 03:19:51Z eadler $
31 */
32
33/*
34 * Cirrus Logic CD180 -based RISCom/8 board definitions
35 */
36
37/* Oscillator frequency - 19660.08Mhz / 2 */
38#define RC_OSCFREQ      9830400
39
40#define RC_BRD(s) ((s) == 0 ? 0 : \
41	(((RC_OSCFREQ + (s) / 2) / (s)) + CD180_CTICKS/2) / CD180_CTICKS)
42
43/* Riscom/8 board ISA I/O mapping */
44#define RC_IOMAP(r)     ((((r) & 07) << 1) | (((r) & ~07) << 7))
45
46/* I/O commands */
47#define RC_OUT(sc, addr, value)						\
48	bus_space_write_1((sc)->sc_bt, (sc)->sc_bh, RC_IOMAP(addr), (value))
49#define RC_IN(sc, addr)						\
50	bus_space_read_1((sc)->sc_bt, (sc)->sc_bh, RC_IOMAP(addr))
51
52/* Riscom on-board registers (mapping assumed) */
53#define RC_RIREG        0x100   /* Ring Indicator Register (read-only)  */
54#define RC_DTREG        0x100   /* DTR Register (write-only)            */
55#define RC_BSR          0x101   /* Board Status Register (read-only)    */
56#define RC_CTOUT        0x101   /* Clear Timeout (write-only)           */
57
58/* Board Status Register */
59#define RC_BSR_TOUT     0x08    /* Timeout                              */
60#define RC_BSR_RXINT    0x04    /* Receiver Interrupt                   */
61#define RC_BSR_TXINT    0x02    /* Transmitter Interrupt                */
62#define RC_BSR_MOINT    0x01    /* Modem Control Interrupt              */
63
64/* Interrupt groups */
65#define RC_MODEMGRP     0x01    /* Modem interrupt group                */
66#define RC_RXGRP        0x02    /* Receiver interrupt group             */
67#define RC_TXGRP        0x04    /* Transmitter interrupt group          */
68
69/* Priority Interrupt Level definitions */
70#define RC_PILR_MODEM   (0x80 | RC_MODEMGRP)
71#define RC_PILR_RX      (0x80 | RC_RXGRP   )
72#define RC_PILR_TX      (0x80 | RC_TXGRP   )
73