pm_machdep.c revision 330897
156545Smarkm/*- 256545Smarkm * SPDX-License-Identifier: BSD-3-Clause 356545Smarkm * 456545Smarkm * Copyright (c) 1992 Terrence R. Lambert. 556545Smarkm * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 4. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 36 * from: src/sys/i386/i386/machdep.c,v 1.385.2.3 2000/05/10 02:04:46 obrien 37 * JNPR: pm_machdep.c,v 1.9.2.1 2007/08/16 15:59:10 girish 38 */ 39 40#include <sys/cdefs.h> 41__FBSDID("$FreeBSD: stable/11/sys/mips/mips/pm_machdep.c 330897 2018-03-14 03:19:51Z eadler $"); 42 43#include "opt_compat.h" 44 45#include <sys/types.h> 46#include <sys/param.h> 47#include <sys/systm.h> 48#include <sys/sysent.h> 49#include <sys/proc.h> 50#include <sys/signalvar.h> 51#include <sys/exec.h> 52#include <sys/imgact.h> 53#include <sys/ucontext.h> 54#include <sys/lock.h> 55#include <sys/syscallsubr.h> 56#include <sys/sysproto.h> 57#include <sys/ptrace.h> 58#include <sys/syslog.h> 59#include <vm/vm.h> 60#include <vm/pmap.h> 61#include <vm/vm_map.h> 62#include <vm/vm_extern.h> 63#include <sys/user.h> 64#include <sys/uio.h> 65#include <machine/reg.h> 66#include <machine/md_var.h> 67#include <machine/sigframe.h> 68#include <machine/vmparam.h> 69#include <sys/vnode.h> 70#include <fs/pseudofs/pseudofs.h> 71#include <fs/procfs/procfs.h> 72 73#define UCONTEXT_MAGIC 0xACEDBADE 74 75/* 76 * Send an interrupt to process. 77 * 78 * Stack is set up to allow sigcode stored 79 * at top to call routine, followed by kcall 80 * to sigreturn routine below. After sigreturn 81 * resets the signal mask, the stack, and the 82 * frame pointer, it returns to the user 83 * specified pc, psl. 84 */ 85void 86sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 87{ 88 struct proc *p; 89 struct thread *td; 90 struct trapframe *regs; 91 struct sigacts *psp; 92 struct sigframe sf, *sfp; 93 int sig; 94 int oonstack; 95 96 td = curthread; 97 p = td->td_proc; 98 PROC_LOCK_ASSERT(p, MA_OWNED); 99 sig = ksi->ksi_signo; 100 psp = p->p_sigacts; 101 mtx_assert(&psp->ps_mtx, MA_OWNED); 102 103 regs = td->td_frame; 104 oonstack = sigonstack(regs->sp); 105 106 /* save user context */ 107 bzero(&sf, sizeof(struct sigframe)); 108 sf.sf_uc.uc_sigmask = *mask; 109 sf.sf_uc.uc_stack = td->td_sigstk; 110 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 111 sf.sf_uc.uc_mcontext.mc_pc = regs->pc; 112 sf.sf_uc.uc_mcontext.mullo = regs->mullo; 113 sf.sf_uc.uc_mcontext.mulhi = regs->mulhi; 114 sf.sf_uc.uc_mcontext.mc_tls = td->td_md.md_tls; 115 sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC; /* magic number */ 116 bcopy((void *)®s->ast, (void *)&sf.sf_uc.uc_mcontext.mc_regs[1], 117 sizeof(sf.sf_uc.uc_mcontext.mc_regs) - sizeof(register_t)); 118 sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED; 119 if (sf.sf_uc.uc_mcontext.mc_fpused) { 120 /* if FPU has current state, save it first */ 121 if (td == PCPU_GET(fpcurthread)) 122 MipsSaveCurFPState(td); 123 bcopy((void *)&td->td_frame->f0, 124 (void *)sf.sf_uc.uc_mcontext.mc_fpregs, 125 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs)); 126 } 127 128 /* Allocate and validate space for the signal handler context. */ 129 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 130 SIGISMEMBER(psp->ps_sigonstack, sig)) { 131 sfp = (struct sigframe *)(((uintptr_t)td->td_sigstk.ss_sp + 132 td->td_sigstk.ss_size - sizeof(struct sigframe)) 133 & ~(sizeof(__int64_t) - 1)); 134 } else 135 sfp = (struct sigframe *)((vm_offset_t)(regs->sp - 136 sizeof(struct sigframe)) & ~(sizeof(__int64_t) - 1)); 137 138 /* Build the argument list for the signal handler. */ 139 regs->a0 = sig; 140 regs->a2 = (register_t)(intptr_t)&sfp->sf_uc; 141 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 142 /* Signal handler installed with SA_SIGINFO. */ 143 regs->a1 = (register_t)(intptr_t)&sfp->sf_si; 144 /* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */ 145 146 /* fill siginfo structure */ 147 sf.sf_si.si_signo = sig; 148 sf.sf_si.si_code = ksi->ksi_code; 149 sf.sf_si.si_addr = (void*)(intptr_t)regs->badvaddr; 150 } else { 151 /* Old FreeBSD-style arguments. */ 152 regs->a1 = ksi->ksi_code; 153 regs->a3 = regs->badvaddr; 154 /* sf.sf_ahu.sf_handler = catcher; */ 155 } 156 157 mtx_unlock(&psp->ps_mtx); 158 PROC_UNLOCK(p); 159 160 /* 161 * Copy the sigframe out to the user's stack. 162 */ 163 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) { 164 /* 165 * Something is wrong with the stack pointer. 166 * ...Kill the process. 167 */ 168 PROC_LOCK(p); 169 sigexit(td, SIGILL); 170 } 171 172 regs->pc = (register_t)(intptr_t)catcher; 173 regs->t9 = (register_t)(intptr_t)catcher; 174 regs->sp = (register_t)(intptr_t)sfp; 175 /* 176 * Signal trampoline code is at base of user stack. 177 */ 178 regs->ra = (register_t)(intptr_t)PS_STRINGS - *(p->p_sysent->sv_szsigcode); 179 PROC_LOCK(p); 180 mtx_lock(&psp->ps_mtx); 181} 182 183/* 184 * System call to cleanup state after a signal 185 * has been taken. Reset signal mask and 186 * stack state from context left by sendsig (above). 187 * Return to previous pc as specified by 188 * context left by sendsig. 189 */ 190int 191sys_sigreturn(struct thread *td, struct sigreturn_args *uap) 192{ 193 ucontext_t uc; 194 int error; 195 196 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 197 if (error != 0) 198 return (error); 199 200 error = set_mcontext(td, &uc.uc_mcontext); 201 if (error != 0) 202 return (error); 203 204 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 205 206 return (EJUSTRETURN); 207} 208 209int 210ptrace_set_pc(struct thread *td, unsigned long addr) 211{ 212 td->td_frame->pc = (register_t) addr; 213 return 0; 214} 215 216static int 217ptrace_read_int(struct thread *td, off_t addr, int *v) 218{ 219 220 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v)) 221 return (ENOMEM); 222 return (0); 223} 224 225static int 226ptrace_write_int(struct thread *td, off_t addr, int v) 227{ 228 229 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v)) 230 return (ENOMEM); 231 return (0); 232} 233 234int 235ptrace_single_step(struct thread *td) 236{ 237 unsigned va; 238 struct trapframe *locr0 = td->td_frame; 239 int i; 240 int bpinstr = MIPS_BREAK_SSTEP; 241 int curinstr; 242 struct proc *p; 243 244 p = td->td_proc; 245 PROC_UNLOCK(p); 246 /* 247 * Fetch what's at the current location. 248 */ 249 ptrace_read_int(td, (off_t)locr0->pc, &curinstr); 250 251 /* compute next address after current location */ 252 if(curinstr != 0) { 253 va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr, 254 (uintptr_t)&curinstr); 255 } else { 256 va = locr0->pc + 4; 257 } 258 if (td->td_md.md_ss_addr) { 259 printf("SS %s (%d): breakpoint already set at %x (va %x)\n", 260 p->p_comm, p->p_pid, td->td_md.md_ss_addr, va); /* XXX */ 261 return (EFAULT); 262 } 263 td->td_md.md_ss_addr = va; 264 /* 265 * Fetch what's at the current location. 266 */ 267 ptrace_read_int(td, (off_t)va, &td->td_md.md_ss_instr); 268 269 /* 270 * Store breakpoint instruction at the "next" location now. 271 */ 272 i = ptrace_write_int (td, va, bpinstr); 273 274 /* 275 * The sync'ing of I & D caches is done by procfs_domem() 276 * through procfs_rwmem(). 277 */ 278 279 PROC_LOCK(p); 280 if (i < 0) 281 return (EFAULT); 282#if 0 283 printf("SS %s (%d): breakpoint set at %x: %x (pc %x) br %x\n", 284 p->p_comm, p->p_pid, p->p_md.md_ss_addr, 285 p->p_md.md_ss_instr, locr0->pc, curinstr); /* XXX */ 286#endif 287 return (0); 288} 289 290 291void 292makectx(struct trapframe *tf, struct pcb *pcb) 293{ 294 295 pcb->pcb_regs.ra = tf->ra; 296 pcb->pcb_regs.pc = tf->pc; 297 pcb->pcb_regs.sp = tf->sp; 298} 299 300int 301fill_regs(struct thread *td, struct reg *regs) 302{ 303 memcpy(regs, td->td_frame, sizeof(struct reg)); 304 return (0); 305} 306 307int 308set_regs(struct thread *td, struct reg *regs) 309{ 310 struct trapframe *f; 311 register_t sr; 312 313 f = (struct trapframe *) td->td_frame; 314 /* 315 * Don't allow the user to change SR 316 */ 317 sr = f->sr; 318 memcpy(td->td_frame, regs, sizeof(struct reg)); 319 f->sr = sr; 320 return (0); 321} 322 323int 324get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 325{ 326 struct trapframe *tp; 327 328 tp = td->td_frame; 329 PROC_LOCK(curthread->td_proc); 330 mcp->mc_onstack = sigonstack(tp->sp); 331 PROC_UNLOCK(curthread->td_proc); 332 bcopy((void *)&td->td_frame->zero, (void *)&mcp->mc_regs, 333 sizeof(mcp->mc_regs)); 334 335 mcp->mc_fpused = td->td_md.md_flags & MDTD_FPUSED; 336 if (mcp->mc_fpused) { 337 bcopy((void *)&td->td_frame->f0, (void *)&mcp->mc_fpregs, 338 sizeof(mcp->mc_fpregs)); 339 } 340 if (flags & GET_MC_CLEAR_RET) { 341 mcp->mc_regs[V0] = 0; 342 mcp->mc_regs[V1] = 0; 343 mcp->mc_regs[A3] = 0; 344 } 345 346 mcp->mc_pc = td->td_frame->pc; 347 mcp->mullo = td->td_frame->mullo; 348 mcp->mulhi = td->td_frame->mulhi; 349 mcp->mc_tls = td->td_md.md_tls; 350 return (0); 351} 352 353int 354set_mcontext(struct thread *td, mcontext_t *mcp) 355{ 356 struct trapframe *tp; 357 358 tp = td->td_frame; 359 bcopy((void *)&mcp->mc_regs, (void *)&td->td_frame->zero, 360 sizeof(mcp->mc_regs)); 361 362 td->td_md.md_flags = mcp->mc_fpused & MDTD_FPUSED; 363 if (mcp->mc_fpused) { 364 bcopy((void *)&mcp->mc_fpregs, (void *)&td->td_frame->f0, 365 sizeof(mcp->mc_fpregs)); 366 } 367 td->td_frame->pc = mcp->mc_pc; 368 td->td_frame->mullo = mcp->mullo; 369 td->td_frame->mulhi = mcp->mulhi; 370 td->td_md.md_tls = mcp->mc_tls; 371 /* Dont let user to set any bits in status and cause registers. */ 372 373 return (0); 374} 375 376int 377fill_fpregs(struct thread *td, struct fpreg *fpregs) 378{ 379 if (td == PCPU_GET(fpcurthread)) 380 MipsSaveCurFPState(td); 381 memcpy(fpregs, &td->td_frame->f0, sizeof(struct fpreg)); 382 return 0; 383} 384 385int 386set_fpregs(struct thread *td, struct fpreg *fpregs) 387{ 388 if (PCPU_GET(fpcurthread) == td) 389 PCPU_SET(fpcurthread, (struct thread *)0); 390 memcpy(&td->td_frame->f0, fpregs, sizeof(struct fpreg)); 391 return 0; 392} 393 394 395/* 396 * Clear registers on exec 397 * $sp is set to the stack pointer passed in. $pc is set to the entry 398 * point given by the exec_package passed in, as is $t9 (used for PIC 399 * code by the MIPS elf abi). 400 */ 401void 402exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 403{ 404 405 bzero((caddr_t)td->td_frame, sizeof(struct trapframe)); 406 407 /* 408 * The stack pointer has to be aligned to accommodate the largest 409 * datatype at minimum. This probably means it should be 16-byte 410 * aligned, but for now we're 8-byte aligning it. 411 */ 412 td->td_frame->sp = ((register_t) stack) & ~(sizeof(__int64_t) - 1); 413 414 /* 415 * If we're running o32 or n32 programs but have 64-bit registers, 416 * GCC may use stack-relative addressing near the top of user 417 * address space that, due to sign extension, will yield an 418 * invalid address. For instance, if sp is 0x7fffff00 then GCC 419 * might do something like this to load a word from 0x7ffffff0: 420 * 421 * addu sp, sp, 32768 422 * lw t0, -32528(sp) 423 * 424 * On systems with 64-bit registers, sp is sign-extended to 425 * 0xffffffff80007f00 and the load is instead done from 426 * 0xffffffff7ffffff0. 427 * 428 * To prevent this, we subtract 64K from the stack pointer here. 429 * 430 * For consistency, we should just always do this unless we're 431 * running n64 programs. For now, since we don't support 432 * COMPAT_FREEBSD32 on n64 kernels, we just do it unless we're 433 * running n64 kernels. 434 */ 435#if !defined(__mips_n64) 436 td->td_frame->sp -= 65536; 437#endif 438 439 td->td_frame->pc = imgp->entry_addr & ~3; 440 td->td_frame->t9 = imgp->entry_addr & ~3; /* abicall req */ 441 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE | 442 (mips_rd_status() & MIPS_SR_INT_MASK); 443#if defined(__mips_n32) 444 td->td_frame->sr |= MIPS_SR_PX; 445#elif defined(__mips_n64) 446 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX; 447#endif 448 /* 449 * FREEBSD_DEVELOPERS_FIXME: 450 * Setup any other CPU-Specific registers (Not MIPS Standard) 451 * and/or bits in other standard MIPS registers (if CPU-Specific) 452 * that are needed. 453 */ 454 455 /* 456 * Set up arguments for the rtld-capable crt0: 457 * a0 stack pointer 458 * a1 rtld cleanup (filled in by dynamic loader) 459 * a2 rtld object (filled in by dynamic loader) 460 * a3 ps_strings 461 */ 462 td->td_frame->a0 = (register_t) stack; 463 td->td_frame->a1 = 0; 464 td->td_frame->a2 = 0; 465 td->td_frame->a3 = (register_t)imgp->ps_strings; 466 467 td->td_md.md_flags &= ~MDTD_FPUSED; 468 if (PCPU_GET(fpcurthread) == td) 469 PCPU_SET(fpcurthread, (struct thread *)0); 470 td->td_md.md_ss_addr = 0; 471} 472 473int 474ptrace_clear_single_step(struct thread *td) 475{ 476 int i; 477 struct proc *p; 478 479 p = td->td_proc; 480 PROC_LOCK_ASSERT(p, MA_OWNED); 481 if (!td->td_md.md_ss_addr) 482 return EINVAL; 483 484 /* 485 * Restore original instruction and clear BP 486 */ 487 i = ptrace_write_int (td, td->td_md.md_ss_addr, td->td_md.md_ss_instr); 488 489 /* The sync'ing of I & D caches is done by procfs_domem(). */ 490 491 if (i < 0) { 492 log(LOG_ERR, "SS %s %d: can't restore instruction at %x: %x\n", 493 p->p_comm, p->p_pid, td->td_md.md_ss_addr, 494 td->td_md.md_ss_instr); 495 } 496 td->td_md.md_ss_addr = 0; 497 return 0; 498} 499