fenv.h revision 331722 
1/*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: stable/11/lib/msun/x86/fenv.h 331722 2018-03-29 02:50:57Z eadler $
27 */
28
29#ifndef	_FENV_H_
30#define	_FENV_H_
31
32#include <sys/cdefs.h>
33#include <sys/_types.h>
34
35#ifndef	__fenv_static
36#define	__fenv_static	static
37#endif
38
39typedef	__uint16_t	fexcept_t;
40
41/* Exception flags */
42#define	FE_INVALID	0x01
43#define	FE_DENORMAL	0x02
44#define	FE_DIVBYZERO	0x04
45#define	FE_OVERFLOW	0x08
46#define	FE_UNDERFLOW	0x10
47#define	FE_INEXACT	0x20
48#define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
49			 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
50
51/* Rounding modes */
52#define	FE_TONEAREST	0x0000
53#define	FE_DOWNWARD	0x0400
54#define	FE_UPWARD	0x0800
55#define	FE_TOWARDZERO	0x0c00
56#define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
57			 FE_UPWARD | FE_TOWARDZERO)
58
59/*
60 * As compared to the x87 control word, the SSE unit's control word
61 * has the rounding control bits offset by 3 and the exception mask
62 * bits offset by 7.
63 */
64#define	_SSE_ROUND_SHIFT	3
65#define	_SSE_EMASK_SHIFT	7
66
67#ifdef __i386__
68/*
69 * To preserve binary compatibility with FreeBSD 5.3, we pack the
70 * mxcsr into some reserved fields, rather than changing sizeof(fenv_t).
71 */
72typedef struct {
73	__uint16_t	__control;
74	__uint16_t      __mxcsr_hi;
75	__uint16_t	__status;
76	__uint16_t      __mxcsr_lo;
77	__uint32_t	__tag;
78	char		__other[16];
79} fenv_t;
80#else /* __amd64__ */
81typedef struct {
82	struct {
83		__uint32_t	__control;
84		__uint32_t	__status;
85		__uint32_t	__tag;
86		char		__other[16];
87	} __x87;
88	__uint32_t		__mxcsr;
89} fenv_t;
90#endif /* __i386__ */
91
92__BEGIN_DECLS
93
94/* Default floating-point environment */
95extern const fenv_t	__fe_dfl_env;
96#define	FE_DFL_ENV	(&__fe_dfl_env)
97
98#define	__fldcw(__cw)		__asm __volatile("fldcw %0" : : "m" (__cw))
99#define	__fldenv(__env)		__asm __volatile("fldenv %0" : : "m" (__env))
100#define	__fldenvx(__env)	__asm __volatile("fldenv %0" : : "m" (__env)  \
101				: "st", "st(1)", "st(2)", "st(3)", "st(4)",   \
102				"st(5)", "st(6)", "st(7)")
103#define	__fnclex()		__asm __volatile("fnclex")
104#define	__fnstenv(__env)	__asm __volatile("fnstenv %0" : "=m" (*(__env)))
105#define	__fnstcw(__cw)		__asm __volatile("fnstcw %0" : "=m" (*(__cw)))
106#define	__fnstsw(__sw)		__asm __volatile("fnstsw %0" : "=am" (*(__sw)))
107#define	__fwait()		__asm __volatile("fwait")
108#define	__ldmxcsr(__csr)	__asm __volatile("ldmxcsr %0" : : "m" (__csr))
109#define	__stmxcsr(__csr)	__asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
110
111int fegetenv(fenv_t *__envp);
112int feholdexcept(fenv_t *__envp);
113int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
114int feraiseexcept(int __excepts);
115int feupdateenv(const fenv_t *__envp);
116
117__fenv_static inline int
118fegetround(void)
119{
120	__uint16_t __control;
121
122	/*
123	 * We assume that the x87 and the SSE unit agree on the
124	 * rounding mode.  Reading the control word on the x87 turns
125	 * out to be about 5 times faster than reading it on the SSE
126	 * unit on an Opteron 244.
127	 */
128	__fnstcw(&__control);
129	return (__control & _ROUND_MASK);
130}
131
132#if __BSD_VISIBLE
133
134int feenableexcept(int __mask);
135int fedisableexcept(int __mask);
136
137/* We currently provide no external definition of fegetexcept(). */
138static inline int
139fegetexcept(void)
140{
141	__uint16_t __control;
142
143	/*
144	 * We assume that the masks for the x87 and the SSE unit are
145	 * the same.
146	 */
147	__fnstcw(&__control);
148	return (~__control & FE_ALL_EXCEPT);
149}
150
151#endif /* __BSD_VISIBLE */
152
153#ifdef __i386__
154
155/* After testing for SSE support once, we cache the result in __has_sse. */
156enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK };
157extern enum __sse_support __has_sse;
158int __test_sse(void);
159#ifdef __SSE__
160#define	__HAS_SSE()	1
161#else
162#define	__HAS_SSE()	(__has_sse == __SSE_YES ||			\
163			 (__has_sse == __SSE_UNK && __test_sse()))
164#endif
165
166#define	__get_mxcsr(env)	(((env).__mxcsr_hi << 16) |	\
167				 ((env).__mxcsr_lo))
168#define	__set_mxcsr(env, x)	do {				\
169	(env).__mxcsr_hi = (__uint32_t)(x) >> 16;		\
170	(env).__mxcsr_lo = (__uint16_t)(x);			\
171} while (0)
172
173__fenv_static inline int
174feclearexcept(int __excepts)
175{
176	fenv_t __env;
177	__uint32_t __mxcsr;
178
179	if (__excepts == FE_ALL_EXCEPT) {
180		__fnclex();
181	} else {
182		__fnstenv(&__env);
183		__env.__status &= ~__excepts;
184		__fldenv(__env);
185	}
186	if (__HAS_SSE()) {
187		__stmxcsr(&__mxcsr);
188		__mxcsr &= ~__excepts;
189		__ldmxcsr(__mxcsr);
190	}
191	return (0);
192}
193
194__fenv_static inline int
195fegetexceptflag(fexcept_t *__flagp, int __excepts)
196{
197	__uint32_t __mxcsr;
198	__uint16_t __status;
199
200	__fnstsw(&__status);
201	if (__HAS_SSE())
202		__stmxcsr(&__mxcsr);
203	else
204		__mxcsr = 0;
205	*__flagp = (__mxcsr | __status) & __excepts;
206	return (0);
207}
208
209__fenv_static inline int
210fetestexcept(int __excepts)
211{
212	__uint32_t __mxcsr;
213	__uint16_t __status;
214
215	__fnstsw(&__status);
216	if (__HAS_SSE())
217		__stmxcsr(&__mxcsr);
218	else
219		__mxcsr = 0;
220	return ((__status | __mxcsr) & __excepts);
221}
222
223__fenv_static inline int
224fesetround(int __round)
225{
226	__uint32_t __mxcsr;
227	__uint16_t __control;
228
229	if (__round & ~_ROUND_MASK)
230		return (-1);
231
232	__fnstcw(&__control);
233	__control &= ~_ROUND_MASK;
234	__control |= __round;
235	__fldcw(__control);
236
237	if (__HAS_SSE()) {
238		__stmxcsr(&__mxcsr);
239		__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
240		__mxcsr |= __round << _SSE_ROUND_SHIFT;
241		__ldmxcsr(__mxcsr);
242	}
243
244	return (0);
245}
246
247__fenv_static inline int
248fesetenv(const fenv_t *__envp)
249{
250	fenv_t __env = *__envp;
251	__uint32_t __mxcsr;
252
253	__mxcsr = __get_mxcsr(__env);
254	__set_mxcsr(__env, 0xffffffff);
255	/*
256	 * XXX Using fldenvx() instead of fldenv() tells the compiler that this
257	 * instruction clobbers the i387 register stack.  This happens because
258	 * we restore the tag word from the saved environment.  Normally, this
259	 * would happen anyway and we wouldn't care, because the ABI allows
260	 * function calls to clobber the i387 regs.  However, fesetenv() is
261	 * inlined, so we need to be more careful.
262	 */
263	__fldenvx(__env);
264	if (__HAS_SSE())
265		__ldmxcsr(__mxcsr);
266	return (0);
267}
268
269#else /* __amd64__ */
270
271__fenv_static inline int
272feclearexcept(int __excepts)
273{
274	fenv_t __env;
275
276	if (__excepts == FE_ALL_EXCEPT) {
277		__fnclex();
278	} else {
279		__fnstenv(&__env.__x87);
280		__env.__x87.__status &= ~__excepts;
281		__fldenv(__env.__x87);
282	}
283	__stmxcsr(&__env.__mxcsr);
284	__env.__mxcsr &= ~__excepts;
285	__ldmxcsr(__env.__mxcsr);
286	return (0);
287}
288
289__fenv_static inline int
290fegetexceptflag(fexcept_t *__flagp, int __excepts)
291{
292	__uint32_t __mxcsr;
293	__uint16_t __status;
294
295	__stmxcsr(&__mxcsr);
296	__fnstsw(&__status);
297	*__flagp = (__mxcsr | __status) & __excepts;
298	return (0);
299}
300
301__fenv_static inline int
302fetestexcept(int __excepts)
303{
304	__uint32_t __mxcsr;
305	__uint16_t __status;
306
307	__stmxcsr(&__mxcsr);
308	__fnstsw(&__status);
309	return ((__status | __mxcsr) & __excepts);
310}
311
312__fenv_static inline int
313fesetround(int __round)
314{
315	__uint32_t __mxcsr;
316	__uint16_t __control;
317
318	if (__round & ~_ROUND_MASK)
319		return (-1);
320
321	__fnstcw(&__control);
322	__control &= ~_ROUND_MASK;
323	__control |= __round;
324	__fldcw(__control);
325
326	__stmxcsr(&__mxcsr);
327	__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
328	__mxcsr |= __round << _SSE_ROUND_SHIFT;
329	__ldmxcsr(__mxcsr);
330
331	return (0);
332}
333
334__fenv_static inline int
335fesetenv(const fenv_t *__envp)
336{
337
338	/*
339	 * XXX Using fldenvx() instead of fldenv() tells the compiler that this
340	 * instruction clobbers the i387 register stack.  This happens because
341	 * we restore the tag word from the saved environment.  Normally, this
342	 * would happen anyway and we wouldn't care, because the ABI allows
343	 * function calls to clobber the i387 regs.  However, fesetenv() is
344	 * inlined, so we need to be more careful.
345	 */
346	__fldenvx(__envp->__x87);
347	__ldmxcsr(__envp->__mxcsr);
348	return (0);
349}
350
351#endif /* __i386__ */
352
353__END_DECLS
354
355#endif	/* !_FENV_H_ */
356