t4_l2t.c revision 331722
1/*-
2 * Copyright (c) 2012 Chelsio Communications, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: stable/11/sys/dev/cxgbe/t4_l2t.c 331722 2018-03-29 02:50:57Z eadler $");
28
29#include "opt_inet.h"
30#include "opt_inet6.h"
31
32#include <sys/param.h>
33#include <sys/eventhandler.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/module.h>
37#include <sys/bus.h>
38#include <sys/lock.h>
39#include <sys/mutex.h>
40#include <sys/rwlock.h>
41#include <sys/socket.h>
42#include <sys/sbuf.h>
43#include <netinet/in.h>
44
45#include "common/common.h"
46#include "common/t4_msg.h"
47#include "t4_l2t.h"
48
49/*
50 * Module locking notes:  There is a RW lock protecting the L2 table as a
51 * whole plus a spinlock per L2T entry.  Entry lookups and allocations happen
52 * under the protection of the table lock, individual entry changes happen
53 * while holding that entry's spinlock.  The table lock nests outside the
54 * entry locks.  Allocations of new entries take the table lock as writers so
55 * no other lookups can happen while allocating new entries.  Entry updates
56 * take the table lock as readers so multiple entries can be updated in
57 * parallel.  An L2T entry can be dropped by decrementing its reference count
58 * and therefore can happen in parallel with entry allocation but no entry
59 * can change state or increment its ref count during allocation as both of
60 * these perform lookups.
61 *
62 * Note: We do not take references to ifnets in this module because both
63 * the TOE and the sockets already hold references to the interfaces and the
64 * lifetime of an L2T entry is fully contained in the lifetime of the TOE.
65 */
66
67/*
68 * Allocate a free L2T entry.  Must be called with l2t_data.lock held.
69 */
70struct l2t_entry *
71t4_alloc_l2e(struct l2t_data *d)
72{
73	struct l2t_entry *end, *e, **p;
74
75	rw_assert(&d->lock, RA_WLOCKED);
76
77	if (!atomic_load_acq_int(&d->nfree))
78		return (NULL);
79
80	/* there's definitely a free entry */
81	for (e = d->rover, end = &d->l2tab[d->l2t_size]; e != end; ++e)
82		if (atomic_load_acq_int(&e->refcnt) == 0)
83			goto found;
84
85	for (e = d->l2tab; atomic_load_acq_int(&e->refcnt); ++e)
86		continue;
87found:
88	d->rover = e + 1;
89	atomic_subtract_int(&d->nfree, 1);
90
91	/*
92	 * The entry we found may be an inactive entry that is
93	 * presently in the hash table.  We need to remove it.
94	 */
95	if (e->state < L2T_STATE_SWITCHING) {
96		for (p = &d->l2tab[e->hash].first; *p; p = &(*p)->next) {
97			if (*p == e) {
98				*p = e->next;
99				e->next = NULL;
100				break;
101			}
102		}
103	}
104
105	e->state = L2T_STATE_UNUSED;
106	return (e);
107}
108
109/*
110 * Write an L2T entry.  Must be called with the entry locked.
111 * The write may be synchronous or asynchronous.
112 */
113int
114t4_write_l2e(struct l2t_entry *e, int sync)
115{
116	struct sge_wrq *wrq;
117	struct adapter *sc;
118	struct wrq_cookie cookie;
119	struct cpl_l2t_write_req *req;
120	int idx;
121
122	mtx_assert(&e->lock, MA_OWNED);
123	MPASS(e->wrq != NULL);
124
125	wrq = e->wrq;
126	sc = wrq->adapter;
127
128	req = start_wrq_wr(wrq, howmany(sizeof(*req), 16), &cookie);
129	if (req == NULL)
130		return (ENOMEM);
131
132	idx = e->idx + sc->vres.l2t.start;
133	INIT_TP_WR(req, 0);
134	OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, idx |
135	    V_SYNC_WR(sync) | V_TID_QID(e->iqid)));
136	req->params = htons(V_L2T_W_PORT(e->lport) | V_L2T_W_NOREPLY(!sync));
137	req->l2t_idx = htons(idx);
138	req->vlan = htons(e->vlan);
139	memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac));
140
141	commit_wrq_wr(wrq, req, &cookie);
142
143	if (sync && e->state != L2T_STATE_SWITCHING)
144		e->state = L2T_STATE_SYNC_WRITE;
145
146	return (0);
147}
148
149/*
150 * Allocate an L2T entry for use by a switching rule.  Such need to be
151 * explicitly freed and while busy they are not on any hash chain, so normal
152 * address resolution updates do not see them.
153 */
154struct l2t_entry *
155t4_l2t_alloc_switching(struct l2t_data *d)
156{
157	struct l2t_entry *e;
158
159	rw_wlock(&d->lock);
160	e = t4_alloc_l2e(d);
161	if (e) {
162		mtx_lock(&e->lock);          /* avoid race with t4_l2t_free */
163		e->state = L2T_STATE_SWITCHING;
164		atomic_store_rel_int(&e->refcnt, 1);
165		mtx_unlock(&e->lock);
166	}
167	rw_wunlock(&d->lock);
168	return e;
169}
170
171/*
172 * Sets/updates the contents of a switching L2T entry that has been allocated
173 * with an earlier call to @t4_l2t_alloc_switching.
174 */
175int
176t4_l2t_set_switching(struct adapter *sc, struct l2t_entry *e, uint16_t vlan,
177    uint8_t port, uint8_t *eth_addr)
178{
179	int rc;
180
181	e->vlan = vlan;
182	e->lport = port;
183	e->wrq = &sc->sge.mgmtq;
184	e->iqid = sc->sge.fwq.abs_id;
185	memcpy(e->dmac, eth_addr, ETHER_ADDR_LEN);
186	mtx_lock(&e->lock);
187	rc = t4_write_l2e(e, 0);
188	mtx_unlock(&e->lock);
189	return (rc);
190}
191
192int
193t4_init_l2t(struct adapter *sc, int flags)
194{
195	int i, l2t_size;
196	struct l2t_data *d;
197
198	l2t_size = sc->vres.l2t.size;
199	if (l2t_size < 2)	/* At least 1 bucket for IP and 1 for IPv6 */
200		return (EINVAL);
201
202	d = malloc(sizeof(*d) + l2t_size * sizeof (struct l2t_entry), M_CXGBE,
203	    M_ZERO | flags);
204	if (!d)
205		return (ENOMEM);
206
207	d->l2t_size = l2t_size;
208	d->rover = d->l2tab;
209	atomic_store_rel_int(&d->nfree, l2t_size);
210	rw_init(&d->lock, "L2T");
211
212	for (i = 0; i < l2t_size; i++) {
213		struct l2t_entry *e = &d->l2tab[i];
214
215		e->idx = i;
216		e->state = L2T_STATE_UNUSED;
217		mtx_init(&e->lock, "L2T_E", NULL, MTX_DEF);
218		STAILQ_INIT(&e->wr_list);
219		atomic_store_rel_int(&e->refcnt, 0);
220	}
221
222	sc->l2t = d;
223
224	return (0);
225}
226
227int
228t4_free_l2t(struct l2t_data *d)
229{
230	int i;
231
232	for (i = 0; i < d->l2t_size; i++)
233		mtx_destroy(&d->l2tab[i].lock);
234	rw_destroy(&d->lock);
235	free(d, M_CXGBE);
236
237	return (0);
238}
239
240int
241do_l2t_write_rpl(struct sge_iq *iq, const struct rss_header *rss,
242    struct mbuf *m)
243{
244	const struct cpl_l2t_write_rpl *rpl = (const void *)(rss + 1);
245	unsigned int tid = GET_TID(rpl);
246	unsigned int idx = tid % L2T_SIZE;
247
248	if (__predict_false(rpl->status != CPL_ERR_NONE)) {
249		log(LOG_ERR,
250		    "Unexpected L2T_WRITE_RPL (%u) for entry at hw_idx %u\n",
251		    rpl->status, idx);
252		return (EINVAL);
253	}
254
255	return (0);
256}
257
258#ifdef SBUF_DRAIN
259static inline unsigned int
260vlan_prio(const struct l2t_entry *e)
261{
262	return e->vlan >> 13;
263}
264
265static char
266l2e_state(const struct l2t_entry *e)
267{
268	switch (e->state) {
269	case L2T_STATE_VALID: return 'V';  /* valid, fast-path entry */
270	case L2T_STATE_STALE: return 'S';  /* needs revalidation, but usable */
271	case L2T_STATE_SYNC_WRITE: return 'W';
272	case L2T_STATE_RESOLVING: return STAILQ_EMPTY(&e->wr_list) ? 'R' : 'A';
273	case L2T_STATE_SWITCHING: return 'X';
274	default: return 'U';
275	}
276}
277
278int
279sysctl_l2t(SYSCTL_HANDLER_ARGS)
280{
281	struct adapter *sc = arg1;
282	struct l2t_data *l2t = sc->l2t;
283	struct l2t_entry *e;
284	struct sbuf *sb;
285	int rc, i, header = 0;
286	char ip[INET6_ADDRSTRLEN];
287
288	if (l2t == NULL)
289		return (ENXIO);
290
291	rc = sysctl_wire_old_buffer(req, 0);
292	if (rc != 0)
293		return (rc);
294
295	sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req);
296	if (sb == NULL)
297		return (ENOMEM);
298
299	e = &l2t->l2tab[0];
300	for (i = 0; i < l2t->l2t_size; i++, e++) {
301		mtx_lock(&e->lock);
302		if (e->state == L2T_STATE_UNUSED)
303			goto skip;
304
305		if (header == 0) {
306			sbuf_printf(sb, " Idx IP address      "
307			    "Ethernet address  VLAN/P LP State Users Port");
308			header = 1;
309		}
310		if (e->state == L2T_STATE_SWITCHING)
311			ip[0] = 0;
312		else {
313			inet_ntop(e->ipv6 ? AF_INET6 : AF_INET, &e->addr[0],
314			    &ip[0], sizeof(ip));
315		}
316
317		/*
318		 * XXX: IPv6 addresses may not align properly in the output.
319		 */
320		sbuf_printf(sb, "\n%4u %-15s %02x:%02x:%02x:%02x:%02x:%02x %4d"
321			   " %u %2u   %c   %5u %s",
322			   e->idx, ip, e->dmac[0], e->dmac[1], e->dmac[2],
323			   e->dmac[3], e->dmac[4], e->dmac[5],
324			   e->vlan & 0xfff, vlan_prio(e), e->lport,
325			   l2e_state(e), atomic_load_acq_int(&e->refcnt),
326			   e->ifp ? e->ifp->if_xname : "-");
327skip:
328		mtx_unlock(&e->lock);
329	}
330
331	rc = sbuf_finish(sb);
332	sbuf_delete(sb);
333
334	return (rc);
335}
336#endif
337