if_ath_tdma.c revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 18 * NO WARRANTY 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29 * THE POSSIBILITY OF SUCH DAMAGES. 30 */ 31 32#include <sys/cdefs.h> 33__FBSDID("$FreeBSD: stable/11/sys/dev/ath/if_ath_tdma.c 330897 2018-03-14 03:19:51Z eadler $"); 34 35/* 36 * Driver for the Atheros Wireless LAN controller. 37 * 38 * This software is derived from work of Atsushi Onoe; his contribution 39 * is greatly appreciated. 40 */ 41 42#include "opt_inet.h" 43#include "opt_ath.h" 44/* 45 * This is needed for register operations which are performed 46 * by the driver - eg, calls to ath_hal_gettsf32(). 47 * 48 * It's also required for any AH_DEBUG checks in here, eg the 49 * module dependencies. 50 */ 51#include "opt_ah.h" 52#include "opt_wlan.h" 53 54#include <sys/param.h> 55#include <sys/systm.h> 56#include <sys/sysctl.h> 57#include <sys/mbuf.h> 58#include <sys/malloc.h> 59#include <sys/lock.h> 60#include <sys/mutex.h> 61#include <sys/kernel.h> 62#include <sys/socket.h> 63#include <sys/sockio.h> 64#include <sys/errno.h> 65#include <sys/callout.h> 66#include <sys/bus.h> 67#include <sys/endian.h> 68#include <sys/kthread.h> 69#include <sys/taskqueue.h> 70#include <sys/priv.h> 71#include <sys/module.h> 72#include <sys/ktr.h> 73#include <sys/smp.h> /* for mp_ncpus */ 74 75#include <machine/bus.h> 76 77#include <net/if.h> 78#include <net/if_var.h> 79#include <net/if_dl.h> 80#include <net/if_media.h> 81#include <net/if_types.h> 82#include <net/if_arp.h> 83#include <net/ethernet.h> 84#include <net/if_llc.h> 85 86#include <net80211/ieee80211_var.h> 87#include <net80211/ieee80211_regdomain.h> 88#ifdef IEEE80211_SUPPORT_SUPERG 89#include <net80211/ieee80211_superg.h> 90#endif 91#ifdef IEEE80211_SUPPORT_TDMA 92#include <net80211/ieee80211_tdma.h> 93#endif 94 95#include <net/bpf.h> 96 97#ifdef INET 98#include <netinet/in.h> 99#include <netinet/if_ether.h> 100#endif 101 102#include <dev/ath/if_athvar.h> 103#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 104#include <dev/ath/ath_hal/ah_diagcodes.h> 105 106#include <dev/ath/if_ath_debug.h> 107#include <dev/ath/if_ath_misc.h> 108#include <dev/ath/if_ath_tsf.h> 109#include <dev/ath/if_ath_tx.h> 110#include <dev/ath/if_ath_sysctl.h> 111#include <dev/ath/if_ath_led.h> 112#include <dev/ath/if_ath_keycache.h> 113#include <dev/ath/if_ath_rx.h> 114#include <dev/ath/if_ath_beacon.h> 115#include <dev/ath/if_athdfs.h> 116 117#ifdef ATH_TX99_DIAG 118#include <dev/ath/ath_tx99/ath_tx99.h> 119#endif 120 121#ifdef ATH_DEBUG_ALQ 122#include <dev/ath/if_ath_alq.h> 123#endif 124 125#ifdef IEEE80211_SUPPORT_TDMA 126#include <dev/ath/if_ath_tdma.h> 127 128static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, 129 u_int32_t bintval); 130static void ath_tdma_bintvalsetup(struct ath_softc *sc, 131 const struct ieee80211_tdma_state *tdma); 132#endif /* IEEE80211_SUPPORT_TDMA */ 133 134#ifdef IEEE80211_SUPPORT_TDMA 135static void 136ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval) 137{ 138 struct ath_hal *ah = sc->sc_ah; 139 HAL_BEACON_TIMERS bt; 140 141 bt.bt_intval = bintval | HAL_BEACON_ENA; 142 bt.bt_nexttbtt = nexttbtt; 143 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep; 144 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep; 145 bt.bt_nextatim = nexttbtt+1; 146 /* Enables TBTT, DBA, SWBA timers by default */ 147 bt.bt_flags = 0; 148#if 0 149 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 150 "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n", 151 __func__, 152 bt.bt_intval, 153 bt.bt_intval, 154 bt.bt_nexttbtt, 155 bt.bt_nexttbtt, 156 bt.bt_nextdba, 157 bt.bt_nextdba, 158 bt.bt_nextswba, 159 bt.bt_nextswba, 160 bt.bt_nextatim, 161 bt.bt_nextatim); 162#endif 163 164#ifdef ATH_DEBUG_ALQ 165 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) { 166 struct if_ath_alq_tdma_timer_set t; 167 t.bt_intval = htobe32(bt.bt_intval); 168 t.bt_nexttbtt = htobe32(bt.bt_nexttbtt); 169 t.bt_nextdba = htobe32(bt.bt_nextdba); 170 t.bt_nextswba = htobe32(bt.bt_nextswba); 171 t.bt_nextatim = htobe32(bt.bt_nextatim); 172 t.bt_flags = htobe32(bt.bt_flags); 173 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep); 174 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep); 175 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET, 176 sizeof(t), (char *) &t); 177 } 178#endif 179 180 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 181 "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n", 182 __func__, 183 bt.bt_nexttbtt, 184 bt.bt_nexttbtt, 185 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10), 186 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10)); 187 ath_hal_beaconsettimers(ah, &bt); 188} 189 190/* 191 * Calculate the beacon interval. This is periodic in the 192 * superframe for the bss. We assume each station is configured 193 * identically wrt transmit rate so the guard time we calculate 194 * above will be the same on all stations. Note we need to 195 * factor in the xmit time because the hardware will schedule 196 * a frame for transmit if the start of the frame is within 197 * the burst time. When we get hardware that properly kills 198 * frames in the PCU we can reduce/eliminate the guard time. 199 * 200 * Roundup to 1024 is so we have 1 TU buffer in the guard time 201 * to deal with the granularity of the nexttbtt timer. 11n MAC's 202 * with 1us timer granularity should allow us to reduce/eliminate 203 * this. 204 */ 205static void 206ath_tdma_bintvalsetup(struct ath_softc *sc, 207 const struct ieee80211_tdma_state *tdma) 208{ 209 /* copy from vap state (XXX check all vaps have same value?) */ 210 sc->sc_tdmaslotlen = tdma->tdma_slotlen; 211 212 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) * 213 tdma->tdma_slotcnt, 1024); 214 sc->sc_tdmabintval >>= 10; /* TSF -> TU */ 215 if (sc->sc_tdmabintval & 1) 216 sc->sc_tdmabintval++; 217 218 if (tdma->tdma_slot == 0) { 219 /* 220 * Only slot 0 beacons; other slots respond. 221 */ 222 sc->sc_imask |= HAL_INT_SWBA; 223 sc->sc_tdmaswba = 0; /* beacon immediately */ 224 } else { 225 /* XXX all vaps must be slot 0 or slot !0 */ 226 sc->sc_imask &= ~HAL_INT_SWBA; 227 } 228} 229 230/* 231 * Max 802.11 overhead. This assumes no 4-address frames and 232 * the encapsulation done by ieee80211_encap (llc). We also 233 * include potential crypto overhead. 234 */ 235#define IEEE80211_MAXOVERHEAD \ 236 (sizeof(struct ieee80211_qosframe) \ 237 + sizeof(struct llc) \ 238 + IEEE80211_ADDR_LEN \ 239 + IEEE80211_WEP_IVLEN \ 240 + IEEE80211_WEP_KIDLEN \ 241 + IEEE80211_WEP_CRCLEN \ 242 + IEEE80211_WEP_MICLEN \ 243 + IEEE80211_CRC_LEN) 244 245/* 246 * Setup initially for tdma operation. Start the beacon 247 * timers and enable SWBA if we are slot 0. Otherwise 248 * we wait for slot 0 to arrive so we can sync up before 249 * starting to transmit. 250 */ 251void 252ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap) 253{ 254 struct ath_hal *ah = sc->sc_ah; 255 struct ieee80211com *ic = &sc->sc_ic; 256 const struct ieee80211_txparam *tp; 257 const struct ieee80211_tdma_state *tdma = NULL; 258 int rix; 259 260 if (vap == NULL) { 261 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */ 262 if (vap == NULL) { 263 device_printf(sc->sc_dev, "%s: no vaps?\n", __func__); 264 return; 265 } 266 } 267 /* XXX should take a locked ref to iv_bss */ 268 tp = vap->iv_bss->ni_txparms; 269 /* 270 * Calculate the guard time for each slot. This is the 271 * time to send a maximal-size frame according to the 272 * fixed/lowest transmit rate. Note that the interface 273 * mtu does not include the 802.11 overhead so we must 274 * tack that on (ath_hal_computetxtime includes the 275 * preamble and plcp in it's calculation). 276 */ 277 tdma = vap->iv_tdma; 278 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 279 rix = ath_tx_findrix(sc, tp->ucastrate); 280 else 281 rix = ath_tx_findrix(sc, tp->mcastrate); 282 283 /* 284 * If the chip supports enforcing TxOP on transmission, 285 * we can just delete the guard window. It isn't at all required. 286 */ 287 if (sc->sc_hasenforcetxop) { 288 sc->sc_tdmaguard = 0; 289 } else { 290 /* XXX short preamble assumed */ 291 /* XXX non-11n rate assumed */ 292 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates, 293 vap->iv_ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE); 294 } 295 296 ath_hal_intrset(ah, 0); 297 298 ath_beaconq_config(sc); /* setup h/w beacon q */ 299 if (sc->sc_setcca) 300 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */ 301 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */ 302 ath_tdma_settimers(sc, sc->sc_tdmabintval, 303 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF); 304 sc->sc_syncbeacon = 0; 305 306 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER; 307 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER; 308 309 ath_hal_intrset(ah, sc->sc_imask); 310 311 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u " 312 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__, 313 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt, 314 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval, 315 sc->sc_tdmadbaprep); 316 317#ifdef ATH_DEBUG_ALQ 318 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) { 319 struct if_ath_alq_tdma_timer_config t; 320 321 t.tdma_slot = htobe32(tdma->tdma_slot); 322 t.tdma_slotlen = htobe32(tdma->tdma_slotlen); 323 t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt); 324 t.tdma_bintval = htobe32(tdma->tdma_bintval); 325 t.tdma_guard = htobe32(sc->sc_tdmaguard); 326 t.tdma_scbintval = htobe32(sc->sc_tdmabintval); 327 t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep); 328 329 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG, 330 sizeof(t), (char *) &t); 331 } 332#endif /* ATH_DEBUG_ALQ */ 333} 334 335/* 336 * Update tdma operation. Called from the 802.11 layer 337 * when a beacon is received from the TDMA station operating 338 * in the slot immediately preceding us in the bss. Use 339 * the rx timestamp for the beacon frame to update our 340 * beacon timers so we follow their schedule. Note that 341 * by using the rx timestamp we implicitly include the 342 * propagation delay in our schedule. 343 * 344 * XXX TODO: since the changes for the AR5416 and later chips 345 * involved changing the TSF/TU calculations, we need to make 346 * sure that various calculations wrap consistently. 347 * 348 * A lot of the problems stemmed from the calculations wrapping 349 * at 65,535 TU. Since a lot of the math is still being done in 350 * TU, please audit it to ensure that when the TU values programmed 351 * into the timers wrap at (2^31)-1 TSF, all the various terms 352 * wrap consistently. 353 */ 354void 355ath_tdma_update(struct ieee80211_node *ni, 356 const struct ieee80211_tdma_param *tdma, int changed) 357{ 358#define TSF_TO_TU(_h,_l) \ 359 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10)) 360#define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10) 361 struct ieee80211vap *vap = ni->ni_vap; 362 struct ieee80211com *ic = ni->ni_ic; 363 struct ath_softc *sc = ic->ic_softc; 364 struct ath_hal *ah = sc->sc_ah; 365 const HAL_RATE_TABLE *rt = sc->sc_currates; 366 u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full; 367 u_int32_t txtime, nextslottu; 368 int32_t tudelta, tsfdelta; 369 const struct ath_rx_status *rs; 370 int rix; 371 372 sc->sc_stats.ast_tdma_update++; 373 374 /* 375 * Check for and adopt configuration changes. 376 */ 377 if (changed != 0) { 378 const struct ieee80211_tdma_state *ts = vap->iv_tdma; 379 380 ath_tdma_bintvalsetup(sc, ts); 381 if (changed & TDMA_UPDATE_SLOTLEN) 382 ath_wme_update(ic); 383 384 DPRINTF(sc, ATH_DEBUG_TDMA, 385 "%s: adopt slot %u slotcnt %u slotlen %u us " 386 "bintval %u TU\n", __func__, 387 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen, 388 sc->sc_tdmabintval); 389 390 /* XXX right? */ 391 ath_hal_intrset(ah, sc->sc_imask); 392 /* NB: beacon timers programmed below */ 393 } 394 395 /* extend rx timestamp to 64 bits */ 396 rs = sc->sc_lastrs; 397 tsf = ath_hal_gettsf64(ah); 398 rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf); 399 /* 400 * The rx timestamp is set by the hardware on completing 401 * reception (at the point where the rx descriptor is DMA'd 402 * to the host). To find the start of our next slot we 403 * must adjust this time by the time required to send 404 * the packet just received. 405 */ 406 rix = rt->rateCodeToIndex[rs->rs_rate]; 407 408 /* 409 * To calculate the packet duration for legacy rates, we 410 * only need the rix and preamble. 411 * 412 * For 11n non-aggregate frames, we also need the channel 413 * width and short/long guard interval. 414 * 415 * For 11n aggregate frames, the required hacks are a little 416 * more subtle. You need to figure out the frame duration 417 * for each frame, including the delimiters. However, when 418 * a frame isn't received successfully, we won't hear it 419 * (unless you enable reception of CRC errored frames), so 420 * your duration calculation is going to be off. 421 * 422 * However, we can assume that the beacon frames won't be 423 * transmitted as aggregate frames, so we should be okay. 424 * Just add a check to ensure that we aren't handed something 425 * bad. 426 * 427 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is 428 * actually short guard interval. For legacy rates, 429 * it's short preamble. 430 */ 431 txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen, 432 rix, 433 !! (rs->rs_flags & HAL_RX_2040), 434 (rix & 0x80) ? 435 (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble); 436 /* NB: << 9 is to cvt to TU and /2 */ 437 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9); 438 439 /* 440 * For 802.11n chips: nextslottu needs to be the full TSF space, 441 * not just 0..65535 TU. 442 */ 443 nextslottu = TSF_TO_TU(nextslot>>32, nextslot); 444 /* 445 * Retrieve the hardware NextTBTT in usecs 446 * and calculate the difference between what the 447 * other station thinks and what we have programmed. This 448 * lets us figure how to adjust our timers to match. The 449 * adjustments are done by pulling the TSF forward and possibly 450 * rewriting the beacon timers. 451 */ 452 /* 453 * The logic here assumes the nexttbtt counter is in TSF 454 * but the prr-11n NICs are in TU. The HAL shifts them 455 * to TSF but there's two important differences: 456 * 457 * + The TU->TSF values have 0's for the low 9 bits, and 458 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for 459 * the pre-11n NICs, but not for the 11n NICs. 460 * 461 * So for now, just make sure the nexttbtt value we get 462 * matches the second issue or once nexttbtt exceeds this 463 * value, tsfdelta ends up becoming very negative and all 464 * of the adjustments get very messed up. 465 */ 466 467 /* 468 * We need to track the full nexttbtt rather than having it 469 * truncated at HAL_BEACON_PERIOD, as programming the 470 * nexttbtt (and related) registers for the 11n chips is 471 * actually going to take the full 32 bit space, rather than 472 * just 0..65535 TU. 473 */ 474 nexttbtt_full = ath_hal_getnexttbtt(ah); 475 nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1)); 476 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt); 477 478 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 479 "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, " 480 "nextslottu %d, nextslottume %d\n", 481 (unsigned long long) rs->rs_tstamp, 482 (unsigned long long) rstamp, 483 (unsigned long long) tsf, txtime, 484 (unsigned long long) nextslot, 485 nextslottu, TSF_TO_TU(nextslot >> 32, nextslot)); 486 DPRINTF(sc, ATH_DEBUG_TDMA, 487 " beacon tstamp: %llu (0x%016llx)\n", 488 (unsigned long long) le64toh(ni->ni_tstamp.tsf), 489 (unsigned long long) le64toh(ni->ni_tstamp.tsf)); 490 491 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 492 "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n", 493 (unsigned long long) nexttbtt, 494 (long long) nexttbtt, 495 tsfdelta, 496 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam)); 497 498 if (tsfdelta < 0) { 499 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 500 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta); 501 tsfdelta = -tsfdelta % 1024; 502 nextslottu++; 503 } else if (tsfdelta > 0) { 504 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta); 505 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 506 tsfdelta = 1024 - (tsfdelta % 1024); 507 nextslottu++; 508 } else { 509 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0); 510 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0); 511 } 512 tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full); 513 514#ifdef ATH_DEBUG_ALQ 515 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) { 516 struct if_ath_alq_tdma_beacon_state t; 517 t.rx_tsf = htobe64(rstamp); 518 t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf)); 519 t.tsf64 = htobe64(tsf); 520 t.nextslot_tsf = htobe64(nextslot); 521 t.nextslot_tu = htobe32(nextslottu); 522 t.txtime = htobe32(txtime); 523 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE, 524 sizeof(t), (char *) &t); 525 } 526 527 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) { 528 struct if_ath_alq_tdma_slot_calc t; 529 530 t.nexttbtt = htobe64(nexttbtt_full); 531 t.next_slot = htobe64(nextslot); 532 t.tsfdelta = htobe32(tsfdelta); 533 t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap)); 534 t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam)); 535 536 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC, 537 sizeof(t), (char *) &t); 538 } 539#endif 540 541 /* 542 * Copy sender's timetstamp into tdma ie so they can 543 * calculate roundtrip time. We submit a beacon frame 544 * below after any timer adjustment. The frame goes out 545 * at the next TBTT so the sender can calculate the 546 * roundtrip by inspecting the tdma ie in our beacon frame. 547 * 548 * NB: This tstamp is subtlely preserved when 549 * IEEE80211_BEACON_TDMA is marked (e.g. when the 550 * slot position changes) because ieee80211_add_tdma 551 * skips over the data. 552 */ 553 memcpy(vap->iv_bcn_off.bo_tdma + 554 __offsetof(struct ieee80211_tdma_param, tdma_tstamp), 555 &ni->ni_tstamp.data, 8); 556#if 0 557 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 558 "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n", 559 (unsigned long long) tsf, (unsigned long long) nextslot, 560 (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta); 561#endif 562 /* 563 * Adjust the beacon timers only when pulling them forward 564 * or when going back by less than the beacon interval. 565 * Negative jumps larger than the beacon interval seem to 566 * cause the timers to stop and generally cause instability. 567 * This basically filters out jumps due to missed beacons. 568 */ 569 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) { 570 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 571 "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n", 572 __func__, 573 nextslottu, 574 sc->sc_tdmabintval); 575 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval); 576 sc->sc_stats.ast_tdma_timers++; 577 } 578 if (tsfdelta > 0) { 579 uint64_t tsf; 580 581 /* XXX should just teach ath_hal_adjusttsf() to do this */ 582 tsf = ath_hal_gettsf64(ah); 583 ath_hal_settsf64(ah, tsf + tsfdelta); 584 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER, 585 "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n", 586 __func__, 587 (unsigned long long) tsf, 588 tsfdelta); 589 590#ifdef ATH_DEBUG_ALQ 591 if (if_ath_alq_checkdebug(&sc->sc_alq, 592 ATH_ALQ_TDMA_TSF_ADJUST)) { 593 struct if_ath_alq_tdma_tsf_adjust t; 594 595 t.tsfdelta = htobe32(tsfdelta); 596 t.tsf64_old = htobe64(tsf); 597 t.tsf64_new = htobe64(tsf + tsfdelta); 598 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST, 599 sizeof(t), (char *) &t); 600 } 601#endif /* ATH_DEBUG_ALQ */ 602 sc->sc_stats.ast_tdma_tsf++; 603 } 604 ath_tdma_beacon_send(sc, vap); /* prepare response */ 605#undef TU_TO_TSF 606#undef TSF_TO_TU 607} 608 609/* 610 * Transmit a beacon frame at SWBA. Dynamic updates 611 * to the frame contents are done as needed. 612 */ 613void 614ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap) 615{ 616 struct ath_hal *ah = sc->sc_ah; 617 struct ath_buf *bf; 618 int otherant; 619 620 /* 621 * Check if the previous beacon has gone out. If 622 * not don't try to post another, skip this period 623 * and wait for the next. Missed beacons indicate 624 * a problem and should not occur. If we miss too 625 * many consecutive beacons reset the device. 626 */ 627 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) { 628 sc->sc_bmisscount++; 629 DPRINTF(sc, ATH_DEBUG_BEACON, 630 "%s: missed %u consecutive beacons\n", 631 __func__, sc->sc_bmisscount); 632 if (sc->sc_bmisscount >= ath_bstuck_threshold) 633 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); 634 return; 635 } 636 if (sc->sc_bmisscount != 0) { 637 DPRINTF(sc, ATH_DEBUG_BEACON, 638 "%s: resume beacon xmit after %u misses\n", 639 __func__, sc->sc_bmisscount); 640 sc->sc_bmisscount = 0; 641 } 642 643 /* 644 * Check recent per-antenna transmit statistics and flip 645 * the default antenna if noticeably more frames went out 646 * on the non-default antenna. 647 * XXX assumes 2 anntenae 648 */ 649 if (!sc->sc_diversity) { 650 otherant = sc->sc_defant & 1 ? 2 : 1; 651 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2) 652 ath_setdefantenna(sc, otherant); 653 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0; 654 } 655 656 bf = ath_beacon_generate(sc, vap); 657 /* XXX We don't do cabq traffic, but just for completeness .. */ 658 ATH_TXQ_LOCK(sc->sc_cabq); 659 ath_beacon_cabq_start(sc); 660 ATH_TXQ_UNLOCK(sc->sc_cabq); 661 662 if (bf != NULL) { 663 /* 664 * Stop any current dma and put the new frame on the queue. 665 * This should never fail since we check above that no frames 666 * are still pending on the queue. 667 */ 668 if ((! sc->sc_isedma) && 669 (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) { 670 DPRINTF(sc, ATH_DEBUG_ANY, 671 "%s: beacon queue %u did not stop?\n", 672 __func__, sc->sc_bhalq); 673 /* NB: the HAL still stops DMA, so proceed */ 674 } 675 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 676 ath_hal_txstart(ah, sc->sc_bhalq); 677 678 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */ 679 680 /* 681 * Record local TSF for our last send for use 682 * in arbitrating slot collisions. 683 */ 684 /* XXX should take a locked ref to iv_bss */ 685 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah); 686 } 687} 688#endif /* IEEE80211_SUPPORT_TDMA */ 689