hrowpicvar.h revision 331722
1178354Ssam/*- 2178354Ssam * Copyright 2003 by Peter Grehan. All rights reserved. 3178354Ssam * 4178354Ssam * Redistribution and use in source and binary forms, with or without 5178354Ssam * modification, are permitted provided that the following conditions 6178354Ssam * are met: 7178354Ssam * 1. Redistributions of source code must retain the above copyright 8178354Ssam * notice, this list of conditions and the following disclaimer. 9178354Ssam * 2. Redistributions in binary form must reproduce the above copyright 10178354Ssam * notice, this list of conditions and the following disclaimer in the 11178354Ssam * documentation and/or other materials provided with the distribution. 12178354Ssam * 3. The name of the author may not be used to endorse or promote products 13178354Ssam * derived from this software without specific prior written permission. 14178354Ssam * 15178354Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16178354Ssam * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17178354Ssam * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18178354Ssam * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19178354Ssam * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20178354Ssam * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21178354Ssam * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22178354Ssam * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23178354Ssam * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24178354Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25178354Ssam * SUCH DAMAGE. 26178354Ssam * 27178354Ssam * $FreeBSD: stable/11/sys/powerpc/powermac/hrowpicvar.h 331722 2018-03-29 02:50:57Z eadler $ 28178354Ssam */ 29178354Ssam 30178354Ssam#ifndef _POWERPC_POWERMAC_HROWPICVAR_H_ 31178354Ssam#define _POWERPC_POWERMAC_HROWPICVAR_H_ 32178354Ssam 33178354Ssam#define HROWPIC_IRQMAX 64 34178354Ssam#define HROWPIC_IRQ_REGNUM 32 /* irqs per register */ 35178354Ssam#define HROWPIC_IRQ_SHIFT 5 /* high or low irq word */ 36178354Ssam#define HROWPIC_IRQ_MASK ((HROWPIC_IRQMAX-1) >> 1) /* irq bit pos in word */ 37178354Ssam 38178354Ssam/* 39178354Ssam * Register offsets within bank. There are two identical banks, 40178354Ssam * separated by 16 bytes. Interrupts 0->31 are processed in the 41178354Ssam * second bank, and 32->63 in the first bank. 42178354Ssam */ 43178354Ssam#define HPIC_STATUS 0x00 /* active interrupt sources */ 44178354Ssam#define HPIC_ENABLE 0x04 /* interrupt asserts ppc EXTINT */ 45178354Ssam#define HPIC_CLEAR 0x08 /* clear int source */ 46178354Ssam#define HPIC_TRIGGER 0x0c /* edge/level int trigger */ 47178354Ssam 48178354Ssam#define HPIC_PRIMARY 1 /* primary register bank */ 49178354Ssam#define HPIC_SECONDARY 0 /* secondary register bank */ 50178354Ssam 51178354Ssam/* 52178354Ssam * Convert an interrupt into a prim/sec bank number 53178354Ssam */ 54178354Ssam#define HPIC_INT_TO_BANK(x) \ 55178354Ssam (((x) >> HROWPIC_IRQ_SHIFT) ^ 1) 56178354Ssam 57178354Ssam/* 58178354Ssam * Convert an interrupt into the bit number within a bank register 59178354Ssam */ 60190391Ssam#define HPIC_INT_TO_REGBIT(x) \ 61190391Ssam ((x) & HROWPIC_IRQ_MASK) 62190391Ssam 63178354Ssam#define HPIC_1ST_OFFSET 0x10 /* offset to primary reg bank */ 64178354Ssam 65178354Ssamstruct hrowpic_softc { 66178354Ssam device_t sc_dev; /* macio device */ 67178354Ssam struct resource *sc_rres; /* macio bus resource */ 68178354Ssam bus_space_tag_t sc_bt; /* macio bus tag/handle */ 69178354Ssam bus_space_handle_t sc_bh; 70178354Ssam int sc_rrid; 71178354Ssam uint32_t sc_softreg[2]; /* ENABLE reg copy */ 72178354Ssam u_int sc_vector[HROWPIC_IRQMAX]; 73178354Ssam}; 74178354Ssam 75178354Ssam#endif /* _POWERPC_POWERMAC_HROWPICVAR_H_ */ 76178354Ssam