mpi_init.h revision 330897
1/* $FreeBSD: stable/11/sys/dev/mpt/mpilib/mpi_init.h 330897 2018-03-14 03:19:51Z eadler $ */ 2/*- 3 * SPDX-License-Identifier: BSD-3-Clause 4 * 5 * Copyright (c) 2000-2010, LSI Logic Corporation and its contributors. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are 10 * met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * substantially similar to the "NO WARRANTY" disclaimer below 15 * ("Disclaimer") and any redistribution must be conditioned upon including 16 * a substantially similar Disclaimer requirement for further binary 17 * redistribution. 18 * 3. Neither the name of the LSI Logic Corporation nor the names of its 19 * contributors may be used to endorse or promote products derived from 20 * this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 32 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * Name: mpi_init.h 35 * Title: MPI initiator mode messages and structures 36 * Creation Date: June 8, 2000 37 * 38 * mpi_init.h Version: 01.05.09 39 * 40 * Version History 41 * --------------- 42 * 43 * Date Version Description 44 * -------- -------- ------------------------------------------------------ 45 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 46 * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY. 47 * 06-06-00 01.00.01 Update version number for 1.0 release. 48 * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions. 49 * 11-02-00 01.01.01 Original release for post 1.0 work. 50 * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT. 51 * 02-20-01 01.01.03 Started using MPI_POINTER. 52 * 03-27-01 01.01.04 Added structure offset comments. 53 * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT. 54 * 08-08-01 01.02.01 Original release for v1.2 work. 55 * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET. 56 * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for 57 * MSG_SCSI_IO_REPLY. 58 * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure 59 * Processor messages. 60 * 10-04-01 01.02.04 Added defines for SEP request Action field. 61 * 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define 62 * for SCSI IO requests. 63 * 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP. 64 * 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define. 65 * 05-11-04 01.03.01 Original release for MPI v1.3. 66 * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request. 67 * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field 68 * and a reserved U16. 69 * Added new MSG_SCSI_IO32_REQUEST structure. 70 * Added a TaskType of Clear Task Set to SCSI 71 * Task Management request. 72 * 12-07-04 01.05.02 Added support for Task Management Query Task. 73 * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support 74 * WWID addressing. 75 * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request. 76 * Removed SCSI IO 32 Request. 77 * Modified SCSI Enclosure Processor Request and Reply to 78 * support Enclosure/Slot addressing rather than WWID 79 * addressing. 80 * 06-24-05 01.05.05 Added SCSI IO 32 structures and defines. 81 * Added four new defines for SEP SlotStatus. 82 * 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them 83 * unique in the first 32 characters. 84 * 03-27-06 01.05.07 Added Task Management type of Clear ACA. 85 * 10-11-06 01.05.08 Shortened define for Task Management type of Clear ACA. 86 * 02-28-07 01.05.09 Defined two new MsgFlags bits for SCSI Task Management 87 * Request: Do Not Send Task IU and Soft Reset Option. 88 * -------------------------------------------------------------------------- 89 */ 90 91#ifndef MPI_INIT_H 92#define MPI_INIT_H 93 94 95/***************************************************************************** 96* 97* S C S I I n i t i a t o r M e s s a g e s 98* 99*****************************************************************************/ 100 101/****************************************************************************/ 102/* SCSI IO messages and associated structures */ 103/****************************************************************************/ 104 105typedef struct _MSG_SCSI_IO_REQUEST 106{ 107 U8 TargetID; /* 00h */ 108 U8 Bus; /* 01h */ 109 U8 ChainOffset; /* 02h */ 110 U8 Function; /* 03h */ 111 U8 CDBLength; /* 04h */ 112 U8 SenseBufferLength; /* 05h */ 113 U8 Reserved; /* 06h */ 114 U8 MsgFlags; /* 07h */ 115 U32 MsgContext; /* 08h */ 116 U8 LUN[8]; /* 0Ch */ 117 U32 Control; /* 14h */ 118 U8 CDB[16]; /* 18h */ 119 U32 DataLength; /* 28h */ 120 U32 SenseBufferLowAddr; /* 2Ch */ 121 SGE_IO_UNION SGL; /* 30h */ 122} MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST, 123 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t; 124 125 126/* SCSI IO MsgFlags bits */ 127 128#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01) 129#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00) 130#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01) 131 132#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02) 133#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00) 134#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02) 135 136#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) 137 138/* SCSI IO LUN fields */ 139 140#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 141#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 142#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 143#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 144#define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00) 145#define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00) 146 147/* SCSI IO Control bits */ 148 149#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 150#define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 151#define MPI_SCSIIO_CONTROL_WRITE (0x01000000) 152#define MPI_SCSIIO_CONTROL_READ (0x02000000) 153 154#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000) 155#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 156 157#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 158#define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 159#define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100) 160#define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 161#define MPI_SCSIIO_CONTROL_ACAQ (0x00000400) 162#define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500) 163#define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700) 164 165#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000) 166#define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000) 167#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000) 168#define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000) 169#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000) 170#define MPI_SCSIIO_CONTROL_RESERVED (0x00080000) 171#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000) 172#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000) 173#define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000) 174 175 176/* SCSI IO reply structure */ 177typedef struct _MSG_SCSI_IO_REPLY 178{ 179 U8 TargetID; /* 00h */ 180 U8 Bus; /* 01h */ 181 U8 MsgLength; /* 02h */ 182 U8 Function; /* 03h */ 183 U8 CDBLength; /* 04h */ 184 U8 SenseBufferLength; /* 05h */ 185 U8 Reserved; /* 06h */ 186 U8 MsgFlags; /* 07h */ 187 U32 MsgContext; /* 08h */ 188 U8 SCSIStatus; /* 0Ch */ 189 U8 SCSIState; /* 0Dh */ 190 U16 IOCStatus; /* 0Eh */ 191 U32 IOCLogInfo; /* 10h */ 192 U32 TransferCount; /* 14h */ 193 U32 SenseCount; /* 18h */ 194 U32 ResponseInfo; /* 1Ch */ 195 U16 TaskTag; /* 20h */ 196 U16 Reserved1; /* 22h */ 197} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY, 198 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t; 199 200 201/* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */ 202 203#define MPI_SCSI_STATUS_SUCCESS (0x00) 204#define MPI_SCSI_STATUS_CHECK_CONDITION (0x02) 205#define MPI_SCSI_STATUS_CONDITION_MET (0x04) 206#define MPI_SCSI_STATUS_BUSY (0x08) 207#define MPI_SCSI_STATUS_INTERMEDIATE (0x10) 208#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 209#define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 210#define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22) 211#define MPI_SCSI_STATUS_TASK_SET_FULL (0x28) 212#define MPI_SCSI_STATUS_ACA_ACTIVE (0x30) 213 214#define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80) 215#define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81) 216#define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82) 217 218 219/* SCSI IO Reply SCSIState values */ 220 221#define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01) 222#define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02) 223#define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04) 224#define MPI_SCSI_STATE_TERMINATED (0x08) 225#define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 226#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20) 227 228/* SCSI IO Reply ResponseInfo values */ 229/* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */ 230 231#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000) 232#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000) 233#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000) 234#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000) 235#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000) 236#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000) 237#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000) 238 239#define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF) 240 241 242/****************************************************************************/ 243/* SCSI IO 32 messages and associated structures */ 244/****************************************************************************/ 245 246typedef struct 247{ 248 U8 CDB[20]; /* 00h */ 249 U32 PrimaryReferenceTag; /* 14h */ 250 U16 PrimaryApplicationTag; /* 18h */ 251 U16 PrimaryApplicationTagMask; /* 1Ah */ 252 U32 TransferLength; /* 1Ch */ 253} MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32, 254 MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t; 255 256typedef struct 257{ 258 U8 CDB[16]; /* 00h */ 259 U32 DataLength; /* 10h */ 260 U32 PrimaryReferenceTag; /* 14h */ 261 U16 PrimaryApplicationTag; /* 18h */ 262 U16 PrimaryApplicationTagMask; /* 1Ah */ 263 U32 TransferLength; /* 1Ch */ 264} MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16, 265 MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t; 266 267typedef union 268{ 269 U8 CDB32[32]; 270 MPI_SCSI_IO32_CDB_EEDP32 EEDP32; 271 MPI_SCSI_IO32_CDB_EEDP16 EEDP16; 272 SGE_SIMPLE_UNION SGE; 273} MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION, 274 MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t; 275 276typedef struct 277{ 278 U8 TargetID; /* 00h */ 279 U8 Bus; /* 01h */ 280 U16 Reserved1; /* 02h */ 281 U32 Reserved2; /* 04h */ 282} MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM, 283 MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t; 284 285typedef union 286{ 287 MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID; 288 U64 WWID; 289} MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS, 290 MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t; 291 292typedef struct _MSG_SCSI_IO32_REQUEST 293{ 294 U8 Port; /* 00h */ 295 U8 Reserved1; /* 01h */ 296 U8 ChainOffset; /* 02h */ 297 U8 Function; /* 03h */ 298 U8 CDBLength; /* 04h */ 299 U8 SenseBufferLength; /* 05h */ 300 U8 Flags; /* 06h */ 301 U8 MsgFlags; /* 07h */ 302 U32 MsgContext; /* 08h */ 303 U8 LUN[8]; /* 0Ch */ 304 U32 Control; /* 14h */ 305 MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */ 306 U32 DataLength; /* 38h */ 307 U32 BidirectionalDataLength; /* 3Ch */ 308 U32 SecondaryReferenceTag; /* 40h */ 309 U16 SecondaryApplicationTag; /* 44h */ 310 U16 Reserved2; /* 46h */ 311 U16 EEDPFlags; /* 48h */ 312 U16 ApplicationTagTranslationMask; /* 4Ah */ 313 U32 EEDPBlockSize; /* 4Ch */ 314 MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */ 315 U8 SGLOffset0; /* 58h */ 316 U8 SGLOffset1; /* 59h */ 317 U8 SGLOffset2; /* 5Ah */ 318 U8 SGLOffset3; /* 5Bh */ 319 U32 Reserved3; /* 5Ch */ 320 U32 Reserved4; /* 60h */ 321 U32 SenseBufferLowAddr; /* 64h */ 322 SGE_IO_UNION SGL; /* 68h */ 323} MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST, 324 SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t; 325 326/* SCSI IO 32 MsgFlags bits */ 327#define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01) 328#define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00) 329#define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01) 330 331#define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02) 332#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00) 333#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02) 334 335#define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) 336#define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08) 337#define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10) 338#define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20) 339#define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40) 340 341/* SCSI IO 32 Flags bits */ 342#define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03) 343#define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00) 344#define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01) 345 346/* SCSI IO 32 LUN fields */ 347#define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 348#define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 349#define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 350#define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 351#define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00) 352#define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00) 353 354/* SCSI IO 32 Control bits */ 355#define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000) 356#define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000) 357#define MPI_SCSIIO32_CONTROL_WRITE (0x01000000) 358#define MPI_SCSIIO32_CONTROL_READ (0x02000000) 359#define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000) 360 361#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000) 362#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26) 363 364#define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 365#define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000) 366#define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100) 367#define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200) 368#define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400) 369#define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500) 370#define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700) 371 372#define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000) 373#define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000) 374#define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000) 375#define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000) 376#define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000) 377#define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000) 378#define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000) 379#define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000) 380#define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000) 381 382/* SCSI IO 32 EEDPFlags */ 383#define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007) 384#define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000) 385#define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001) 386#define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002) 387#define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003) 388#define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004) 389#define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006) 390#define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007) 391 392#define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008) 393#define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010) 394 395#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700) 396#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100) 397#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200) 398#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400) 399#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8) 400 401#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 402#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 403#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 404#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 405 406 407/* SCSIIO32 IO reply structure */ 408typedef struct _MSG_SCSIIO32_IO_REPLY 409{ 410 U8 Port; /* 00h */ 411 U8 Reserved1; /* 01h */ 412 U8 MsgLength; /* 02h */ 413 U8 Function; /* 03h */ 414 U8 CDBLength; /* 04h */ 415 U8 SenseBufferLength; /* 05h */ 416 U8 Flags; /* 06h */ 417 U8 MsgFlags; /* 07h */ 418 U32 MsgContext; /* 08h */ 419 U8 SCSIStatus; /* 0Ch */ 420 U8 SCSIState; /* 0Dh */ 421 U16 IOCStatus; /* 0Eh */ 422 U32 IOCLogInfo; /* 10h */ 423 U32 TransferCount; /* 14h */ 424 U32 SenseCount; /* 18h */ 425 U32 ResponseInfo; /* 1Ch */ 426 U16 TaskTag; /* 20h */ 427 U16 Reserved2; /* 22h */ 428 U32 BidirectionalTransferCount; /* 24h */ 429} MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY, 430 SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t; 431 432 433/****************************************************************************/ 434/* SCSI Task Management messages */ 435/****************************************************************************/ 436 437typedef struct _MSG_SCSI_TASK_MGMT 438{ 439 U8 TargetID; /* 00h */ 440 U8 Bus; /* 01h */ 441 U8 ChainOffset; /* 02h */ 442 U8 Function; /* 03h */ 443 U8 Reserved; /* 04h */ 444 U8 TaskType; /* 05h */ 445 U8 Reserved1; /* 06h */ 446 U8 MsgFlags; /* 07h */ 447 U32 MsgContext; /* 08h */ 448 U8 LUN[8]; /* 0Ch */ 449 U32 Reserved2[7]; /* 14h */ 450 U32 TaskMsgContext; /* 30h */ 451} MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT, 452 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t; 453 454/* TaskType values */ 455 456#define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 457#define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 458#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 459#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04) 460#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 461#define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) 462#define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) 463#define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) 464 465/* MsgFlags bits */ 466#define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) 467 468#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00) 469#define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02) 470#define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04) 471 472#define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION (0x08) 473 474/* SCSI Task Management Reply */ 475typedef struct _MSG_SCSI_TASK_MGMT_REPLY 476{ 477 U8 TargetID; /* 00h */ 478 U8 Bus; /* 01h */ 479 U8 MsgLength; /* 02h */ 480 U8 Function; /* 03h */ 481 U8 ResponseCode; /* 04h */ 482 U8 TaskType; /* 05h */ 483 U8 Reserved1; /* 06h */ 484 U8 MsgFlags; /* 07h */ 485 U32 MsgContext; /* 08h */ 486 U8 Reserved2[2]; /* 0Ch */ 487 U16 IOCStatus; /* 0Eh */ 488 U32 IOCLogInfo; /* 10h */ 489 U32 TerminationCount; /* 14h */ 490} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY, 491 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t; 492 493/* ResponseCode values */ 494#define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) 495#define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) 496#define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) 497#define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05) 498#define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 499#define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 500#define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 501 502 503/****************************************************************************/ 504/* SCSI Enclosure Processor messages */ 505/****************************************************************************/ 506 507typedef struct _MSG_SEP_REQUEST 508{ 509 U8 TargetID; /* 00h */ 510 U8 Bus; /* 01h */ 511 U8 ChainOffset; /* 02h */ 512 U8 Function; /* 03h */ 513 U8 Action; /* 04h */ 514 U8 Flags; /* 05h */ 515 U8 Reserved1; /* 06h */ 516 U8 MsgFlags; /* 07h */ 517 U32 MsgContext; /* 08h */ 518 U32 SlotStatus; /* 0Ch */ 519 U32 Reserved2; /* 10h */ 520 U32 Reserved3; /* 14h */ 521 U32 Reserved4; /* 18h */ 522 U16 Slot; /* 1Ch */ 523 U16 EnclosureHandle; /* 1Eh */ 524} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST, 525 SEPRequest_t, MPI_POINTER pSEPRequest_t; 526 527/* Action defines */ 528#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00) 529#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01) 530 531/* Flags defines */ 532#define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) 533#define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00) 534 535/* SlotStatus bits for MSG_SEP_REQUEST */ 536#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 537#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 538#define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 539#define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 540#define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 541#define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020) 542#define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 543#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 544#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 545#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 546#define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000) 547#define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000) 548#define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000) 549#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 550#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 551#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000) 552#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000) 553#define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000) 554#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 555#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 556#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000) 557#define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000) 558 559 560typedef struct _MSG_SEP_REPLY 561{ 562 U8 TargetID; /* 00h */ 563 U8 Bus; /* 01h */ 564 U8 MsgLength; /* 02h */ 565 U8 Function; /* 03h */ 566 U8 Action; /* 04h */ 567 U8 Reserved1; /* 05h */ 568 U8 Reserved2; /* 06h */ 569 U8 MsgFlags; /* 07h */ 570 U32 MsgContext; /* 08h */ 571 U16 Reserved3; /* 0Ch */ 572 U16 IOCStatus; /* 0Eh */ 573 U32 IOCLogInfo; /* 10h */ 574 U32 SlotStatus; /* 14h */ 575 U32 Reserved4; /* 18h */ 576 U16 Slot; /* 1Ch */ 577 U16 EnclosureHandle; /* 1Eh */ 578} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY, 579 SEPReply_t, MPI_POINTER pSEPReply_t; 580 581/* SlotStatus bits for MSG_SEP_REPLY */ 582#define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 583#define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 584#define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 585#define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 586#define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 587#define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020) 588#define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 589#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 590#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 591#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 592#define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000) 593#define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000) 594#define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000) 595#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000) 596#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 597#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 598#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000) 599#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000) 600#define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000) 601#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000) 602#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000) 603#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 604#define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 605#define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000) 606#define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000) 607#define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000) 608 609#endif 610