fenv.h revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: stable/11/lib/msun/x86/fenv.h 330897 2018-03-14 03:19:51Z eadler $
29 */
30
31#ifndef	_FENV_H_
32#define	_FENV_H_
33
34#include <sys/cdefs.h>
35#include <sys/_types.h>
36
37#ifndef	__fenv_static
38#define	__fenv_static	static
39#endif
40
41typedef	__uint16_t	fexcept_t;
42
43/* Exception flags */
44#define	FE_INVALID	0x01
45#define	FE_DENORMAL	0x02
46#define	FE_DIVBYZERO	0x04
47#define	FE_OVERFLOW	0x08
48#define	FE_UNDERFLOW	0x10
49#define	FE_INEXACT	0x20
50#define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
51			 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
52
53/* Rounding modes */
54#define	FE_TONEAREST	0x0000
55#define	FE_DOWNWARD	0x0400
56#define	FE_UPWARD	0x0800
57#define	FE_TOWARDZERO	0x0c00
58#define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
59			 FE_UPWARD | FE_TOWARDZERO)
60
61/*
62 * As compared to the x87 control word, the SSE unit's control word
63 * has the rounding control bits offset by 3 and the exception mask
64 * bits offset by 7.
65 */
66#define	_SSE_ROUND_SHIFT	3
67#define	_SSE_EMASK_SHIFT	7
68
69#ifdef __i386__
70/*
71 * To preserve binary compatibility with FreeBSD 5.3, we pack the
72 * mxcsr into some reserved fields, rather than changing sizeof(fenv_t).
73 */
74typedef struct {
75	__uint16_t	__control;
76	__uint16_t      __mxcsr_hi;
77	__uint16_t	__status;
78	__uint16_t      __mxcsr_lo;
79	__uint32_t	__tag;
80	char		__other[16];
81} fenv_t;
82#else /* __amd64__ */
83typedef struct {
84	struct {
85		__uint32_t	__control;
86		__uint32_t	__status;
87		__uint32_t	__tag;
88		char		__other[16];
89	} __x87;
90	__uint32_t		__mxcsr;
91} fenv_t;
92#endif /* __i386__ */
93
94__BEGIN_DECLS
95
96/* Default floating-point environment */
97extern const fenv_t	__fe_dfl_env;
98#define	FE_DFL_ENV	(&__fe_dfl_env)
99
100#define	__fldcw(__cw)		__asm __volatile("fldcw %0" : : "m" (__cw))
101#define	__fldenv(__env)		__asm __volatile("fldenv %0" : : "m" (__env))
102#define	__fldenvx(__env)	__asm __volatile("fldenv %0" : : "m" (__env)  \
103				: "st", "st(1)", "st(2)", "st(3)", "st(4)",   \
104				"st(5)", "st(6)", "st(7)")
105#define	__fnclex()		__asm __volatile("fnclex")
106#define	__fnstenv(__env)	__asm __volatile("fnstenv %0" : "=m" (*(__env)))
107#define	__fnstcw(__cw)		__asm __volatile("fnstcw %0" : "=m" (*(__cw)))
108#define	__fnstsw(__sw)		__asm __volatile("fnstsw %0" : "=am" (*(__sw)))
109#define	__fwait()		__asm __volatile("fwait")
110#define	__ldmxcsr(__csr)	__asm __volatile("ldmxcsr %0" : : "m" (__csr))
111#define	__stmxcsr(__csr)	__asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
112
113int fegetenv(fenv_t *__envp);
114int feholdexcept(fenv_t *__envp);
115int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
116int feraiseexcept(int __excepts);
117int feupdateenv(const fenv_t *__envp);
118
119__fenv_static inline int
120fegetround(void)
121{
122	__uint16_t __control;
123
124	/*
125	 * We assume that the x87 and the SSE unit agree on the
126	 * rounding mode.  Reading the control word on the x87 turns
127	 * out to be about 5 times faster than reading it on the SSE
128	 * unit on an Opteron 244.
129	 */
130	__fnstcw(&__control);
131	return (__control & _ROUND_MASK);
132}
133
134#if __BSD_VISIBLE
135
136int feenableexcept(int __mask);
137int fedisableexcept(int __mask);
138
139/* We currently provide no external definition of fegetexcept(). */
140static inline int
141fegetexcept(void)
142{
143	__uint16_t __control;
144
145	/*
146	 * We assume that the masks for the x87 and the SSE unit are
147	 * the same.
148	 */
149	__fnstcw(&__control);
150	return (~__control & FE_ALL_EXCEPT);
151}
152
153#endif /* __BSD_VISIBLE */
154
155#ifdef __i386__
156
157/* After testing for SSE support once, we cache the result in __has_sse. */
158enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK };
159extern enum __sse_support __has_sse;
160int __test_sse(void);
161#ifdef __SSE__
162#define	__HAS_SSE()	1
163#else
164#define	__HAS_SSE()	(__has_sse == __SSE_YES ||			\
165			 (__has_sse == __SSE_UNK && __test_sse()))
166#endif
167
168#define	__get_mxcsr(env)	(((env).__mxcsr_hi << 16) |	\
169				 ((env).__mxcsr_lo))
170#define	__set_mxcsr(env, x)	do {				\
171	(env).__mxcsr_hi = (__uint32_t)(x) >> 16;		\
172	(env).__mxcsr_lo = (__uint16_t)(x);			\
173} while (0)
174
175__fenv_static inline int
176feclearexcept(int __excepts)
177{
178	fenv_t __env;
179	__uint32_t __mxcsr;
180
181	if (__excepts == FE_ALL_EXCEPT) {
182		__fnclex();
183	} else {
184		__fnstenv(&__env);
185		__env.__status &= ~__excepts;
186		__fldenv(__env);
187	}
188	if (__HAS_SSE()) {
189		__stmxcsr(&__mxcsr);
190		__mxcsr &= ~__excepts;
191		__ldmxcsr(__mxcsr);
192	}
193	return (0);
194}
195
196__fenv_static inline int
197fegetexceptflag(fexcept_t *__flagp, int __excepts)
198{
199	__uint32_t __mxcsr;
200	__uint16_t __status;
201
202	__fnstsw(&__status);
203	if (__HAS_SSE())
204		__stmxcsr(&__mxcsr);
205	else
206		__mxcsr = 0;
207	*__flagp = (__mxcsr | __status) & __excepts;
208	return (0);
209}
210
211__fenv_static inline int
212fetestexcept(int __excepts)
213{
214	__uint32_t __mxcsr;
215	__uint16_t __status;
216
217	__fnstsw(&__status);
218	if (__HAS_SSE())
219		__stmxcsr(&__mxcsr);
220	else
221		__mxcsr = 0;
222	return ((__status | __mxcsr) & __excepts);
223}
224
225__fenv_static inline int
226fesetround(int __round)
227{
228	__uint32_t __mxcsr;
229	__uint16_t __control;
230
231	if (__round & ~_ROUND_MASK)
232		return (-1);
233
234	__fnstcw(&__control);
235	__control &= ~_ROUND_MASK;
236	__control |= __round;
237	__fldcw(__control);
238
239	if (__HAS_SSE()) {
240		__stmxcsr(&__mxcsr);
241		__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
242		__mxcsr |= __round << _SSE_ROUND_SHIFT;
243		__ldmxcsr(__mxcsr);
244	}
245
246	return (0);
247}
248
249__fenv_static inline int
250fesetenv(const fenv_t *__envp)
251{
252	fenv_t __env = *__envp;
253	__uint32_t __mxcsr;
254
255	__mxcsr = __get_mxcsr(__env);
256	__set_mxcsr(__env, 0xffffffff);
257	/*
258	 * XXX Using fldenvx() instead of fldenv() tells the compiler that this
259	 * instruction clobbers the i387 register stack.  This happens because
260	 * we restore the tag word from the saved environment.  Normally, this
261	 * would happen anyway and we wouldn't care, because the ABI allows
262	 * function calls to clobber the i387 regs.  However, fesetenv() is
263	 * inlined, so we need to be more careful.
264	 */
265	__fldenvx(__env);
266	if (__HAS_SSE())
267		__ldmxcsr(__mxcsr);
268	return (0);
269}
270
271#else /* __amd64__ */
272
273__fenv_static inline int
274feclearexcept(int __excepts)
275{
276	fenv_t __env;
277
278	if (__excepts == FE_ALL_EXCEPT) {
279		__fnclex();
280	} else {
281		__fnstenv(&__env.__x87);
282		__env.__x87.__status &= ~__excepts;
283		__fldenv(__env.__x87);
284	}
285	__stmxcsr(&__env.__mxcsr);
286	__env.__mxcsr &= ~__excepts;
287	__ldmxcsr(__env.__mxcsr);
288	return (0);
289}
290
291__fenv_static inline int
292fegetexceptflag(fexcept_t *__flagp, int __excepts)
293{
294	__uint32_t __mxcsr;
295	__uint16_t __status;
296
297	__stmxcsr(&__mxcsr);
298	__fnstsw(&__status);
299	*__flagp = (__mxcsr | __status) & __excepts;
300	return (0);
301}
302
303__fenv_static inline int
304fetestexcept(int __excepts)
305{
306	__uint32_t __mxcsr;
307	__uint16_t __status;
308
309	__stmxcsr(&__mxcsr);
310	__fnstsw(&__status);
311	return ((__status | __mxcsr) & __excepts);
312}
313
314__fenv_static inline int
315fesetround(int __round)
316{
317	__uint32_t __mxcsr;
318	__uint16_t __control;
319
320	if (__round & ~_ROUND_MASK)
321		return (-1);
322
323	__fnstcw(&__control);
324	__control &= ~_ROUND_MASK;
325	__control |= __round;
326	__fldcw(__control);
327
328	__stmxcsr(&__mxcsr);
329	__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
330	__mxcsr |= __round << _SSE_ROUND_SHIFT;
331	__ldmxcsr(__mxcsr);
332
333	return (0);
334}
335
336__fenv_static inline int
337fesetenv(const fenv_t *__envp)
338{
339
340	/*
341	 * XXX Using fldenvx() instead of fldenv() tells the compiler that this
342	 * instruction clobbers the i387 register stack.  This happens because
343	 * we restore the tag word from the saved environment.  Normally, this
344	 * would happen anyway and we wouldn't care, because the ABI allows
345	 * function calls to clobber the i387 regs.  However, fesetenv() is
346	 * inlined, so we need to be more careful.
347	 */
348	__fldenvx(__envp->__x87);
349	__ldmxcsr(__envp->__mxcsr);
350	return (0);
351}
352
353#endif /* __i386__ */
354
355__END_DECLS
356
357#endif	/* !_FENV_H_ */
358