mpsvar.h revision 331722
1/*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2015 Avago Technologies
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD: stable/11/sys/dev/mps/mpsvar.h 331722 2018-03-29 02:50:57Z eadler $
31 */
32
33#ifndef _MPSVAR_H
34#define _MPSVAR_H
35
36#define MPS_DRIVER_VERSION	"21.02.00.00-fbsd"
37
38#define MPS_DB_MAX_WAIT		2500
39
40#define MPS_REQ_FRAMES		1024
41#define MPS_PRI_REQ_FRAMES	128
42#define MPS_EVT_REPLY_FRAMES	32
43#define MPS_REPLY_FRAMES	MPS_REQ_FRAMES
44#define MPS_CHAIN_FRAMES	2048
45#define MPS_MAXIO_PAGES		(-1)
46#define MPS_SENSE_LEN		SSD_FULL_SIZE
47#define MPS_MSI_COUNT		1
48#define MPS_SGE64_SIZE		12
49#define MPS_SGE32_SIZE		8
50#define MPS_SGC_SIZE		8
51
52#define	 CAN_SLEEP			1
53#define  NO_SLEEP			0
54
55#define MPS_PERIODIC_DELAY	1	/* 1 second heartbeat/watchdog check */
56#define MPS_ATA_ID_TIMEOUT	5	/* 5 second timeout for SATA ID cmd */
57#define MPS_MISSING_CHECK_DELAY	10	/* 10 seconds between missing check */
58
59#define MPS_SCSI_RI_INVALID_FRAME	(0x00000002)
60#define MPS_STRING_LENGTH               64
61
62#define DEFAULT_SPINUP_WAIT	3	/* seconds to wait for spinup */
63
64#include <sys/endian.h>
65
66/*
67 * host mapping related macro definitions
68 */
69#define MPS_MAPTABLE_BAD_IDX	0xFFFFFFFF
70#define MPS_DPM_BAD_IDX		0xFFFF
71#define MPS_ENCTABLE_BAD_IDX	0xFF
72#define MPS_MAX_MISSING_COUNT	0x0F
73#define MPS_DEV_RESERVED	0x20000000
74#define MPS_MAP_IN_USE		0x10000000
75#define MPS_MAP_BAD_ID		0xFFFFFFFF
76
77/*
78 * WarpDrive controller
79 */
80#define	MPS_CHIP_WD_DEVICE_ID	0x007E
81#define	MPS_WD_LSI_OEM		0x80
82#define	MPS_WD_HIDE_EXPOSE_MASK	0x03
83#define	MPS_WD_HIDE_ALWAYS	0x00
84#define	MPS_WD_EXPOSE_ALWAYS	0x01
85#define	MPS_WD_HIDE_IF_VOLUME	0x02
86#define	MPS_WD_RETRY		0x01
87#define	MPS_MAN_PAGE10_SIZE	0x5C	/* Hardcode for now */
88#define MPS_MAX_DISKS_IN_VOL	10
89
90/*
91 * WarpDrive Event Logging
92 */
93#define	MPI2_WD_LOG_ENTRY	0x8002
94#define	MPI2_WD_SSD_THROTTLING	0x0041
95#define	MPI2_WD_DRIVE_LIFE_WARN	0x0043
96#define	MPI2_WD_DRIVE_LIFE_DEAD	0x0044
97#define	MPI2_WD_RAIL_MON_FAIL	0x004D
98
99typedef uint8_t u8;
100typedef uint16_t u16;
101typedef uint32_t u32;
102typedef uint64_t u64;
103
104/**
105 * struct dev_mapping_table - device mapping information
106 * @physical_id: SAS address for drives or WWID for RAID volumes
107 * @device_info: bitfield provides detailed info about the device
108 * @phy_bits: bitfields indicating controller phys
109 * @dpm_entry_num: index of this device in device persistent map table
110 * @dev_handle: device handle for the device pointed by this entry
111 * @id: target id
112 * @missing_count: number of times the device not detected by driver
113 * @hide_flag: Hide this physical disk/not (foreign configuration)
114 * @init_complete: Whether the start of the day checks completed or not
115 */
116struct dev_mapping_table {
117	u64	physical_id;
118	u32	device_info;
119	u32	phy_bits;
120	u16	dpm_entry_num;
121	u16	dev_handle;
122	u16	reserved1;
123	u16	id;
124	u8	missing_count;
125	u8	init_complete;
126	u8	TLR_bits;
127	u8	reserved2;
128};
129
130/**
131 * struct enc_mapping_table -  mapping information about an enclosure
132 * @enclosure_id: Logical ID of this enclosure
133 * @start_index: index to the entry in dev_mapping_table
134 * @phy_bits: bitfields indicating controller phys
135 * @dpm_entry_num: index of this enclosure in device persistent map table
136 * @enc_handle: device handle for the enclosure pointed by this entry
137 * @num_slots: number of slots in the enclosure
138 * @start_slot: Starting slot id
139 * @missing_count: number of times the device not detected by driver
140 * @removal_flag: used to mark the device for removal
141 * @skip_search: used as a flag to include/exclude enclosure for search
142 * @init_complete: Whether the start of the day checks completed or not
143 */
144struct enc_mapping_table {
145	u64	enclosure_id;
146	u32	start_index;
147	u32	phy_bits;
148	u16	dpm_entry_num;
149	u16	enc_handle;
150	u16	num_slots;
151	u16	start_slot;
152	u8	missing_count;
153	u8	removal_flag;
154	u8	skip_search;
155	u8	init_complete;
156};
157
158/**
159 * struct map_removal_table - entries to be removed from mapping table
160 * @dpm_entry_num: index of this device in device persistent map table
161 * @dev_handle: device handle for the device pointed by this entry
162 */
163struct map_removal_table{
164	u16	dpm_entry_num;
165	u16	dev_handle;
166};
167
168typedef struct mps_fw_diagnostic_buffer {
169	size_t		size;
170	uint8_t		extended_type;
171	uint8_t		buffer_type;
172	uint8_t		force_release;
173	uint32_t	product_specific[23];
174	uint8_t		immediate;
175	uint8_t		enabled;
176	uint8_t		valid_data;
177	uint8_t		owned_by_firmware;
178	uint32_t	unique_id;
179} mps_fw_diagnostic_buffer_t;
180
181struct mps_softc;
182struct mps_command;
183struct mpssas_softc;
184union ccb;
185struct mpssas_target;
186struct mps_column_map;
187
188MALLOC_DECLARE(M_MPT2);
189
190typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
191    MPI2_EVENT_NOTIFICATION_REPLY *reply);
192typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
193
194struct mps_chain {
195	TAILQ_ENTRY(mps_chain)		chain_link;
196	MPI2_SGE_IO_UNION		*chain;
197	uint32_t			chain_busaddr;
198};
199
200/*
201 * This needs to be at least 2 to support SMP passthrough.
202 */
203#define       MPS_IOVEC_COUNT 2
204
205struct mps_command {
206	TAILQ_ENTRY(mps_command)	cm_link;
207	TAILQ_ENTRY(mps_command)	cm_recovery;
208	struct mps_softc		*cm_sc;
209	union ccb			*cm_ccb;
210	void				*cm_data;
211	u_int				cm_length;
212	u_int				cm_out_len;
213	struct uio			cm_uio;
214	struct iovec			cm_iovec[MPS_IOVEC_COUNT];
215	u_int				cm_max_segs;
216	u_int				cm_sglsize;
217	MPI2_SGE_IO_UNION		*cm_sge;
218	uint8_t				*cm_req;
219	uint8_t				*cm_reply;
220	uint32_t			cm_reply_data;
221	mps_command_callback_t		*cm_complete;
222	void				*cm_complete_data;
223	struct mpssas_target		*cm_targ;
224	MPI2_REQUEST_DESCRIPTOR_UNION	cm_desc;
225	u_int	                	cm_lun;
226	u_int				cm_flags;
227#define MPS_CM_FLAGS_POLLED		(1 << 0)
228#define MPS_CM_FLAGS_COMPLETE		(1 << 1)
229#define MPS_CM_FLAGS_SGE_SIMPLE		(1 << 2)
230#define MPS_CM_FLAGS_DATAOUT		(1 << 3)
231#define MPS_CM_FLAGS_DATAIN		(1 << 4)
232#define MPS_CM_FLAGS_WAKEUP		(1 << 5)
233#define MPS_CM_FLAGS_DD_IO		(1 << 6)
234#define MPS_CM_FLAGS_USE_UIO		(1 << 7)
235#define MPS_CM_FLAGS_SMP_PASS		(1 << 8)
236#define	MPS_CM_FLAGS_CHAIN_FAILED	(1 << 9)
237#define	MPS_CM_FLAGS_ERROR_MASK		MPS_CM_FLAGS_CHAIN_FAILED
238#define	MPS_CM_FLAGS_USE_CCB		(1 << 10)
239#define	MPS_CM_FLAGS_SATA_ID_TIMEOUT	(1 << 11)
240	u_int				cm_state;
241#define MPS_CM_STATE_FREE		0
242#define MPS_CM_STATE_BUSY		1
243#define MPS_CM_STATE_TIMEDOUT		2
244	bus_dmamap_t			cm_dmamap;
245	struct scsi_sense_data		*cm_sense;
246	TAILQ_HEAD(, mps_chain)		cm_chain_list;
247	uint32_t			cm_req_busaddr;
248	uint32_t			cm_sense_busaddr;
249	struct callout			cm_callout;
250};
251
252struct mps_column_map {
253	uint16_t			dev_handle;
254	uint8_t				phys_disk_num;
255};
256
257struct mps_event_handle {
258	TAILQ_ENTRY(mps_event_handle)	eh_list;
259	mps_evt_callback_t		*callback;
260	void				*data;
261	u32				mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
262};
263
264struct mps_softc {
265	device_t			mps_dev;
266	struct cdev			*mps_cdev;
267	u_int				mps_flags;
268#define MPS_FLAGS_INTX		(1 << 0)
269#define MPS_FLAGS_MSI		(1 << 1)
270#define MPS_FLAGS_BUSY		(1 << 2)
271#define MPS_FLAGS_SHUTDOWN	(1 << 3)
272#define MPS_FLAGS_DIAGRESET	(1 << 4)
273#define	MPS_FLAGS_ATTACH_DONE	(1 << 5)
274#define	MPS_FLAGS_WD_AVAILABLE	(1 << 6)
275#define	MPS_FLAGS_REALLOCATED	(1 << 7)
276	u_int				mps_debug;
277	u_int				disable_msix;
278	u_int				disable_msi;
279	u_int				msi_msgs;
280	int				tm_cmds_active;
281	int				io_cmds_active;
282	int				io_cmds_highwater;
283	int				chain_free;
284	int				max_chains;
285	int				max_io_pages;
286	int				chain_free_lowwater;
287	u_int				enable_ssu;
288	int				spinup_wait_time;
289	int				use_phynum;
290	uint64_t			chain_alloc_fail;
291	struct sysctl_ctx_list		sysctl_ctx;
292	struct sysctl_oid		*sysctl_tree;
293	char                            fw_version[16];
294	struct mps_command		*commands;
295	struct mps_chain		*chains;
296	struct callout			periodic;
297	struct callout			device_check_callout;
298
299	struct mpssas_softc		*sassc;
300	char            tmp_string[MPS_STRING_LENGTH];
301	TAILQ_HEAD(, mps_command)	req_list;
302	TAILQ_HEAD(, mps_command)	high_priority_req_list;
303	TAILQ_HEAD(, mps_chain)		chain_list;
304	TAILQ_HEAD(, mps_command)	tm_list;
305	int				replypostindex;
306	int				replyfreeindex;
307
308	struct resource			*mps_regs_resource;
309	bus_space_handle_t		mps_bhandle;
310	bus_space_tag_t			mps_btag;
311	int				mps_regs_rid;
312
313	bus_dma_tag_t			mps_parent_dmat;
314	bus_dma_tag_t			buffer_dmat;
315
316	MPI2_IOC_FACTS_REPLY		*facts;
317	int				num_reqs;
318	int				num_prireqs;
319	int				num_replies;
320	int				fqdepth;	/* Free queue */
321	int				pqdepth;	/* Post queue */
322
323	u32             event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
324	TAILQ_HEAD(, mps_event_handle)	event_list;
325	struct mps_event_handle		*mps_log_eh;
326
327	struct mtx			mps_mtx;
328	struct intr_config_hook		mps_ich;
329	struct resource			*mps_irq[MPS_MSI_COUNT];
330	void				*mps_intrhand[MPS_MSI_COUNT];
331	int				mps_irq_rid[MPS_MSI_COUNT];
332
333	uint8_t				*req_frames;
334	bus_addr_t			req_busaddr;
335	bus_dma_tag_t			req_dmat;
336	bus_dmamap_t			req_map;
337
338	uint8_t				*reply_frames;
339	bus_addr_t			reply_busaddr;
340	bus_dma_tag_t			reply_dmat;
341	bus_dmamap_t			reply_map;
342
343	struct scsi_sense_data		*sense_frames;
344	bus_addr_t			sense_busaddr;
345	bus_dma_tag_t			sense_dmat;
346	bus_dmamap_t			sense_map;
347
348	uint8_t				*chain_frames;
349	bus_addr_t			chain_busaddr;
350	bus_dma_tag_t			chain_dmat;
351	bus_dmamap_t			chain_map;
352
353	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
354	bus_addr_t			post_busaddr;
355	uint32_t			*free_queue;
356	bus_addr_t			free_busaddr;
357	bus_dma_tag_t			queues_dmat;
358	bus_dmamap_t			queues_map;
359
360	uint8_t				*fw_diag_buffer;
361	bus_addr_t			fw_diag_busaddr;
362	bus_dma_tag_t			fw_diag_dmat;
363	bus_dmamap_t			fw_diag_map;
364
365	uint8_t				ir_firmware;
366
367	/* static config pages */
368	Mpi2IOCPage8_t			ioc_pg8;
369
370	/* host mapping support */
371	struct dev_mapping_table	*mapping_table;
372	struct enc_mapping_table	*enclosure_table;
373	struct map_removal_table	*removal_table;
374	uint8_t				*dpm_entry_used;
375	uint8_t				*dpm_flush_entry;
376	Mpi2DriverMappingPage0_t	*dpm_pg0;
377	uint16_t			max_devices;
378	uint16_t			max_enclosures;
379	uint16_t			max_expanders;
380	uint8_t				max_volumes;
381	uint8_t				num_enc_table_entries;
382	uint8_t				num_rsvd_entries;
383	uint16_t			max_dpm_entries;
384	uint8_t				is_dpm_enable;
385	uint8_t				track_mapping_events;
386	uint32_t			pending_map_events;
387
388	/* FW diag Buffer List */
389	mps_fw_diagnostic_buffer_t
390				fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
391
392	/* Event Recording IOCTL support */
393	uint32_t			events_to_record[4];
394	mps_event_entry_t		recorded_events[MPS_EVENT_QUEUE_SIZE];
395	uint8_t				event_index;
396	uint32_t			event_number;
397
398	/* EEDP and TLR support */
399	uint8_t				eedp_enabled;
400	uint8_t				control_TLR;
401
402	/* Shutdown Event Handler */
403	eventhandler_tag		shutdown_eh;
404
405	/* To track topo events during reset */
406#define	MPS_DIAG_RESET_TIMEOUT	300000
407	uint8_t				wait_for_port_enable;
408	uint8_t				port_enable_complete;
409	uint8_t				msleep_fake_chan;
410
411	/* WD controller */
412	uint8_t             WD_available;
413	uint8_t				WD_valid_config;
414	uint8_t				WD_hide_expose;
415
416	/* Direct Drive for WarpDrive */
417	uint8_t				DD_num_phys_disks;
418	uint16_t			DD_dev_handle;
419	uint32_t			DD_stripe_size;
420	uint32_t			DD_stripe_exponent;
421	uint32_t			DD_block_size;
422	uint16_t			DD_block_exponent;
423	uint64_t			DD_max_lba;
424	struct mps_column_map		DD_column_map[MPS_MAX_DISKS_IN_VOL];
425
426	char				exclude_ids[80];
427	struct timeval			lastfail;
428
429	/* StartStopUnit command handling at shutdown */
430	uint32_t			SSU_refcount;
431	uint8_t				SSU_started;
432};
433
434struct mps_config_params {
435	MPI2_CONFIG_EXT_PAGE_HEADER_UNION	hdr;
436	u_int		action;
437	u_int		page_address;	/* Attributes, not a phys address */
438	u_int		status;
439	void		*buffer;
440	u_int		length;
441	int		timeout;
442	void		(*callback)(struct mps_softc *, struct mps_config_params *);
443	void		*cbdata;
444};
445
446struct scsi_read_capacity_eedp
447{
448	uint8_t addr[8];
449	uint8_t length[4];
450	uint8_t protect;
451};
452
453static __inline uint32_t
454mps_regread(struct mps_softc *sc, uint32_t offset)
455{
456	return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
457}
458
459static __inline void
460mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
461{
462	bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
463}
464
465/* free_queue must have Little Endian address
466 * TODO- cm_reply_data is unwanted. We can remove it.
467 * */
468static __inline void
469mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
470{
471	if (++sc->replyfreeindex >= sc->fqdepth)
472		sc->replyfreeindex = 0;
473	sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
474	mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
475}
476
477static __inline struct mps_chain *
478mps_alloc_chain(struct mps_softc *sc)
479{
480	struct mps_chain *chain;
481
482	if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
483		TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
484		sc->chain_free--;
485		if (sc->chain_free < sc->chain_free_lowwater)
486			sc->chain_free_lowwater = sc->chain_free;
487	} else
488		sc->chain_alloc_fail++;
489	return (chain);
490}
491
492static __inline void
493mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
494{
495	sc->chain_free++;
496	TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
497}
498
499static __inline void
500mps_free_command(struct mps_softc *sc, struct mps_command *cm)
501{
502	struct mps_chain *chain, *chain_temp;
503
504	if (cm->cm_reply != NULL)
505		mps_free_reply(sc, cm->cm_reply_data);
506	cm->cm_reply = NULL;
507	cm->cm_flags = 0;
508	cm->cm_complete = NULL;
509	cm->cm_complete_data = NULL;
510	cm->cm_ccb = NULL;
511	cm->cm_targ = NULL;
512	cm->cm_max_segs = 0;
513	cm->cm_lun = 0;
514	cm->cm_state = MPS_CM_STATE_FREE;
515	cm->cm_data = NULL;
516	cm->cm_length = 0;
517	cm->cm_out_len = 0;
518	cm->cm_sglsize = 0;
519	cm->cm_sge = NULL;
520
521	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
522		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
523		mps_free_chain(sc, chain);
524	}
525	TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
526}
527
528static __inline struct mps_command *
529mps_alloc_command(struct mps_softc *sc)
530{
531	struct mps_command *cm;
532
533	cm = TAILQ_FIRST(&sc->req_list);
534	if (cm == NULL)
535		return (NULL);
536
537	TAILQ_REMOVE(&sc->req_list, cm, cm_link);
538	KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n"));
539	cm->cm_state = MPS_CM_STATE_BUSY;
540	return (cm);
541}
542
543static __inline void
544mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
545{
546	struct mps_chain *chain, *chain_temp;
547
548	if (cm->cm_reply != NULL)
549		mps_free_reply(sc, cm->cm_reply_data);
550	cm->cm_reply = NULL;
551	cm->cm_flags = 0;
552	cm->cm_complete = NULL;
553	cm->cm_complete_data = NULL;
554	cm->cm_ccb = NULL;
555	cm->cm_targ = NULL;
556	cm->cm_lun = 0;
557	cm->cm_state = MPS_CM_STATE_FREE;
558	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
559		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
560		mps_free_chain(sc, chain);
561	}
562	TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
563}
564
565static __inline struct mps_command *
566mps_alloc_high_priority_command(struct mps_softc *sc)
567{
568	struct mps_command *cm;
569
570	cm = TAILQ_FIRST(&sc->high_priority_req_list);
571	if (cm == NULL)
572		return (NULL);
573
574	TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
575	KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n"));
576	cm->cm_state = MPS_CM_STATE_BUSY;
577	return (cm);
578}
579
580static __inline void
581mps_lock(struct mps_softc *sc)
582{
583	mtx_lock(&sc->mps_mtx);
584}
585
586static __inline void
587mps_unlock(struct mps_softc *sc)
588{
589	mtx_unlock(&sc->mps_mtx);
590}
591
592#define MPS_INFO	(1 << 0)	/* Basic info */
593#define MPS_FAULT	(1 << 1)	/* Hardware faults */
594#define MPS_EVENT	(1 << 2)	/* Event data from the controller */
595#define MPS_LOG		(1 << 3)	/* Log data from the controller */
596#define MPS_RECOVERY	(1 << 4)	/* Command error recovery tracing */
597#define MPS_ERROR	(1 << 5)	/* Parameter errors, programming bugs */
598#define MPS_INIT	(1 << 6)	/* Things related to system init */
599#define MPS_XINFO	(1 << 7)	/* More detailed/noisy info */
600#define MPS_USER	(1 << 8)	/* Trace user-generated commands */
601#define MPS_MAPPING	(1 << 9)	/* Trace device mappings */
602#define MPS_TRACE	(1 << 10)	/* Function-by-function trace */
603
604#define	MPS_SSU_DISABLE_SSD_DISABLE_HDD	0
605#define	MPS_SSU_ENABLE_SSD_DISABLE_HDD	1
606#define	MPS_SSU_DISABLE_SSD_ENABLE_HDD	2
607#define	MPS_SSU_ENABLE_SSD_ENABLE_HDD	3
608
609#define mps_printf(sc, args...)				\
610	device_printf((sc)->mps_dev, ##args)
611
612#define mps_print_field(sc, msg, args...)		\
613	printf("\t" msg, ##args)
614
615#define mps_vprintf(sc, args...)			\
616do {							\
617	if (bootverbose)				\
618		mps_printf(sc, ##args);			\
619} while (0)
620
621#define mps_dprint(sc, level, msg, args...)		\
622do {							\
623	if ((sc)->mps_debug & (level))			\
624		device_printf((sc)->mps_dev, msg, ##args);	\
625} while (0)
626
627#define MPS_PRINTFIELD_START(sc, tag...)	\
628	mps_printf((sc), ##tag);			\
629	mps_print_field((sc), ":\n")
630#define MPS_PRINTFIELD_END(sc, tag)		\
631	mps_printf((sc), tag "\n")
632#define MPS_PRINTFIELD(sc, facts, attr, fmt)	\
633	mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
634
635#define MPS_FUNCTRACE(sc)			\
636	mps_dprint((sc), MPS_TRACE, "%s\n", __func__)
637
638#define  CAN_SLEEP                      1
639#define  NO_SLEEP                       0
640
641static __inline void
642mps_from_u64(uint64_t data, U64 *mps)
643{
644	(mps)->High = htole32((uint32_t)((data) >> 32));
645	(mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
646}
647
648static __inline uint64_t
649mps_to_u64(U64 *data)
650{
651
652	return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
653}
654
655static __inline void
656mps_mask_intr(struct mps_softc *sc)
657{
658	uint32_t mask;
659
660	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
661	mask |= MPI2_HIM_REPLY_INT_MASK;
662	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
663}
664
665static __inline void
666mps_unmask_intr(struct mps_softc *sc)
667{
668	uint32_t mask;
669
670	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
671	mask &= ~MPI2_HIM_REPLY_INT_MASK;
672	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
673}
674
675int mps_pci_setup_interrupts(struct mps_softc *sc);
676int mps_pci_restore(struct mps_softc *sc);
677
678void mps_get_tunables(struct mps_softc *sc);
679int mps_attach(struct mps_softc *sc);
680int mps_free(struct mps_softc *sc);
681void mps_intr(void *);
682void mps_intr_msi(void *);
683void mps_intr_locked(void *);
684int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
685    void *, struct mps_event_handle **);
686int mps_restart(struct mps_softc *);
687int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
688void mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
689int mps_push_sge(struct mps_command *, void *, size_t, int);
690int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
691int mps_attach_sas(struct mps_softc *sc);
692int mps_detach_sas(struct mps_softc *sc);
693int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
694int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
695void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
696void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
697int mps_attach_user(struct mps_softc *);
698void mps_detach_user(struct mps_softc *);
699void mpssas_record_event(struct mps_softc *sc,
700    MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
701
702int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
703int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout,
704    int sleep_flag);
705
706int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
707    *mpi_reply, Mpi2BiosPage3_t *config_page);
708int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
709    *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
710int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
711    Mpi2IOCPage8_t *);
712int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
713int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
714    Mpi2SasDevicePage0_t *, u32 , u16 );
715int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
716    Mpi2DriverMappingPage0_t *, u16 );
717int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
718    Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
719    u16 handle);
720int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
721    u64 *wwid);
722int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
723    Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
724    u32 page_address);
725void mpssas_ir_shutdown(struct mps_softc *sc);
726
727int mps_reinit(struct mps_softc *sc);
728void mpssas_handle_reinit(struct mps_softc *sc);
729
730void mps_base_static_config_pages(struct mps_softc *sc);
731void mps_wd_config_pages(struct mps_softc *sc);
732
733int mps_mapping_initialize(struct mps_softc *);
734void mps_mapping_topology_change_event(struct mps_softc *,
735    Mpi2EventDataSasTopologyChangeList_t *);
736void mps_mapping_free_memory(struct mps_softc *sc);
737int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
738    Mpi2DriverMappingPage0_t *, u16 );
739void mps_mapping_exit(struct mps_softc *);
740void mps_mapping_check_devices(void *);
741int mps_mapping_allocate_memory(struct mps_softc *sc);
742unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16);
743unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc,
744    u16 handle);
745unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid,
746     u16 volHandle);
747unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc,
748    u16 volHandle);
749void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
750    Mpi2EventDataSasEnclDevStatusChange_t *event_data);
751void mps_mapping_ir_config_change_event(struct mps_softc *sc,
752    Mpi2EventDataIrConfigChangeList_t *event_data);
753int mps_mapping_dump(SYSCTL_HANDLER_ARGS);
754int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS);
755
756void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
757    MPI2_EVENT_NOTIFICATION_REPLY *event);
758void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
759void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
760int mpssas_startup(struct mps_softc *sc);
761struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
762void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets);
763struct mps_command * mpssas_alloc_tm(struct mps_softc *sc);
764void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm);
765void mpssas_release_simq_reinit(struct mpssas_softc *sassc);
766int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm,
767    uint8_t type);
768
769SYSCTL_DECL(_hw_mps);
770
771/* Compatibility shims for different OS versions */
772#if __FreeBSD_version >= 800001
773#define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
774    kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
775#define mps_kproc_exit(arg)	kproc_exit(arg)
776#else
777#define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
778    kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
779#define mps_kproc_exit(arg)	kthread_exit(arg)
780#endif
781
782#if defined(CAM_PRIORITY_XPT)
783#define MPS_PRIORITY_XPT	CAM_PRIORITY_XPT
784#else
785#define MPS_PRIORITY_XPT	5
786#endif
787
788#if __FreeBSD_version < 800107
789// Prior to FreeBSD-8.0 scp3_flags was not defined.
790#define spc3_flags reserved
791
792#define SPC3_SID_PROTECT    0x01
793#define SPC3_SID_3PC        0x08
794#define SPC3_SID_TPGS_MASK  0x30
795#define SPC3_SID_TPGS_IMPLICIT  0x10
796#define SPC3_SID_TPGS_EXPLICIT  0x20
797#define SPC3_SID_ACC        0x40
798#define SPC3_SID_SCCS       0x80
799
800#define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
801#endif
802
803#endif
804
805