ah_osdep.c revision 331722
132180Smsmith/*- 232180Smsmith * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 332180Smsmith * All rights reserved. 432180Smsmith * 532180Smsmith * Redistribution and use in source and binary forms, with or without 632180Smsmith * modification, are permitted provided that the following conditions 732180Smsmith * are met: 832180Smsmith * 1. Redistributions of source code must retain the above copyright 932180Smsmith * notice, this list of conditions and the following disclaimer, 1032180Smsmith * without modification. 1132180Smsmith * 2. Redistributions in binary form must reproduce at minimum a disclaimer 1232180Smsmith * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 1332180Smsmith * redistribution must be conditioned upon including a substantially 1479727Sschweikh * similar Disclaimer requirement for further binary redistribution. 1532180Smsmith * 1632180Smsmith * NO WARRANTY 1732180Smsmith * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1879727Sschweikh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1979727Sschweikh * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 2079727Sschweikh * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 2179727Sschweikh * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 2279727Sschweikh * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2379727Sschweikh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2432180Smsmith * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 2532180Smsmith * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2650476Speter * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 2732180Smsmith * THE POSSIBILITY OF SUCH DAMAGES. 2832180Smsmith * 2932180Smsmith * $FreeBSD: stable/11/sys/dev/ath/ah_osdep.c 331722 2018-03-29 02:50:57Z eadler $ 3079538Sru */ 3132180Smsmith#include "opt_ah.h" 3232180Smsmith 3375670Sru#include <sys/param.h> 3432180Smsmith#include <sys/systm.h> 3556460Sasmodai#include <sys/kernel.h> 3668575Sru#include <sys/module.h> 37131530Sru#include <sys/sysctl.h> 38119959Sru#include <sys/bus.h> 39119959Sru#include <sys/malloc.h> 40119959Sru#include <sys/proc.h> 4132180Smsmith#include <sys/pcpu.h> 4232180Smsmith#include <sys/lock.h> 4332180Smsmith#include <sys/mutex.h> 4432180Smsmith 4532180Smsmith#include <machine/stdarg.h> 4632180Smsmith 4732180Smsmith#include <net/ethernet.h> /* XXX for ether_sprintf */ 4832180Smsmith 4932180Smsmith#include <dev/ath/ath_hal/ah.h> 5032180Smsmith#include <dev/ath/ath_hal/ah_debug.h> 5132180Smsmith 5232180Smsmith/* 5332180Smsmith * WiSoC boards overload the bus tag with information about the 54117011Sru * board layout. We must extract the bus space tag from that 55117011Sru * indirect structure. For everyone else the tag is passed in 5670466Sru * directly. 57117011Sru * XXX cache indirect ref privately 58117011Sru */ 5971895Sru#ifdef AH_SUPPORT_AR5312 6071895Sru#define BUSTAG(ah) \ 6132180Smsmith ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 6271895Sru#else 6332180Smsmith#define BUSTAG(ah) ((ah)->ah_st) 6471895Sru#endif 6532180Smsmith 66117011Sru/* 67117011Sru * This lock is used to seralise register access for chips which have 6871895Sru * problems w/ SMP CPUs issuing concurrent PCI transactions. 6971895Sru * 7071895Sru * XXX This is a global lock for now; it should be pushed to 7171895Sru * a per-device lock in some platform-independent fashion. 7271895Sru */ 7371895Srustruct mtx ah_regser_mtx; 7432180SmsmithMTX_SYSINIT(ah_regser, &ah_regser_mtx, "Atheros register access mutex", 7571895Sru MTX_SPIN); 7632180Smsmith 7771895Sruextern void ath_hal_printf(struct ath_hal *, const char*, ...) 7832180Smsmith __printflike(2,3); 7971895Sruextern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 8032180Smsmith __printflike(2, 0); 8132180Smsmithextern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 8232180Smsmithextern void *ath_hal_malloc(size_t); 8332180Smsmithextern void ath_hal_free(void *); 8432180Smsmith#ifdef AH_ASSERT 8532180Smsmithextern void ath_hal_assert_failed(const char* filename, 8632180Smsmith int lineno, const char* msg); 8732180Smsmith#endif 8832180Smsmith#ifdef AH_DEBUG 8932180Smsmithextern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 9032180Smsmith#endif /* AH_DEBUG */ 9132180Smsmith 9232180Smsmith/* NB: put this here instead of the driver to avoid circular references */ 9332180SmsmithSYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 9432180Smsmithstatic SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, 9532180Smsmith "Atheros HAL parameters"); 9632180Smsmith 9732180Smsmith#ifdef AH_DEBUG 9832180Smsmithint ath_hal_debug = 0; 9932180SmsmithSYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RWTUN, &ath_hal_debug, 10032180Smsmith 0, "Atheros HAL debugging printfs"); 10132180Smsmith#endif /* AH_DEBUG */ 10232180Smsmith 10332180Smsmithstatic MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 10432180Smsmith 10532180Smsmithvoid* 10632180Smsmithath_hal_malloc(size_t size) 10732180Smsmith{ 108 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 109} 110 111void 112ath_hal_free(void* p) 113{ 114 free(p, M_ATH_HAL); 115} 116 117void 118ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 119{ 120 vprintf(fmt, ap); 121} 122 123void 124ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 125{ 126 va_list ap; 127 va_start(ap, fmt); 128 ath_hal_vprintf(ah, fmt, ap); 129 va_end(ap); 130} 131 132const char* 133ath_hal_ether_sprintf(const u_int8_t *mac) 134{ 135 return ether_sprintf(mac); 136} 137 138#ifdef AH_DEBUG 139 140/* 141 * XXX This is highly relevant only for the AR5416 and later 142 * PCI/PCIe NICs. It'll need adjustment for other hardware 143 * variations. 144 */ 145static int 146ath_hal_reg_whilst_asleep(struct ath_hal *ah, uint32_t reg) 147{ 148 149 if (reg >= 0x4000 && reg < 0x5000) 150 return (1); 151 if (reg >= 0x6000 && reg < 0x7000) 152 return (1); 153 if (reg >= 0x7000 && reg < 0x8000) 154 return (1); 155 return (0); 156} 157 158void 159DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 160{ 161 if ((mask == HAL_DEBUG_UNMASKABLE) || 162 (ah != NULL && ah->ah_config.ah_debug & mask) || 163 (ath_hal_debug & mask)) { 164 __va_list ap; 165 va_start(ap, fmt); 166 ath_hal_vprintf(ah, fmt, ap); 167 va_end(ap); 168 } 169} 170#undef HAL_DEBUG_UNMASKABLE 171#endif /* AH_DEBUG */ 172 173#ifdef AH_DEBUG_ALQ 174/* 175 * ALQ register tracing support. 176 * 177 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 178 * writes to the file /tmp/ath_hal.log. The file format is a simple 179 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 180 * and then decode the file with the arcode program (that is part of the 181 * HAL). If you start+stop tracing the data will be appended to an 182 * existing file. 183 * 184 * NB: doesn't handle multiple devices properly; only one DEVICE record 185 * is emitted and the different devices are not identified. 186 */ 187#include <sys/alq.h> 188#include <sys/pcpu.h> 189#include <dev/ath/ath_hal/ah_decode.h> 190 191static struct alq *ath_hal_alq; 192static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 193static u_int ath_hal_alq_lost; /* count of lost records */ 194static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log"; 195 196SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW, 197 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile"); 198 199static u_int ath_hal_alq_qsize = 64*1024; 200 201static int 202ath_hal_setlogging(int enable) 203{ 204 int error; 205 206 if (enable) { 207 error = alq_open(&ath_hal_alq, ath_hal_logfile, 208 curthread->td_ucred, ALQ_DEFAULT_CMODE, 209 sizeof (struct athregrec), ath_hal_alq_qsize); 210 ath_hal_alq_lost = 0; 211 ath_hal_alq_emitdev = 1; 212 printf("ath_hal: logging to %s enabled\n", 213 ath_hal_logfile); 214 } else { 215 if (ath_hal_alq) 216 alq_close(ath_hal_alq); 217 ath_hal_alq = NULL; 218 printf("ath_hal: logging disabled\n"); 219 error = 0; 220 } 221 return (error); 222} 223 224static int 225sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 226{ 227 int error, enable; 228 229 enable = (ath_hal_alq != NULL); 230 error = sysctl_handle_int(oidp, &enable, 0, req); 231 if (error || !req->newptr) 232 return (error); 233 else 234 return (ath_hal_setlogging(enable)); 235} 236SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 237 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 238SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 239 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 240SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 241 &ath_hal_alq_lost, 0, "Register operations not logged"); 242 243static struct ale * 244ath_hal_alq_get(struct ath_hal *ah) 245{ 246 struct ale *ale; 247 248 if (ath_hal_alq_emitdev) { 249 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 250 if (ale) { 251 struct athregrec *r = 252 (struct athregrec *) ale->ae_data; 253 r->op = OP_DEVICE; 254 r->reg = 0; 255 r->val = ah->ah_devid; 256 alq_post(ath_hal_alq, ale); 257 ath_hal_alq_emitdev = 0; 258 } else 259 ath_hal_alq_lost++; 260 } 261 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 262 if (!ale) 263 ath_hal_alq_lost++; 264 return ale; 265} 266 267void 268ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 269{ 270 bus_space_tag_t tag = BUSTAG(ah); 271 bus_space_handle_t h = ah->ah_sh; 272 273#ifdef AH_DEBUG 274 /* Debug - complain if we haven't fully waken things up */ 275 if (! ath_hal_reg_whilst_asleep(ah, reg) && 276 ah->ah_powerMode != HAL_PM_AWAKE) { 277 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 278 __func__, reg, val, ah->ah_powerMode); 279 } 280#endif 281 282 if (ath_hal_alq) { 283 struct ale *ale = ath_hal_alq_get(ah); 284 if (ale) { 285 struct athregrec *r = (struct athregrec *) ale->ae_data; 286 r->threadid = curthread->td_tid; 287 r->op = OP_WRITE; 288 r->reg = reg; 289 r->val = val; 290 alq_post(ath_hal_alq, ale); 291 } 292 } 293 if (ah->ah_config.ah_serialise_reg_war) 294 mtx_lock_spin(&ah_regser_mtx); 295 bus_space_write_4(tag, h, reg, val); 296 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_WRITE); 297 if (ah->ah_config.ah_serialise_reg_war) 298 mtx_unlock_spin(&ah_regser_mtx); 299} 300 301u_int32_t 302ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 303{ 304 bus_space_tag_t tag = BUSTAG(ah); 305 bus_space_handle_t h = ah->ah_sh; 306 u_int32_t val; 307 308#ifdef AH_DEBUG 309 /* Debug - complain if we haven't fully waken things up */ 310 if (! ath_hal_reg_whilst_asleep(ah, reg) && 311 ah->ah_powerMode != HAL_PM_AWAKE) { 312 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 313 __func__, reg, ah->ah_powerMode); 314 } 315#endif 316 317 if (ah->ah_config.ah_serialise_reg_war) 318 mtx_lock_spin(&ah_regser_mtx); 319 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_READ); 320 val = bus_space_read_4(tag, h, reg); 321 if (ah->ah_config.ah_serialise_reg_war) 322 mtx_unlock_spin(&ah_regser_mtx); 323 if (ath_hal_alq) { 324 struct ale *ale = ath_hal_alq_get(ah); 325 if (ale) { 326 struct athregrec *r = (struct athregrec *) ale->ae_data; 327 r->threadid = curthread->td_tid; 328 r->op = OP_READ; 329 r->reg = reg; 330 r->val = val; 331 alq_post(ath_hal_alq, ale); 332 } 333 } 334 return val; 335} 336 337void 338OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 339{ 340 if (ath_hal_alq) { 341 struct ale *ale = ath_hal_alq_get(ah); 342 if (ale) { 343 struct athregrec *r = (struct athregrec *) ale->ae_data; 344 r->threadid = curthread->td_tid; 345 r->op = OP_MARK; 346 r->reg = id; 347 r->val = v; 348 alq_post(ath_hal_alq, ale); 349 } 350 } 351} 352#else /* AH_DEBUG_ALQ */ 353 354/* 355 * Memory-mapped device register read/write. These are here 356 * as routines when debugging support is enabled and/or when 357 * explicitly configured to use function calls. The latter is 358 * for architectures that might need to do something before 359 * referencing memory (e.g. remap an i/o window). 360 * 361 * NB: see the comments in ah_osdep.h about byte-swapping register 362 * reads and writes to understand what's going on below. 363 */ 364 365void 366ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 367{ 368 bus_space_tag_t tag = BUSTAG(ah); 369 bus_space_handle_t h = ah->ah_sh; 370 371#ifdef AH_DEBUG 372 /* Debug - complain if we haven't fully waken things up */ 373 if (! ath_hal_reg_whilst_asleep(ah, reg) && 374 ah->ah_powerMode != HAL_PM_AWAKE) { 375 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 376 __func__, reg, val, ah->ah_powerMode); 377 } 378#endif 379 380 if (ah->ah_config.ah_serialise_reg_war) 381 mtx_lock_spin(&ah_regser_mtx); 382 bus_space_write_4(tag, h, reg, val); 383 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_WRITE); 384 if (ah->ah_config.ah_serialise_reg_war) 385 mtx_unlock_spin(&ah_regser_mtx); 386} 387 388u_int32_t 389ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 390{ 391 bus_space_tag_t tag = BUSTAG(ah); 392 bus_space_handle_t h = ah->ah_sh; 393 u_int32_t val; 394 395#ifdef AH_DEBUG 396 /* Debug - complain if we haven't fully waken things up */ 397 if (! ath_hal_reg_whilst_asleep(ah, reg) && 398 ah->ah_powerMode != HAL_PM_AWAKE) { 399 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 400 __func__, reg, ah->ah_powerMode); 401 } 402#endif 403 404 if (ah->ah_config.ah_serialise_reg_war) 405 mtx_lock_spin(&ah_regser_mtx); 406 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_READ); 407 val = bus_space_read_4(tag, h, reg); 408 if (ah->ah_config.ah_serialise_reg_war) 409 mtx_unlock_spin(&ah_regser_mtx); 410 return val; 411} 412#endif /* AH_DEBUG_ALQ */ 413 414#ifdef AH_ASSERT 415void 416ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 417{ 418 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 419 filename, lineno, msg); 420 panic("ath_hal_assert"); 421} 422#endif /* AH_ASSERT */ 423