a10_sramc.c revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: stable/11/sys/arm/allwinner/a10_sramc.c 330897 2018-03-14 03:19:51Z eadler $
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: stable/11/sys/arm/allwinner/a10_sramc.c 330897 2018-03-14 03:19:51Z eadler $");
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/malloc.h>
40#include <sys/rman.h>
41#include <sys/timeet.h>
42#include <sys/timetc.h>
43#include <sys/watchdog.h>
44#include <machine/bus.h>
45#include <machine/cpu.h>
46#include <machine/frame.h>
47#include <machine/intr.h>
48
49#include <dev/fdt/fdt_common.h>
50#include <dev/ofw/openfirm.h>
51#include <dev/ofw/ofw_bus.h>
52#include <dev/ofw/ofw_bus_subr.h>
53
54#include "a10_sramc.h"
55
56#define	SRAM_CTL1_CFG		0x04
57#define	CTL1_CFG_SRAMD_MAP_USB0	(1 << 0)
58
59struct a10_sramc_softc {
60	struct resource		*res;
61	bus_space_tag_t		bst;
62	bus_space_handle_t	bsh;
63};
64
65static struct a10_sramc_softc *a10_sramc_sc;
66
67#define	sramc_read_4(sc, reg)		\
68    bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
69#define	sramc_write_4(sc, reg, val)	\
70    bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
71
72
73static int
74a10_sramc_probe(device_t dev)
75{
76
77	if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-sram-controller")) {
78		device_set_desc(dev, "Allwinner sramc module");
79		return (BUS_PROBE_DEFAULT);
80	}
81
82	return (ENXIO);
83}
84
85static int
86a10_sramc_attach(device_t dev)
87{
88	struct a10_sramc_softc *sc = device_get_softc(dev);
89	int rid = 0;
90
91	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
92	if (!sc->res) {
93		device_printf(dev, "could not allocate resource\n");
94		return (ENXIO);
95	}
96
97	sc->bst = rman_get_bustag(sc->res);
98	sc->bsh = rman_get_bushandle(sc->res);
99
100	a10_sramc_sc = sc;
101
102	return (0);
103}
104
105static device_method_t a10_sramc_methods[] = {
106	DEVMETHOD(device_probe,		a10_sramc_probe),
107	DEVMETHOD(device_attach,	a10_sramc_attach),
108	{ 0, 0 }
109};
110
111static driver_t a10_sramc_driver = {
112	"a10_sramc",
113	a10_sramc_methods,
114	sizeof(struct a10_sramc_softc),
115};
116
117static devclass_t a10_sramc_devclass;
118
119EARLY_DRIVER_MODULE(a10_sramc, simplebus, a10_sramc_driver, a10_sramc_devclass,
120    0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_EARLY);
121
122int
123a10_map_to_emac(void)
124{
125	struct a10_sramc_softc *sc = a10_sramc_sc;
126	uint32_t reg_value;
127
128	if (sc == NULL)
129		return (ENXIO);
130
131	/* Map SRAM to EMAC, set bit 2 and 4. */
132	reg_value = sramc_read_4(sc, SRAM_CTL1_CFG);
133	reg_value |= 0x5 << 2;
134	sramc_write_4(sc, SRAM_CTL1_CFG, reg_value);
135
136	return (0);
137}
138
139int
140a10_map_to_otg(void)
141{
142	struct a10_sramc_softc *sc = a10_sramc_sc;
143	uint32_t reg_value;
144
145	if (sc == NULL)
146		return (ENXIO);
147
148	/* Map SRAM to OTG */
149	reg_value = sramc_read_4(sc, SRAM_CTL1_CFG);
150	reg_value |= CTL1_CFG_SRAMD_MAP_USB0;
151	sramc_write_4(sc, SRAM_CTL1_CFG, reg_value);
152
153	return (0);
154}
155