mvStorageDev.h revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2004-2005 MARVELL SEMICONDUCTOR ISRAEL, LTD.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: stable/11/sys/dev/hptmv/mvStorageDev.h 330897 2018-03-14 03:19:51Z eadler $
29 */
30#ifndef __INCmvStorageDevh
31#define __INCmvStorageDevh
32
33/* Definitions */
34
35/* ATA register on the ATA drive*/
36
37#define MV_EDMA_ATA_FEATURES_ADDR				0x11
38#define MV_EDMA_ATA_SECTOR_COUNT_ADDR			0x12
39#define MV_EDMA_ATA_LBA_LOW_ADDR				0x13
40#define MV_EDMA_ATA_LBA_MID_ADDR				0x14
41#define MV_EDMA_ATA_LBA_HIGH_ADDR				0x15
42#define MV_EDMA_ATA_DEVICE_ADDR					0x16
43#define MV_EDMA_ATA_COMMAND_ADDR				0x17
44
45#define MV_ATA_ERROR_STATUS						0x00000001 /* MV_BIT0 */
46#define MV_ATA_DATA_REQUEST_STATUS				0x00000008 /* MV_BIT3 */
47#define MV_ATA_SERVICE_STATUS					0x00000010 /* MV_BIT4 */
48#define MV_ATA_DEVICE_FAULT_STATUS				0x00000020 /* MV_BIT5 */
49#define MV_ATA_READY_STATUS						0x00000040 /* MV_BIT6 */
50#define MV_ATA_BUSY_STATUS						0x00000080 /* MV_BIT7 */
51
52
53#define MV_ATA_COMMAND_READ_SECTORS				0x20
54#define MV_ATA_COMMAND_READ_SECTORS_EXT         0x24
55#define MV_ATA_COMMAND_READ_VERIFY_SECTORS		0x40
56#define MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT	0x42
57#define MV_ATA_COMMAND_READ_BUFFER				0xE4
58#define MV_ATA_COMMAND_WRITE_BUFFER             0xE8
59#define MV_ATA_COMMAND_WRITE_SECTORS			0x30
60#define MV_ATA_COMMAND_WRITE_SECTORS_EXT        0x34
61#define MV_ATA_COMMAND_DIAGNOSTIC				0x90
62#define MV_ATA_COMMAND_SMART                    0xb0
63#define MV_ATA_COMMAND_READ_MULTIPLE            0xc4
64#define MV_ATA_COMMAND_WRITE_MULTIPLE           0xc5
65#define MV_ATA_COMMAND_STANDBY_IMMEDIATE		0xe0
66#define MV_ATA_COMMAND_IDLE_IMMEDIATE			0xe1
67#define MV_ATA_COMMAND_STANDBY					0xe2
68#define MV_ATA_COMMAND_IDLE						0xe3
69#define MV_ATA_COMMAND_SLEEP					0xe6
70#define MV_ATA_COMMAND_IDENTIFY					0xec
71#define MV_ATA_COMMAND_DEVICE_CONFIG            0xb1
72#define MV_ATA_COMMAND_SET_FEATURES				0xef
73#define MV_ATA_COMMAND_WRITE_DMA				0xca
74#define MV_ATA_COMMAND_WRITE_DMA_EXT			0x35
75#define MV_ATA_COMMAND_WRITE_DMA_QUEUED			0xcc
76#define MV_ATA_COMMAND_WRITE_DMA_QUEUED_EXT		0x36
77#define MV_ATA_COMMAND_WRITE_FPDMA_QUEUED_EXT   0x61
78#define MV_ATA_COMMAND_READ_DMA					0xc8
79#define MV_ATA_COMMAND_READ_DMA_EXT				0x25
80#define MV_ATA_COMMAND_READ_DMA_QUEUED			0xc7
81#define MV_ATA_COMMAND_READ_DMA_QUEUED_EXT		0x26
82#define MV_ATA_COMMAND_READ_FPDMA_QUEUED_EXT    0x60
83#define MV_ATA_COMMAND_FLUSH_CACHE              0xe7
84#define MV_ATA_COMMAND_FLUSH_CACHE_EXT          0xea
85
86
87#define MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO	0x01
88#define MV_ATA_SET_FEATURES_ENABLE_WCACHE		0x02  /* Enable write cache */
89#define MV_ATA_SET_FEATURES_TRANSFER        	0x03  /* Set transfer mode	*/
90#define MV_ATA_TRANSFER_UDMA_0     		        0x40
91#define MV_ATA_TRANSFER_UDMA_1     		        0x41
92#define MV_ATA_TRANSFER_UDMA_2     		        0x42
93#define MV_ATA_TRANSFER_UDMA_3     		        0x43
94#define MV_ATA_TRANSFER_UDMA_4     		        0x44
95#define MV_ATA_TRANSFER_UDMA_5     		        0x45
96#define MV_ATA_TRANSFER_UDMA_6     		        0x46
97#define MV_ATA_TRANSFER_UDMA_7     		        0x47
98#define MV_ATA_TRANSFER_PIO_SLOW           		0x00
99#define MV_ATA_TRANSFER_PIO_0              		0x08
100#define MV_ATA_TRANSFER_PIO_1              		0x09
101#define MV_ATA_TRANSFER_PIO_2              		0x0A
102#define MV_ATA_TRANSFER_PIO_3              		0x0B
103#define MV_ATA_TRANSFER_PIO_4              		0x0C
104/* Enable advanced power management */
105#define MV_ATA_SET_FEATURES_ENABLE_APM			0x05
106/* Disable media status notification*/
107#define MV_ATA_SET_FEATURES_DISABLE_MSN			0x31
108/* Disable read look-ahead		    */
109#define MV_ATA_SET_FEATURES_DISABLE_RLA			0x55
110/* Enable release interrupt		    */
111#define MV_ATA_SET_FEATURES_ENABLE_RI			0x5D
112/* Enable SERVICE interrupt		    */
113#define MV_ATA_SET_FEATURES_ENABLE_SI			0x5E
114/* Disable revert power-on defaults */
115#define MV_ATA_SET_FEATURES_DISABLE_RPOD		0x66
116/* Disable write cache			    */
117#define MV_ATA_SET_FEATURES_DISABLE_WCACHE		0x82
118/* Disable advanced power management*/
119#define MV_ATA_SET_FEATURES_DISABLE_APM			0x85
120/* Enable media status notification */
121#define MV_ATA_SET_FEATURES_ENABLE_MSN			0x95
122/* Enable read look-ahead		    */
123#define MV_ATA_SET_FEATURES_ENABLE_RLA			0xAA
124/* Enable revert power-on defaults  */
125#define MV_ATA_SET_FEATURES_ENABLE_RPOD			0xCC
126/* Disable release interrupt	    */
127#define MV_ATA_SET_FEATURES_DISABLE_RI			0xDD
128/* Disable SERVICE interrupt	    */
129#define MV_ATA_SET_FEATURES_DISABLE_SI			0xDE
130
131/* Defines for parsing the IDENTIFY command results*/
132#define IDEN_SERIAL_NUM_OFFSET 					10
133#define IDEN_SERIAL_NUM_SIZE   					19-10
134#define IDEN_FIRMWARE_OFFSET 					23
135#define IDEN_FIRMWARE_SIZE  					26-23
136#define IDEN_MODEL_OFFSET   					27
137#define IDEN_MODEL_SIZE     					46-27
138#define IDEN_CAPACITY_1_OFFSET  				49
139#define IDEN_VALID								53
140#define IDEN_NUM_OF_ADDRESSABLE_SECTORS			60
141#define	IDEN_PIO_MODE_SPPORTED					64
142#define IDEN_QUEUE_DEPTH						75
143#define IDEN_SATA_CAPABILITIES                  76
144#define IDEN_SATA_FEATURES_SUPPORTED            78
145#define IDEN_SATA_FEATURES_ENABLED              79
146#define IDEN_ATA_VERSION						80
147#define IDEN_SUPPORTED_COMMANDS1				82
148#define IDEN_SUPPORTED_COMMANDS2				83
149#define IDEN_ENABLED_COMMANDS1					85
150#define IDEN_ENABLED_COMMANDS2					86
151#define IDEN_UDMA_MODE							88
152#define IDEN_SATA_CAPABILITY					76
153
154
155/* Typedefs    */
156
157/* Structures  */
158typedef struct mvStorageDevRegisters
159{
160    /* Fields set by CORE driver */
161    MV_U8    errorRegister;
162    MV_U16   sectorCountRegister;
163    MV_U16   lbaLowRegister;
164    MV_U16   lbaMidRegister;
165    MV_U16   lbaHighRegister;
166    MV_U8    deviceRegister;
167    MV_U8    statusRegister;
168} MV_STORAGE_DEVICE_REGISTERS;
169
170/* Bits for HD_ERROR */
171#define NM_ERR			0x02	/* media present */
172#define ABRT_ERR		0x04	/* Command aborted */
173#define MCR_ERR         0x08	/* media change request */
174#define IDNF_ERR        0x10	/* ID field not found */
175#define MC_ERR          0x20	/* media changed */
176#define UNC_ERR         0x40	/* Uncorrect data */
177#define WP_ERR          0x40	/* write protect */
178#define ICRC_ERR        0x80	/* new meaning:  CRC error during transfer */
179
180/* Function */
181
182MV_BOOLEAN HPTLIBAPI mvStorageDevATAExecuteNonUDMACommand(MV_SATA_ADAPTER *pAdapter,
183												MV_U8 channelIndex,
184											MV_NON_UDMA_PROTOCOL protocolType,
185												MV_BOOLEAN  isEXT,
186												MV_U16 FAR *bufPtr, MV_U32 count,
187												MV_U16 features,
188												MV_U16 sectorCount,
189												MV_U16 lbaLow, MV_U16 lbaMid,
190												MV_U16 lbaHigh, MV_U8 device,
191												MV_U8 command);
192
193MV_BOOLEAN HPTLIBAPI mvStorageDevATAIdentifyDevice(MV_SATA_ADAPTER *pAdapter,
194										 MV_U8 channelIndex);
195
196MV_BOOLEAN HPTLIBAPI mvStorageDevATASetFeatures(MV_SATA_ADAPTER *pAdapter,
197									  MV_U8 channelIndex, MV_U8 subCommand,
198									  MV_U8 subCommandSpecific1,
199									  MV_U8 subCommandSpecific2,
200									  MV_U8 subCommandSpecific3,
201									  MV_U8 subCommandSpecific4);
202
203MV_BOOLEAN HPTLIBAPI mvStorageDevATAIdleImmediate(MV_SATA_ADAPTER *pAdapter,
204										MV_U8 channelIndex);
205
206MV_BOOLEAN HPTLIBAPI mvStorageDevATAFlushWriteCache(MV_SATA_ADAPTER *pAdapter,
207										  MV_U8 channelIndex);
208
209MV_BOOLEAN HPTLIBAPI mvStorageDevATASoftResetDevice(MV_SATA_ADAPTER *pAdapter,
210										  MV_U8 channelIndex);
211
212MV_BOOLEAN HPTLIBAPI mvStorageDevWaitStat(MV_SATA_CHANNEL *pSataChannel,
213								MV_U8 good, MV_U8 bad, MV_U32 loops, MV_U32 delay);
214
215MV_BOOLEAN HPTLIBAPI mvReadWrite(MV_SATA_CHANNEL *pSataChannel, LBA_T Lba, UCHAR Cmd, void *tmpBuffer);
216
217#endif
218