scic_sds_port_registers.h revision 330897
1179189Sjb/*-
2179189Sjb * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
3321268Sngie *
4321268Sngie * This file is provided under a dual BSD/GPLv2 license.  When using or
5179189Sjb * redistributing this file, you may do so under either license.
6179189Sjb *
7179189Sjb * GPL LICENSE SUMMARY
8179189Sjb *
9179189Sjb * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
10179189Sjb *
11179189Sjb * This program is free software; you can redistribute it and/or modify
12179189Sjb * it under the terms of version 2 of the GNU General Public License as
13179189Sjb * published by the Free Software Foundation.
14179189Sjb *
15179189Sjb * This program is distributed in the hope that it will be useful, but
16179189Sjb * WITHOUT ANY WARRANTY; without even the implied warranty of
17179189Sjb * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18179189Sjb * General Public License for more details.
19179189Sjb *
20179189Sjb * You should have received a copy of the GNU General Public License
21211554Srpaulo * along with this program; if not, write to the Free Software
22179189Sjb * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23179189Sjb * The full GNU General Public License is included in this distribution
24179189Sjb * in the file called LICENSE.GPL.
25179189Sjb *
26179189Sjb * BSD LICENSE
27179189Sjb *
28179189Sjb * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
29179189Sjb * All rights reserved.
30179189Sjb *
31179189Sjb * Redistribution and use in source and binary forms, with or without
32179189Sjb * modification, are permitted provided that the following conditions
33179189Sjb * are met:
34250574Smarkj *
35179189Sjb *   * Redistributions of source code must retain the above copyright
36248708Spfg *     notice, this list of conditions and the following disclaimer.
37179189Sjb *   * Redistributions in binary form must reproduce the above copyright
38179189Sjb *     notice, this list of conditions and the following disclaimer in
39179189Sjb *     the documentation and/or other materials provided with the
40179189Sjb *     distribution.
41179189Sjb *
42179189Sjb * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43179189Sjb * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44179189Sjb * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45179189Sjb * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46179189Sjb * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47233415Sgonzo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48179189Sjb * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49179189Sjb * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50238366Sgnn * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51254889Smarkj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52179189Sjb * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53283026Smarkj *
54179189Sjb * $FreeBSD: stable/11/sys/dev/isci/scil/scic_sds_port_registers.h 330897 2018-03-14 03:19:51Z eadler $
55254889Smarkj */
56323814Sgnn#ifndef _SCIC_SDS_PORT_REGISTERS_H_
57254889Smarkj#define _SCIC_SDS_PORT_REGISTERS_H_
58179189Sjb
59179189Sjb/**
60287971Sbdrewery * @file
61287971Sbdrewery *
62287971Sbdrewery * @brief This file contains a set of macros that assist in reading the SCU
63287971Sbdrewery * hardware registers.
64204597Suqs */
65179189Sjb
66211554Srpaulo#ifdef __cplusplus
67321268Sngieextern "C" {
68321268Sngie#endif // __cplusplus
69321268Sngie
70179189Sjb/**
71179189Sjb * Macro to read the port task scheduler register associated with this port
72179189Sjb * object
73179189Sjb */
74179189Sjb#define scu_port_task_scheduler_read(port, reg) \
75179189Sjb   scu_register_read( \
76179189Sjb      scic_sds_port_get_controller(port), \
77285009Sbr      (port)->port_task_scheduler_registers->reg \
78285009Sbr   )
79321268Sngie
80321268Sngie/**
81285009Sbr * Macro to write the port task scheduler register associated with this
82321268Sngie * port object
83211554Srpaulo */
84321268Sngie#define scu_port_task_scheduler_write(port, reg, value) \
85321268Sngie   scu_register_write( \
86321268Sngie      scic_sds_port_get_controller(port), \
87285009Sbr      (port)->port_task_scheduler_registers->reg, \
88285009Sbr      (value) \
89321268Sngie   )
90321268Sngie
91233415Sgonzo#define scu_port_viit_register_write(port, reg, value) \
92233415Sgonzo   scu_register_write( \
93321268Sngie      scic_sds_port_get_controller(port), \
94321268Sngie      (port)->viit_registers->reg, \
95242723Sjhibbits      (value) \
96242723Sjhibbits   )
97321268Sngie
98321268Sngie//****************************************************************************
99300618Sbr//* Port Task Scheduler registers controlled by the port object
100300618Sbr//****************************************************************************
101321268Sngie
102321268Sngie/**
103285009Sbr * Macro to read the port task scheduler control register
104285009Sbr */
105321268Sngie#define SCU_PTSxCR_READ(port) \
106179189Sjb   scu_port_task_scheduler_read(port, control)
107179189Sjb
108179189Sjb/**
109179189Sjb * Macro to write the port task scheduler control regsister
110179189Sjb */
111211554Srpaulo#define SCU_PTSxCR_WRITE(port, value) \
112233415Sgonzo   scu_port_task_scheduler_write(port, control, value)
113211554Srpaulo
114211554Srpaulo//****************************************************************************
115211554Srpaulo//* Port PE Configuration registers
116179189Sjb//****************************************************************************
117179189Sjb
118179189Sjb/**
119179189Sjb * Macro to write the PE Port Configuration Register
120283133Sbapt */
121283133Sbapt#define SCU_PCSPExCR_WRITE(port, phy_id, value) \
122179189Sjb   scu_register_write( \
123179189Sjb      scic_sds_port_get_controller(port), \
124313131Smarkj      (port)->port_pe_configuration_register[phy_id], \
125179189Sjb      (value) \
126313131Smarkj   )
127313131Smarkj
128179189Sjb/**
129313131Smarkj * Macro to read the PE Port Configuration Regsiter
130313131Smarkj */
131#define SCU_PCSPExCR_READ(port, phy_id) \
132   scu_register_read( \
133      scic_sds_port_get_controller(port), \
134      (port)->port_pe_configuration_register[phy_id] \
135   )
136
137#ifdef __cplusplus
138}
139#endif // __cplusplus
140
141#endif // _SCIC_SDS_PORT_REGISTERS_H_
142