scc_bfe.h revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2004-2006 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: stable/11/sys/dev/scc/scc_bfe.h 330897 2018-03-14 03:19:51Z eadler $
29 */
30
31#ifndef _DEV_SCC_BFE_H_
32#define _DEV_SCC_BFE_H_
33
34#include <sys/serial.h>
35
36/*
37 * Bus access structure. This structure holds the minimum information needed
38 * to access the SCC. The rclk field, although not important to actually
39 * access the SCC, is important for baudrate programming, delay loops and
40 * other timing related computations.
41 */
42struct scc_bas {
43	bus_space_tag_t	bst;
44	bus_space_handle_t bsh;
45	u_int		range;
46	u_int		rclk;
47	u_int		regshft;
48};
49
50#define	scc_regofs(bas, reg)		((reg) << (bas)->regshft)
51
52#define	scc_getreg(bas, reg)		\
53	bus_space_read_1((bas)->bst, (bas)->bsh, scc_regofs(bas, reg))
54#define	scc_setreg(bas, reg, value)	\
55	bus_space_write_1((bas)->bst, (bas)->bsh, scc_regofs(bas, reg), value)
56
57#define	scc_barrier(bas)		\
58	bus_space_barrier((bas)->bst, (bas)->bsh, 0, (bas)->range,	\
59	    BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
60
61/*
62 * SCC mode (child) and channel control structures.
63 */
64
65#define	SCC_NMODES	3
66#define	SCC_ISRCCNT	5
67
68struct scc_chan;
69
70struct scc_mode {
71	struct scc_chan	*m_chan;
72	device_t	m_dev;
73
74	u_int		m_mode;
75	int		m_attached:1;
76	int		m_fastintr:1;
77	int		m_hasintr:1;
78	int		m_probed:1;
79	int		m_sysdev:1;
80
81	driver_filter_t	*ih;
82	serdev_intr_t	*ih_src[SCC_ISRCCNT];
83	void		*ih_arg;
84};
85
86struct scc_chan {
87	struct resource ch_rres;
88	struct resource_list ch_rlist;
89
90	struct resource *ch_ires;	/* Interrupt resource. */
91	void		*ch_icookie;
92	int		ch_irid;
93
94	struct scc_mode	ch_mode[SCC_NMODES];
95
96	u_int		ch_nr;
97	int		ch_enabled:1;
98	int		ch_sysdev:1;
99
100	uint32_t	ch_ipend;
101	uint32_t	ch_hwsig;
102};
103
104/*
105 * SCC class & instance (=softc)
106 */
107struct scc_class {
108	KOBJ_CLASS_FIELDS;
109	u_int		cl_channels;	/* Number of independent channels. */
110	u_int		cl_class;	/* SCC bus class ID. */
111	u_int		cl_modes;	/* Supported modes (bitset). */
112	int		cl_range;
113};
114
115extern struct scc_class scc_quicc_class;
116extern struct scc_class scc_sab82532_class;
117extern struct scc_class scc_z8530_class;
118
119struct scc_softc {
120	KOBJ_FIELDS;
121	struct scc_class *sc_class;
122	struct scc_bas	sc_bas;
123	device_t	sc_dev;
124
125	struct mtx	sc_hwmtx;	/* Spinlock protecting hardware. */
126
127	struct resource	*sc_rres;	/* Register resource. */
128	int		sc_rrid;
129	int		sc_rtype;	/* SYS_RES_{IOPORT|MEMORY}. */
130
131	struct scc_chan	*sc_chan;
132
133	int		sc_fastintr:1;
134	int		sc_leaving:1;
135	int		sc_polled:1;
136
137	uint32_t        sc_hwsig;       /* Signal state. Used by HW driver. */
138};
139
140extern devclass_t scc_devclass;
141extern const char scc_driver_name[];
142
143int scc_bfe_attach(device_t dev, u_int ipc);
144int scc_bfe_detach(device_t dev);
145int scc_bfe_probe(device_t dev, u_int regshft, u_int rclk, u_int rid);
146
147struct resource *scc_bus_alloc_resource(device_t, device_t, int, int *,
148    rman_res_t, rman_res_t, rman_res_t, u_int);
149int scc_bus_get_resource(device_t, device_t, int, int, rman_res_t *, rman_res_t *);
150int scc_bus_read_ivar(device_t, device_t, int, uintptr_t *);
151int scc_bus_release_resource(device_t, device_t, int, int, struct resource *);
152int scc_bus_setup_intr(device_t, device_t, struct resource *, int,
153    driver_filter_t *, void (*)(void *), void *, void **);
154int scc_bus_teardown_intr(device_t, device_t, struct resource *, void *);
155
156#endif /* _DEV_SCC_BFE_H_ */
157