pccbb.c revision 331722
1/*-
2 * Copyright (c) 2002-2004 M. Warner Losh.
3 * Copyright (c) 2000-2001 Jonathan Chen.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29/*-
30 * Copyright (c) 1998, 1999 and 2000
31 *      HAYAKAWA Koichi.  All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions
35 * are met:
36 * 1. Redistributions of source code must retain the above copyright
37 *    notice, this list of conditions and the following disclaimer.
38 * 2. Redistributions in binary form must reproduce the above copyright
39 *    notice, this list of conditions and the following disclaimer in the
40 *    documentation and/or other materials provided with the distribution.
41 * 3. All advertising materials mentioning features or use of this software
42 *    must display the following acknowledgement:
43 *	This product includes software developed by HAYAKAWA Koichi.
44 * 4. The name of the author may not be used to endorse or promote products
45 *    derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 */
58
59/*
60 * Driver for PCI to CardBus Bridge chips
61 * and PCI to PCMCIA Bridge chips
62 * and ISA to PCMCIA host adapters
63 * and C Bus to PCMCIA host adapters
64 *
65 * References:
66 *  TI Datasheets:
67 *   http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
68 *
69 * Written by Jonathan Chen <jon@freebsd.org>
70 * The author would like to acknowledge:
71 *  * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
72 *  * Warner Losh: Newbus/newcard guru and author of the pccard side of things
73 *  * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
74 *  * David Cross: Author of the initial ugly hack for a specific cardbus card
75 */
76
77#include <sys/cdefs.h>
78__FBSDID("$FreeBSD: stable/11/sys/dev/pccbb/pccbb.c 331722 2018-03-29 02:50:57Z eadler $");
79
80#include <sys/param.h>
81#include <sys/bus.h>
82#include <sys/condvar.h>
83#include <sys/errno.h>
84#include <sys/kernel.h>
85#include <sys/module.h>
86#include <sys/kthread.h>
87#include <sys/interrupt.h>
88#include <sys/lock.h>
89#include <sys/malloc.h>
90#include <sys/mutex.h>
91#include <sys/proc.h>
92#include <sys/rman.h>
93#include <sys/sysctl.h>
94#include <sys/systm.h>
95#include <machine/bus.h>
96#include <machine/resource.h>
97
98#include <dev/pci/pcireg.h>
99#include <dev/pci/pcivar.h>
100#include <dev/pci/pcib_private.h>
101
102#include <dev/pccard/pccardreg.h>
103#include <dev/pccard/pccardvar.h>
104
105#include <dev/exca/excareg.h>
106#include <dev/exca/excavar.h>
107
108#include <dev/pccbb/pccbbreg.h>
109#include <dev/pccbb/pccbbvar.h>
110
111#include "power_if.h"
112#include "card_if.h"
113#include "pcib_if.h"
114
115#define	DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
116#define	DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
117
118#define	PCI_MASK_CONFIG(DEV,REG,MASK,SIZE)				\
119	pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
120#define	PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE)			\
121	pci_write_config(DEV, REG, (					\
122		pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
123
124#define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0)
125
126#define CBB_START_MEM	0x88000000
127#define CBB_START_32_IO 0x1000
128#define CBB_START_16_IO 0x100
129
130devclass_t cbb_devclass;
131
132/* sysctl vars */
133static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
134
135/* There's no way to say TUNEABLE_LONG to get the right types */
136u_long cbb_start_mem = CBB_START_MEM;
137SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RWTUN,
138    &cbb_start_mem, CBB_START_MEM,
139    "Starting address for memory allocations");
140
141u_long cbb_start_16_io = CBB_START_16_IO;
142SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RWTUN,
143    &cbb_start_16_io, CBB_START_16_IO,
144    "Starting ioport for 16-bit cards");
145
146u_long cbb_start_32_io = CBB_START_32_IO;
147SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RWTUN,
148    &cbb_start_32_io, CBB_START_32_IO,
149    "Starting ioport for 32-bit cards");
150
151int cbb_debug = 0;
152SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RWTUN, &cbb_debug, 0,
153    "Verbose cardbus bridge debugging");
154
155static void	cbb_insert(struct cbb_softc *sc);
156static void	cbb_removal(struct cbb_softc *sc);
157static uint32_t	cbb_detect_voltage(device_t brdev);
158static int	cbb_cardbus_reset_power(device_t brdev, device_t child, int on);
159static int	cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
160		    uint32_t end);
161static int	cbb_cardbus_mem_open(device_t brdev, int win,
162		    uint32_t start, uint32_t end);
163static void	cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
164static int	cbb_cardbus_activate_resource(device_t brdev, device_t child,
165		    int type, int rid, struct resource *res);
166static int	cbb_cardbus_deactivate_resource(device_t brdev,
167		    device_t child, int type, int rid, struct resource *res);
168static struct resource	*cbb_cardbus_alloc_resource(device_t brdev,
169		    device_t child, int type, int *rid, rman_res_t start,
170		    rman_res_t end, rman_res_t count, u_int flags);
171static int	cbb_cardbus_release_resource(device_t brdev, device_t child,
172		    int type, int rid, struct resource *res);
173static int	cbb_cardbus_power_enable_socket(device_t brdev,
174		    device_t child);
175static int	cbb_cardbus_power_disable_socket(device_t brdev,
176		    device_t child);
177static int	cbb_func_filt(void *arg);
178static void	cbb_func_intr(void *arg);
179
180static void
181cbb_remove_res(struct cbb_softc *sc, struct resource *res)
182{
183	struct cbb_reslist *rle;
184
185	SLIST_FOREACH(rle, &sc->rl, link) {
186		if (rle->res == res) {
187			SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
188			free(rle, M_DEVBUF);
189			return;
190		}
191	}
192}
193
194static struct resource *
195cbb_find_res(struct cbb_softc *sc, int type, int rid)
196{
197	struct cbb_reslist *rle;
198
199	SLIST_FOREACH(rle, &sc->rl, link)
200		if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
201			return (rle->res);
202	return (NULL);
203}
204
205static void
206cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
207    int rid)
208{
209	struct cbb_reslist *rle;
210
211	/*
212	 * Need to record allocated resource so we can iterate through
213	 * it later.
214	 */
215	rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
216	if (rle == NULL)
217		panic("cbb_cardbus_alloc_resource: can't record entry!");
218	rle->res = res;
219	rle->type = type;
220	rle->rid = rid;
221	SLIST_INSERT_HEAD(&sc->rl, rle, link);
222}
223
224static void
225cbb_destroy_res(struct cbb_softc *sc)
226{
227	struct cbb_reslist *rle;
228
229	while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
230		device_printf(sc->dev, "Danger Will Robinson: Resource "
231		    "left allocated!  This is a bug... "
232		    "(rid=%x, type=%d, addr=%jx)\n", rle->rid, rle->type,
233		    rman_get_start(rle->res));
234		SLIST_REMOVE_HEAD(&sc->rl, link);
235		free(rle, M_DEVBUF);
236	}
237}
238
239/*
240 * Disable function interrupts by telling the bridge to generate IRQ1
241 * interrupts.  These interrupts aren't really generated by the chip, since
242 * IRQ1 is reserved.  Some chipsets assert INTA# inappropriately during
243 * initialization, so this helps to work around the problem.
244 *
245 * XXX We can't do this workaround for all chipsets, because this
246 * XXX causes interference with the keyboard because somechipsets will
247 * XXX actually signal IRQ1 over their serial interrupt connections to
248 * XXX the south bridge.  Disable it it for now.
249 */
250void
251cbb_disable_func_intr(struct cbb_softc *sc)
252{
253#if 0
254	uint8_t reg;
255
256	reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
257	    EXCA_INTR_IRQ_RESERVED1;
258	exca_putb(&sc->exca[0], EXCA_INTR, reg);
259#endif
260}
261
262/*
263 * Enable function interrupts.  We turn on function interrupts when the card
264 * requests an interrupt.  The PCMCIA standard says that we should set
265 * the lower 4 bits to 0 to route via PCI.  Note: we call this for both
266 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus
267 * cards.
268 */
269static void
270cbb_enable_func_intr(struct cbb_softc *sc)
271{
272	uint8_t reg;
273
274	reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
275	    EXCA_INTR_IRQ_NONE;
276	exca_putb(&sc->exca[0], EXCA_INTR, reg);
277}
278
279int
280cbb_detach(device_t brdev)
281{
282	struct cbb_softc *sc = device_get_softc(brdev);
283	device_t *devlist;
284	int tmp, tries, error, numdevs;
285
286	/*
287	 * Before we delete the children (which we have to do because
288	 * attach doesn't check for children busses correctly), we have
289	 * to detach the children.  Even if we didn't need to delete the
290	 * children, we have to detach them.
291	 */
292	error = bus_generic_detach(brdev);
293	if (error != 0)
294		return (error);
295
296	/*
297	 * Since the attach routine doesn't search for children before it
298	 * attaches them to this device, we must delete them here in order
299	 * for the kldload/unload case to work.  If we failed to do that, then
300	 * we'd get duplicate devices when cbb.ko was reloaded.
301	 */
302	tries = 10;
303	do {
304		error = device_get_children(brdev, &devlist, &numdevs);
305		if (error == 0)
306			break;
307		/*
308		 * Try hard to cope with low memory.
309		 */
310		if (error == ENOMEM) {
311			pause("cbbnomem", 1);
312			continue;
313		}
314	} while (tries-- > 0);
315	for (tmp = 0; tmp < numdevs; tmp++)
316		device_delete_child(brdev, devlist[tmp]);
317	free(devlist, M_TEMP);
318
319	/* Turn off the interrupts */
320	cbb_set(sc, CBB_SOCKET_MASK, 0);
321
322	/* reset 16-bit pcmcia bus */
323	exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET);
324
325	/* turn off power */
326	cbb_power(brdev, CARD_OFF);
327
328	/* Ack the interrupt */
329	cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff);
330
331	/*
332	 * Wait for the thread to die.  kproc_exit will do a wakeup
333	 * on the event thread's struct proc * so that we know it is
334	 * safe to proceed.  IF the thread is running, set the please
335	 * die flag and wait for it to comply.  Since the wakeup on
336	 * the event thread happens only in kproc_exit, we don't
337	 * need to loop here.
338	 */
339	bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
340	mtx_lock(&sc->mtx);
341	sc->flags |= CBB_KTHREAD_DONE;
342	while (sc->flags & CBB_KTHREAD_RUNNING) {
343		DEVPRINTF((sc->dev, "Waiting for thread to die\n"));
344		wakeup(&sc->intrhand);
345		msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0);
346	}
347	mtx_unlock(&sc->mtx);
348
349	bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
350	bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
351	    sc->base_res);
352	mtx_destroy(&sc->mtx);
353	return (0);
354}
355
356int
357cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
358  int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg,
359   void **cookiep)
360{
361	struct cbb_intrhand *ih;
362	struct cbb_softc *sc = device_get_softc(dev);
363	int err;
364
365	if (filt == NULL && intr == NULL)
366		return (EINVAL);
367	ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT);
368	if (ih == NULL)
369		return (ENOMEM);
370	*cookiep = ih;
371	ih->filt = filt;
372	ih->intr = intr;
373	ih->arg = arg;
374	ih->sc = sc;
375	/*
376	 * XXX need to turn on ISA interrupts, if we ever support them, but
377	 * XXX for now that's all we need to do.
378	 */
379	err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags,
380	    filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih,
381	    &ih->cookie);
382	if (err != 0) {
383		free(ih, M_DEVBUF);
384		return (err);
385	}
386	cbb_enable_func_intr(sc);
387	sc->cardok = 1;
388	return 0;
389}
390
391int
392cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
393    void *cookie)
394{
395	struct cbb_intrhand *ih;
396	int err;
397
398	/* XXX Need to do different things for ISA interrupts. */
399	ih = (struct cbb_intrhand *) cookie;
400	err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq,
401	    ih->cookie);
402	if (err != 0)
403		return (err);
404	free(ih, M_DEVBUF);
405	return (0);
406}
407
408
409void
410cbb_driver_added(device_t brdev, driver_t *driver)
411{
412	struct cbb_softc *sc = device_get_softc(brdev);
413	device_t *devlist;
414	device_t dev;
415	int tmp;
416	int numdevs;
417	int wake = 0;
418
419	DEVICE_IDENTIFY(driver, brdev);
420	tmp = device_get_children(brdev, &devlist, &numdevs);
421	if (tmp != 0) {
422		device_printf(brdev, "Cannot get children list, no reprobe\n");
423		return;
424	}
425	for (tmp = 0; tmp < numdevs; tmp++) {
426		dev = devlist[tmp];
427		if (device_get_state(dev) == DS_NOTPRESENT &&
428		    device_probe_and_attach(dev) == 0)
429			wake++;
430	}
431	free(devlist, M_TEMP);
432
433	if (wake > 0)
434		wakeup(&sc->intrhand);
435}
436
437void
438cbb_child_detached(device_t brdev, device_t child)
439{
440	struct cbb_softc *sc = device_get_softc(brdev);
441
442	/* I'm not sure we even need this */
443	if (child != sc->cbdev && child != sc->exca[0].pccarddev)
444		device_printf(brdev, "Unknown child detached: %s\n",
445		    device_get_nameunit(child));
446}
447
448/************************************************************************/
449/* Kthreads								*/
450/************************************************************************/
451
452void
453cbb_event_thread(void *arg)
454{
455	struct cbb_softc *sc = arg;
456	uint32_t status;
457	int err;
458	int not_a_card = 0;
459
460	/*
461	 * We need to act as a power sequencer on startup.  Delay 2s/channel
462	 * to ensure the other channels have had a chance to come up.  We likely
463	 * should add a lock that's shared on a per-slot basis so that only
464	 * one power event can happen per slot at a time.
465	 */
466	pause("cbbstart", hz * device_get_unit(sc->dev) * 2);
467	mtx_lock(&sc->mtx);
468	sc->flags |= CBB_KTHREAD_RUNNING;
469	while ((sc->flags & CBB_KTHREAD_DONE) == 0) {
470		mtx_unlock(&sc->mtx);
471		/*
472		 * We take out Giant here because we need it deep,
473		 * down in the bowels of the vm system for mapping the
474		 * memory we need to read the CIS.  In addition, since
475		 * we are adding/deleting devices from the dev tree,
476		 * and that code isn't MP safe, we have to hold Giant.
477		 */
478		mtx_lock(&Giant);
479		status = cbb_get(sc, CBB_SOCKET_STATE);
480		DPRINTF(("Status is 0x%x\n", status));
481		if (!CBB_CARD_PRESENT(status)) {
482			not_a_card = 0;		/* We know card type */
483			cbb_removal(sc);
484		} else if (status & CBB_STATE_NOT_A_CARD) {
485			/*
486			 * Up to 10 times, try to rescan the card when we see
487			 * NOT_A_CARD.  10 is somehwat arbitrary.  When this
488			 * pathology hits, there's a ~40% chance each try will
489			 * fail.  10 tries takes about 5s and results in a
490			 * 99.99% certainty of the results.
491			 */
492			if (not_a_card++ < 10) {
493				DEVPRINTF((sc->dev,
494				    "Not a card bit set, rescanning\n"));
495				cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST);
496			} else {
497				device_printf(sc->dev,
498				    "Can't determine card type\n");
499			}
500		} else {
501			not_a_card = 0;		/* We know card type */
502			cbb_insert(sc);
503		}
504		mtx_unlock(&Giant);
505
506		/*
507		 * First time through we need to tell mountroot that we're
508		 * done.
509		 */
510		if (sc->sc_root_token) {
511			root_mount_rel(sc->sc_root_token);
512			sc->sc_root_token = NULL;
513		}
514
515		/*
516		 * Wait until it has been 250ms since the last time we
517		 * get an interrupt.  We handle the rest of the interrupt
518		 * at the top of the loop.  Although we clear the bit in the
519		 * ISR, we signal sc->cv from the detach path after we've
520		 * set the CBB_KTHREAD_DONE bit, so we can't do a simple
521		 * 250ms sleep here.
522		 *
523		 * In our ISR, we turn off the card changed interrupt.  Turn
524		 * them back on here before we wait for them to happen.  We
525		 * turn them on/off so that we can tolerate a large latency
526		 * between the time we signal cbb_event_thread and it gets
527		 * a chance to run.
528		 */
529		mtx_lock(&sc->mtx);
530		cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS);
531		msleep(&sc->intrhand, &sc->mtx, 0, "-", 0);
532		err = 0;
533		while (err != EWOULDBLOCK &&
534		    (sc->flags & CBB_KTHREAD_DONE) == 0)
535			err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5);
536	}
537	DEVPRINTF((sc->dev, "Thread terminating\n"));
538	sc->flags &= ~CBB_KTHREAD_RUNNING;
539	mtx_unlock(&sc->mtx);
540	kproc_exit(0);
541}
542
543/************************************************************************/
544/* Insert/removal							*/
545/************************************************************************/
546
547static void
548cbb_insert(struct cbb_softc *sc)
549{
550	uint32_t sockevent, sockstate;
551
552	sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
553	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
554
555	DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
556	    sockevent, sockstate));
557
558	if (sockstate & CBB_STATE_R2_CARD) {
559		if (device_is_attached(sc->exca[0].pccarddev)) {
560			sc->flags |= CBB_16BIT_CARD;
561			exca_insert(&sc->exca[0]);
562		} else {
563			device_printf(sc->dev,
564			    "16-bit card inserted, but no pccard bus.\n");
565		}
566	} else if (sockstate & CBB_STATE_CB_CARD) {
567		if (device_is_attached(sc->cbdev)) {
568			sc->flags &= ~CBB_16BIT_CARD;
569			CARD_ATTACH_CARD(sc->cbdev);
570		} else {
571			device_printf(sc->dev,
572			    "CardBus card inserted, but no cardbus bus.\n");
573		}
574	} else {
575		/*
576		 * We should power the card down, and try again a couple of
577		 * times if this happens. XXX
578		 */
579		device_printf(sc->dev, "Unsupported card type detected\n");
580	}
581}
582
583static void
584cbb_removal(struct cbb_softc *sc)
585{
586	sc->cardok = 0;
587	if (sc->flags & CBB_16BIT_CARD) {
588		exca_removal(&sc->exca[0]);
589	} else {
590		if (device_is_attached(sc->cbdev))
591			CARD_DETACH_CARD(sc->cbdev);
592	}
593	cbb_destroy_res(sc);
594}
595
596/************************************************************************/
597/* Interrupt Handler							*/
598/************************************************************************/
599
600static int
601cbb_func_filt(void *arg)
602{
603	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
604	struct cbb_softc *sc = ih->sc;
605
606	/*
607	 * Make sure that the card is really there.
608	 */
609	if (!sc->cardok)
610		return (FILTER_STRAY);
611	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
612		sc->cardok = 0;
613		return (FILTER_HANDLED);
614	}
615
616	/*
617	 * nb: don't have to check for giant or not, since that's done in the
618	 * ISR dispatch and one can't hold Giant in a filter anyway...
619	 */
620	return ((*ih->filt)(ih->arg));
621}
622
623static void
624cbb_func_intr(void *arg)
625{
626	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
627	struct cbb_softc *sc = ih->sc;
628
629	/*
630	 * While this check may seem redundant, it helps close a race
631	 * condition.  If the card is ejected after the filter runs, but
632	 * before this ISR can be scheduled, then we need to do the same
633	 * filtering to prevent the card's ISR from being called.  One could
634	 * argue that the card's ISR should be able to cope, but experience
635	 * has shown they can't always.  This mitigates the problem by making
636	 * the race quite a bit smaller.  Properly written client ISRs should
637	 * cope with the card going away in the middle of the ISR.  We assume
638	 * that drivers that are sophisticated enough to use filters don't
639	 * need our protection.  This also allows us to ensure they *ARE*
640	 * called if their filter said they needed to be called.
641	 */
642	if (ih->filt == NULL) {
643		if (!sc->cardok)
644			return;
645		if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
646			sc->cardok = 0;
647			return;
648		}
649	}
650
651	/*
652	 * Call the registered ithread interrupt handler.  This entire routine
653	 * will be called with Giant if this isn't an MP safe driver, or not
654	 * if it is.  Either way, we don't have to worry.
655	 */
656	ih->intr(ih->arg);
657}
658
659/************************************************************************/
660/* Generic Power functions						*/
661/************************************************************************/
662
663static uint32_t
664cbb_detect_voltage(device_t brdev)
665{
666	struct cbb_softc *sc = device_get_softc(brdev);
667	uint32_t psr;
668	uint32_t vol = CARD_UKN_CARD;
669
670	psr = cbb_get(sc, CBB_SOCKET_STATE);
671
672	if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK)
673		vol |= CARD_5V_CARD;
674	if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK)
675		vol |= CARD_3V_CARD;
676	if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK)
677		vol |= CARD_XV_CARD;
678	if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK)
679		vol |= CARD_YV_CARD;
680
681	return (vol);
682}
683
684static uint8_t
685cbb_o2micro_power_hack(struct cbb_softc *sc)
686{
687	uint8_t reg;
688
689	/*
690	 * Issue #2: INT# not qualified with IRQ Routing Bit.  An
691	 * unexpected PCI INT# may be generated during PC Card
692	 * initialization even with the IRQ Routing Bit Set with some
693	 * PC Cards.
694	 *
695	 * This is a two part issue.  The first part is that some of
696	 * our older controllers have an issue in which the slot's PCI
697	 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh
698	 * bit 7).  Regardless of the IRQ routing bit, if NO ISA IRQ
699	 * is selected (ExCA register 03h bits 3:0, of the slot, are
700	 * cleared) we will generate INT# if IREQ# is asserted.  The
701	 * second part is because some PC Cards prematurally assert
702	 * IREQ# before the ExCA registers are fully programmed.  This
703	 * in turn asserts INT# because ExCA register 03h bits 3:0
704	 * (ISA IRQ Select) are not yet programmed.
705	 *
706	 * The fix for this issue, which will work for any controller
707	 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b
708	 * (select IRQ1), of the slot, before turning on slot power.
709	 * Selecting IRQ1 will result in INT# NOT being asserted
710	 * (because IRQ1 is selected), and IRQ1 won't be asserted
711	 * because our controllers don't generate IRQ1.
712	 *
713	 * Other, non O2Micro controllers will generate irq 1 in some
714	 * situations, so we can't do this hack for everybody.  Reports of
715	 * keyboard controller's interrupts being suppressed occurred when
716	 * we did this.
717	 */
718	reg = exca_getb(&sc->exca[0], EXCA_INTR);
719	exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1);
720	return (reg);
721}
722
723/*
724 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so
725 * we don't have an interrupt storm on power on.  This has the effect of
726 * disabling card status change interrupts for the duration of poweron.
727 */
728static void
729cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg)
730{
731	exca_putb(&sc->exca[0], EXCA_INTR, reg);
732}
733
734int
735cbb_power(device_t brdev, int volts)
736{
737	uint32_t status, sock_ctrl, reg_ctrl, mask;
738	struct cbb_softc *sc = device_get_softc(brdev);
739	int cnt, sane;
740	int retval = 0;
741	int on = 0;
742	uint8_t reg = 0;
743
744	sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
745
746	sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
747	switch (volts & CARD_VCCMASK) {
748	case 5:
749		sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
750		on++;
751		break;
752	case 3:
753		sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
754		on++;
755		break;
756	case XV:
757		sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV;
758		on++;
759		break;
760	case YV:
761		sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV;
762		on++;
763		break;
764	case 0:
765		break;
766	default:
767		return (0);			/* power NEVER changed */
768	}
769
770	/* VPP == VCC */
771	sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
772	sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
773
774	if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
775		return (1); /* no change necessary */
776	DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts));
777	if (volts != 0 && sc->chipset == CB_O2MICRO)
778		reg = cbb_o2micro_power_hack(sc);
779
780	/*
781	 * We have to mask the card change detect interrupt while we're
782	 * messing with the power.  It is allowed to bounce while we're
783	 * messing with power as things settle down.  In addition, we mask off
784	 * the card's function interrupt by routing it via the ISA bus.  This
785	 * bit generally only affects 16-bit cards.  Some bridges allow one to
786	 * set another bit to have it also affect 32-bit cards.  Since 32-bit
787	 * cards are required to be better behaved, we don't bother to get
788	 * into those bridge specific features.
789	 *
790	 * XXX I wonder if we need to enable the READY bit interrupt in the
791	 * EXCA CSC register for 16-bit cards, and disable the CD bit?
792	 */
793	mask = cbb_get(sc, CBB_SOCKET_MASK);
794	mask |= CBB_SOCKET_MASK_POWER;
795	mask &= ~CBB_SOCKET_MASK_CD;
796	cbb_set(sc, CBB_SOCKET_MASK, mask);
797	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
798	    |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
799	cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
800	if (on) {
801		mtx_lock(&sc->mtx);
802		cnt = sc->powerintr;
803		/*
804		 * We have a shortish timeout of 500ms here.  Some bridges do
805		 * not generate a POWER_CYCLE event for 16-bit cards.  In
806		 * those cases, we have to cope the best we can, and having
807		 * only a short delay is better than the alternatives.  Others
808		 * raise the power cycle a smidge before it is really ready.
809		 * We deal with those below.
810		 */
811		sane = 10;
812		while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) &&
813		    cnt == sc->powerintr && sane-- > 0)
814			msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20);
815		mtx_unlock(&sc->mtx);
816
817		/*
818		 * Relax for 100ms.  Some bridges appear to assert this signal
819		 * right away, but before the card has stabilized.  Other
820		 * cards need need more time to cope up reliabily.
821		 * Experiments with troublesome setups show this to be a
822		 * "cheap" way to enhance reliabilty.  We need not do this for
823		 * "off" since we don't touch the card after we turn it off.
824		 */
825		pause("cbbPwr", min(hz / 10, 1));
826
827		/*
828		 * The TOPIC95B requires a little bit extra time to get its
829		 * act together, so delay for an additional 100ms.  Also as
830		 * documented below, it doesn't seem to set the POWER_CYCLE
831		 * bit, so don't whine if it never came on.
832		 */
833		if (sc->chipset == CB_TOPIC95)
834			pause("cbb95B", hz / 10);
835		else if (sane <= 0)
836			device_printf(sc->dev, "power timeout, doom?\n");
837	}
838
839	/*
840	 * After the power is good, we can turn off the power interrupt.
841	 * However, the PC Card standard says that we must delay turning the
842	 * CD bit back on for a bit to allow for bouncyness on power down
843	 * (recall that we don't wait above for a power down, since we don't
844	 * get an interrupt for that).  We're called either from the suspend
845	 * code in which case we don't want to turn card change on again, or
846	 * we're called from the card insertion code, in which case the cbb
847	 * thread will turn it on for us before it waits to be woken by a
848	 * change event.
849	 *
850	 * NB: Topic95B doesn't set the power cycle bit.  we assume that
851	 * both it and the TOPIC95 behave the same.
852	 */
853	cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER);
854	status = cbb_get(sc, CBB_SOCKET_STATE);
855	if (on && sc->chipset != CB_TOPIC95) {
856		if ((status & CBB_STATE_POWER_CYCLE) == 0)
857			device_printf(sc->dev, "Power not on?\n");
858	}
859	if (status & CBB_STATE_BAD_VCC_REQ) {
860		device_printf(sc->dev, "Bad Vcc requested\n");
861		/*
862		 * Turn off the power, and try again.  Retrigger other
863		 * active interrupts via force register.  From NetBSD
864		 * PR 36652, coded by me to description there.
865		 */
866		sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
867		sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
868		cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
869		status &= ~CBB_STATE_BAD_VCC_REQ;
870		status &= ~CBB_STATE_DATA_LOST;
871		status |= CBB_FORCE_CV_TEST;
872		cbb_set(sc, CBB_SOCKET_FORCE, status);
873		goto done;
874	}
875	if (sc->chipset == CB_TOPIC97) {
876		reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4);
877		reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE;
878		if (on)
879			reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA;
880		else
881			reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA;
882		pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4);
883	}
884	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
885	    & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
886	retval = 1;
887done:;
888	if (volts != 0 && sc->chipset == CB_O2MICRO)
889		cbb_o2micro_power_hack2(sc, reg);
890	return (retval);
891}
892
893static int
894cbb_current_voltage(device_t brdev)
895{
896	struct cbb_softc *sc = device_get_softc(brdev);
897	uint32_t ctrl;
898
899	ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
900	switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) {
901	case CBB_SOCKET_CTRL_VCC_5V:
902		return CARD_5V_CARD;
903	case CBB_SOCKET_CTRL_VCC_3V:
904		return CARD_3V_CARD;
905	case CBB_SOCKET_CTRL_VCC_XV:
906		return CARD_XV_CARD;
907	case CBB_SOCKET_CTRL_VCC_YV:
908		return CARD_YV_CARD;
909	}
910	return 0;
911}
912
913/*
914 * detect the voltage for the card, and set it.  Since the power
915 * used is the square of the voltage, lower voltages is a big win
916 * and what Windows does (and what Microsoft prefers).  The MS paper
917 * also talks about preferring the CIS entry as well, but that has
918 * to be done elsewhere.  We also optimize power sequencing here
919 * and don't change things if we're already powered up at a supported
920 * voltage.
921 *
922 * In addition, we power up with OE disabled.  We'll set it later
923 * in the power up sequence.
924 */
925static int
926cbb_do_power(device_t brdev)
927{
928	struct cbb_softc *sc = device_get_softc(brdev);
929	uint32_t voltage, curpwr;
930	uint32_t status;
931
932	/* Don't enable OE (output enable) until power stable */
933	exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE);
934
935	voltage = cbb_detect_voltage(brdev);
936	curpwr = cbb_current_voltage(brdev);
937	status = cbb_get(sc, CBB_SOCKET_STATE);
938	if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr))
939		return 0;
940	/* Prefer lowest voltage supported */
941	cbb_power(brdev, CARD_OFF);
942	if (voltage & CARD_YV_CARD)
943		cbb_power(brdev, CARD_VCC(YV));
944	else if (voltage & CARD_XV_CARD)
945		cbb_power(brdev, CARD_VCC(XV));
946	else if (voltage & CARD_3V_CARD)
947		cbb_power(brdev, CARD_VCC(3));
948	else if (voltage & CARD_5V_CARD)
949		cbb_power(brdev, CARD_VCC(5));
950	else {
951		device_printf(brdev, "Unknown card voltage\n");
952		return (ENXIO);
953	}
954	return (0);
955}
956
957/************************************************************************/
958/* CardBus power functions						*/
959/************************************************************************/
960
961static int
962cbb_cardbus_reset_power(device_t brdev, device_t child, int on)
963{
964	struct cbb_softc *sc = device_get_softc(brdev);
965	uint32_t b, h;
966	int delay, count, zero_seen, func;
967
968	/*
969	 * Asserting reset for 20ms is necessary for most bridges.  For some
970	 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms.  The
971	 * root cause of this is unknown, and NetBSD does the same thing.
972	 */
973	delay = sc->chipset == CB_RF5C47X ? 400 : 20;
974	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
975	pause("cbbP3", hz * delay / 1000);
976
977	/*
978	 * If a card exists and we're turning it on, take it out of reset.
979	 * After clearing reset, wait up to 1.1s for the first configuration
980	 * register (vendor/product) configuration register of device 0.0 to
981	 * become != 0xffffffff.  The PCMCIA PC Card Host System Specification
982	 * says that when powering up the card, the PCI Spec v2.1 must be
983	 * followed.  In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first
984	 * Config Access) is at most 2^25 clocks, or just over 1s.  Section
985	 * 2.2.1 states any card not ready to participate in bus transactions
986	 * must tristate its outputs.  Therefore, any access to its
987	 * configuration registers must be ignored.  In that state, the config
988	 * reg will read 0xffffffff.  Section 6.2.1 states a vendor id of
989	 * 0xffff is invalid, so this can never match a real card.  Print a
990	 * warning if it never returns a real id.  The PCMCIA PC Card
991	 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on
992	 * a cardbus bus, so that's the only register we check here.
993	 */
994	if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
995		PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
996		    &~CBBM_BRIDGECTRL_RESET, 2);
997		b = pcib_get_bus(child);
998		count = 1100 / 20;
999		do {
1000			pause("cbbP4", hz * 2 / 100);
1001		} while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) ==
1002		    0xfffffffful && --count >= 0);
1003		if (count < 0)
1004			device_printf(brdev, "Warning: Bus reset timeout\n");
1005
1006		/*
1007		 * Some cards (so far just an atheros card I have) seem to
1008		 * come out of reset in a funky state. They report they are
1009		 * multi-function cards, but have nonsense for some of the
1010		 * higher functions.  So if the card claims to be MFDEV, and
1011		 * any of the higher functions' ID is 0, then we've hit the
1012		 * bug and we'll try again.
1013		 */
1014		h = PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_HDRTYPE, 1);
1015		if ((h & PCIM_MFDEV) == 0)
1016			return 0;
1017		zero_seen = 0;
1018		for (func = 1; func < 8; func++) {
1019			h = PCIB_READ_CONFIG(brdev, b, 0, func,
1020			    PCIR_DEVVENDOR, 4);
1021			if (h == 0)
1022				zero_seen++;
1023		}
1024		if (!zero_seen)
1025			return 0;
1026		return (EINVAL);
1027	}
1028	return 0;
1029}
1030
1031static int
1032cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1033{
1034	cbb_power(brdev, CARD_OFF);
1035	cbb_cardbus_reset_power(brdev, child, 0);
1036	return (0);
1037}
1038
1039static int
1040cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1041{
1042	struct cbb_softc *sc = device_get_softc(brdev);
1043	int err, count;
1044
1045	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE)))
1046		return (ENODEV);
1047
1048	count = 10;
1049	do {
1050		err = cbb_do_power(brdev);
1051		if (err)
1052			return (err);
1053		err = cbb_cardbus_reset_power(brdev, child, 1);
1054		if (err) {
1055			device_printf(brdev, "Reset failed, trying again.\n");
1056			cbb_cardbus_power_disable_socket(brdev, child);
1057			pause("cbbErr1", hz / 10); /* wait 100ms */
1058		}
1059	} while (err != 0 && count-- > 0);
1060	return (0);
1061}
1062
1063/************************************************************************/
1064/* CardBus Resource							*/
1065/************************************************************************/
1066
1067static void
1068cbb_activate_window(device_t brdev, int type)
1069{
1070
1071	PCI_ENABLE_IO(device_get_parent(brdev), brdev, type);
1072}
1073
1074static int
1075cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1076{
1077	int basereg;
1078	int limitreg;
1079
1080	if ((win < 0) || (win > 1)) {
1081		DEVPRINTF((brdev,
1082		    "cbb_cardbus_io_open: window out of range %d\n", win));
1083		return (EINVAL);
1084	}
1085
1086	basereg = win * 8 + CBBR_IOBASE0;
1087	limitreg = win * 8 + CBBR_IOLIMIT0;
1088
1089	pci_write_config(brdev, basereg, start, 4);
1090	pci_write_config(brdev, limitreg, end, 4);
1091	cbb_activate_window(brdev, SYS_RES_IOPORT);
1092	return (0);
1093}
1094
1095static int
1096cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1097{
1098	int basereg;
1099	int limitreg;
1100
1101	if ((win < 0) || (win > 1)) {
1102		DEVPRINTF((brdev,
1103		    "cbb_cardbus_mem_open: window out of range %d\n", win));
1104		return (EINVAL);
1105	}
1106
1107	basereg = win * 8 + CBBR_MEMBASE0;
1108	limitreg = win * 8 + CBBR_MEMLIMIT0;
1109
1110	pci_write_config(brdev, basereg, start, 4);
1111	pci_write_config(brdev, limitreg, end, 4);
1112	cbb_activate_window(brdev, SYS_RES_MEMORY);
1113	return (0);
1114}
1115
1116#define START_NONE 0xffffffff
1117#define END_NONE 0
1118
1119static void
1120cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1121{
1122	uint32_t starts[2];
1123	uint32_t ends[2];
1124	struct cbb_reslist *rle;
1125	int align, i;
1126	uint32_t reg;
1127
1128	starts[0] = starts[1] = START_NONE;
1129	ends[0] = ends[1] = END_NONE;
1130
1131	if (type == SYS_RES_MEMORY)
1132		align = CBB_MEMALIGN;
1133	else if (type == SYS_RES_IOPORT)
1134		align = CBB_IOALIGN;
1135	else
1136		align = 1;
1137
1138	SLIST_FOREACH(rle, &sc->rl, link) {
1139		if (rle->type != type)
1140			continue;
1141		if (rle->res == NULL)
1142			continue;
1143		if (!(rman_get_flags(rle->res) & RF_ACTIVE))
1144			continue;
1145		if (rman_get_flags(rle->res) & RF_PREFETCHABLE)
1146			i = 1;
1147		else
1148			i = 0;
1149		if (rman_get_start(rle->res) < starts[i])
1150			starts[i] = rman_get_start(rle->res);
1151		if (rman_get_end(rle->res) > ends[i])
1152			ends[i] = rman_get_end(rle->res);
1153	}
1154	for (i = 0; i < 2; i++) {
1155		if (starts[i] == START_NONE)
1156			continue;
1157		starts[i] &= ~(align - 1);
1158		ends[i] = roundup2(ends[i], align) - 1;
1159	}
1160	if (starts[0] != START_NONE && starts[1] != START_NONE) {
1161		if (starts[0] < starts[1]) {
1162			if (ends[0] > starts[1]) {
1163				device_printf(sc->dev, "Overlapping ranges"
1164				    " for prefetch and non-prefetch memory\n");
1165				return;
1166			}
1167		} else {
1168			if (ends[1] > starts[0]) {
1169				device_printf(sc->dev, "Overlapping ranges"
1170				    " for prefetch and non-prefetch memory\n");
1171				return;
1172			}
1173		}
1174	}
1175
1176	if (type == SYS_RES_MEMORY) {
1177		cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1178		cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1179		reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1180		reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 |
1181		    CBBM_BRIDGECTRL_PREFETCH_1);
1182		if (starts[1] != START_NONE)
1183			reg |= CBBM_BRIDGECTRL_PREFETCH_1;
1184		pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1185		if (bootverbose) {
1186			device_printf(sc->dev, "Opening memory:\n");
1187			if (starts[0] != START_NONE)
1188				device_printf(sc->dev, "Normal: %#x-%#x\n",
1189				    starts[0], ends[0]);
1190			if (starts[1] != START_NONE)
1191				device_printf(sc->dev, "Prefetch: %#x-%#x\n",
1192				    starts[1], ends[1]);
1193		}
1194	} else if (type == SYS_RES_IOPORT) {
1195		cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1196		cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1197		if (bootverbose && starts[0] != START_NONE)
1198			device_printf(sc->dev, "Opening I/O: %#x-%#x\n",
1199			    starts[0], ends[0]);
1200	}
1201}
1202
1203static int
1204cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1205    int rid, struct resource *res)
1206{
1207	int ret;
1208
1209	ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1210	    type, rid, res);
1211	if (ret != 0)
1212		return (ret);
1213	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1214	return (0);
1215}
1216
1217static int
1218cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1219    int rid, struct resource *res)
1220{
1221	int ret;
1222
1223	ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1224	    type, rid, res);
1225	if (ret != 0)
1226		return (ret);
1227	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1228	return (0);
1229}
1230
1231static struct resource *
1232cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1233    int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1234{
1235	struct cbb_softc *sc = device_get_softc(brdev);
1236	int tmp;
1237	struct resource *res;
1238	rman_res_t align;
1239
1240	switch (type) {
1241	case SYS_RES_IRQ:
1242		tmp = rman_get_start(sc->irq_res);
1243		if (start > tmp || end < tmp || count != 1) {
1244			device_printf(child, "requested interrupt %jd-%jd,"
1245			    "count = %jd not supported by cbb\n",
1246			    start, end, count);
1247			return (NULL);
1248		}
1249		start = end = tmp;
1250		flags |= RF_SHAREABLE;
1251		break;
1252	case SYS_RES_IOPORT:
1253		if (start <= cbb_start_32_io)
1254			start = cbb_start_32_io;
1255		if (end < start)
1256			end = start;
1257		if (count > (1 << RF_ALIGNMENT(flags)))
1258			flags = (flags & ~RF_ALIGNMENT_MASK) |
1259			    rman_make_alignment_flags(count);
1260		break;
1261	case SYS_RES_MEMORY:
1262		if (start <= cbb_start_mem)
1263			start = cbb_start_mem;
1264		if (end < start)
1265			end = start;
1266		if (count < CBB_MEMALIGN)
1267			align = CBB_MEMALIGN;
1268		else
1269			align = count;
1270		if (align > (1 << RF_ALIGNMENT(flags)))
1271			flags = (flags & ~RF_ALIGNMENT_MASK) |
1272			    rman_make_alignment_flags(align);
1273		break;
1274	}
1275	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1276	    start, end, count, flags & ~RF_ACTIVE);
1277	if (res == NULL) {
1278		printf("cbb alloc res fail type %d rid %x\n", type, *rid);
1279		return (NULL);
1280	}
1281	cbb_insert_res(sc, res, type, *rid);
1282	if (flags & RF_ACTIVE)
1283		if (bus_activate_resource(child, type, *rid, res) != 0) {
1284			bus_release_resource(child, type, *rid, res);
1285			return (NULL);
1286		}
1287
1288	return (res);
1289}
1290
1291static int
1292cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1293    int rid, struct resource *res)
1294{
1295	struct cbb_softc *sc = device_get_softc(brdev);
1296	int error;
1297
1298	if (rman_get_flags(res) & RF_ACTIVE) {
1299		error = bus_deactivate_resource(child, type, rid, res);
1300		if (error != 0)
1301			return (error);
1302	}
1303	cbb_remove_res(sc, res);
1304	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1305	    type, rid, res));
1306}
1307
1308/************************************************************************/
1309/* PC Card Power Functions						*/
1310/************************************************************************/
1311
1312static int
1313cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1314{
1315	struct cbb_softc *sc = device_get_softc(brdev);
1316	int err;
1317
1318	DPRINTF(("cbb_pcic_socket_enable:\n"));
1319
1320	/* power down/up the socket to reset */
1321	err = cbb_do_power(brdev);
1322	if (err)
1323		return (err);
1324	exca_reset(&sc->exca[0], child);
1325
1326	return (0);
1327}
1328
1329static int
1330cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1331{
1332	struct cbb_softc *sc = device_get_softc(brdev);
1333
1334	DPRINTF(("cbb_pcic_socket_disable\n"));
1335
1336	/* Turn off the card's interrupt and leave it in reset, wait 10ms */
1337	exca_putb(&sc->exca[0], EXCA_INTR, 0);
1338	pause("cbbP1", hz / 100);
1339
1340	/* power down the socket */
1341	cbb_power(brdev, CARD_OFF);
1342	exca_putb(&sc->exca[0], EXCA_PWRCTL, 0);
1343
1344	/* wait 300ms until power fails (Tpf). */
1345	pause("cbbP2", hz * 300 / 1000);
1346
1347	/* enable CSC interrupts */
1348	exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE);
1349	return (0);
1350}
1351
1352/************************************************************************/
1353/* POWER methods							*/
1354/************************************************************************/
1355
1356int
1357cbb_power_enable_socket(device_t brdev, device_t child)
1358{
1359	struct cbb_softc *sc = device_get_softc(brdev);
1360
1361	if (sc->flags & CBB_16BIT_CARD)
1362		return (cbb_pcic_power_enable_socket(brdev, child));
1363	return (cbb_cardbus_power_enable_socket(brdev, child));
1364}
1365
1366int
1367cbb_power_disable_socket(device_t brdev, device_t child)
1368{
1369	struct cbb_softc *sc = device_get_softc(brdev);
1370	if (sc->flags & CBB_16BIT_CARD)
1371		return (cbb_pcic_power_disable_socket(brdev, child));
1372	return (cbb_cardbus_power_disable_socket(brdev, child));
1373}
1374
1375static int
1376cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1377    struct resource *res)
1378{
1379	struct cbb_softc *sc = device_get_softc(brdev);
1380	int error;
1381
1382	error = exca_activate_resource(&sc->exca[0], child, type, rid, res);
1383	if (error == 0)
1384		cbb_activate_window(brdev, type);
1385	return (error);
1386}
1387
1388static int
1389cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1390    int rid, struct resource *res)
1391{
1392	struct cbb_softc *sc = device_get_softc(brdev);
1393	return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res));
1394}
1395
1396static struct resource *
1397cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1398    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1399{
1400	struct resource *res = NULL;
1401	struct cbb_softc *sc = device_get_softc(brdev);
1402	int align;
1403	int tmp;
1404
1405	switch (type) {
1406	case SYS_RES_MEMORY:
1407		if (start < cbb_start_mem)
1408			start = cbb_start_mem;
1409		if (end < start)
1410			end = start;
1411		if (count < CBB_MEMALIGN)
1412			align = CBB_MEMALIGN;
1413		else
1414			align = count;
1415		if (align > (1 << RF_ALIGNMENT(flags)))
1416			flags = (flags & ~RF_ALIGNMENT_MASK) |
1417			    rman_make_alignment_flags(align);
1418		break;
1419	case SYS_RES_IOPORT:
1420		if (start < cbb_start_16_io)
1421			start = cbb_start_16_io;
1422		if (end < start)
1423			end = start;
1424		break;
1425	case SYS_RES_IRQ:
1426		tmp = rman_get_start(sc->irq_res);
1427		if (start > tmp || end < tmp || count != 1) {
1428			device_printf(child, "requested interrupt %jd-%jd,"
1429			    "count = %jd not supported by cbb\n",
1430			    start, end, count);
1431			return (NULL);
1432		}
1433		flags |= RF_SHAREABLE;
1434		start = end = rman_get_start(sc->irq_res);
1435		break;
1436	}
1437	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1438	    start, end, count, flags & ~RF_ACTIVE);
1439	if (res == NULL)
1440		return (NULL);
1441	cbb_insert_res(sc, res, type, *rid);
1442	if (flags & RF_ACTIVE) {
1443		if (bus_activate_resource(child, type, *rid, res) != 0) {
1444			bus_release_resource(child, type, *rid, res);
1445			return (NULL);
1446		}
1447	}
1448
1449	return (res);
1450}
1451
1452static int
1453cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1454    int rid, struct resource *res)
1455{
1456	struct cbb_softc *sc = device_get_softc(brdev);
1457	int error;
1458
1459	if (rman_get_flags(res) & RF_ACTIVE) {
1460		error = bus_deactivate_resource(child, type, rid, res);
1461		if (error != 0)
1462			return (error);
1463	}
1464	cbb_remove_res(sc, res);
1465	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1466	    type, rid, res));
1467}
1468
1469/************************************************************************/
1470/* PC Card methods							*/
1471/************************************************************************/
1472
1473int
1474cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1475    u_long flags)
1476{
1477	struct cbb_softc *sc = device_get_softc(brdev);
1478	struct resource *res;
1479
1480	if (type != SYS_RES_MEMORY)
1481		return (EINVAL);
1482	res = cbb_find_res(sc, type, rid);
1483	if (res == NULL) {
1484		device_printf(brdev,
1485		    "set_res_flags: specified rid not found\n");
1486		return (ENOENT);
1487	}
1488	return (exca_mem_set_flags(&sc->exca[0], res, flags));
1489}
1490
1491int
1492cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1493    uint32_t cardaddr, uint32_t *deltap)
1494{
1495	struct cbb_softc *sc = device_get_softc(brdev);
1496	struct resource *res;
1497
1498	res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1499	if (res == NULL) {
1500		device_printf(brdev,
1501		    "set_memory_offset: specified rid not found\n");
1502		return (ENOENT);
1503	}
1504	return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap));
1505}
1506
1507/************************************************************************/
1508/* BUS Methods								*/
1509/************************************************************************/
1510
1511
1512int
1513cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1514    struct resource *r)
1515{
1516	struct cbb_softc *sc = device_get_softc(brdev);
1517
1518	if (sc->flags & CBB_16BIT_CARD)
1519		return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1520	else
1521		return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1522		    r));
1523}
1524
1525int
1526cbb_deactivate_resource(device_t brdev, device_t child, int type,
1527    int rid, struct resource *r)
1528{
1529	struct cbb_softc *sc = device_get_softc(brdev);
1530
1531	if (sc->flags & CBB_16BIT_CARD)
1532		return (cbb_pcic_deactivate_resource(brdev, child, type,
1533		    rid, r));
1534	else
1535		return (cbb_cardbus_deactivate_resource(brdev, child, type,
1536		    rid, r));
1537}
1538
1539struct resource *
1540cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1541    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1542{
1543	struct cbb_softc *sc = device_get_softc(brdev);
1544
1545	if (sc->flags & CBB_16BIT_CARD)
1546		return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1547		    start, end, count, flags));
1548	else
1549		return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1550		    start, end, count, flags));
1551}
1552
1553int
1554cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1555    struct resource *r)
1556{
1557	struct cbb_softc *sc = device_get_softc(brdev);
1558
1559	if (sc->flags & CBB_16BIT_CARD)
1560		return (cbb_pcic_release_resource(brdev, child, type,
1561		    rid, r));
1562	else
1563		return (cbb_cardbus_release_resource(brdev, child, type,
1564		    rid, r));
1565}
1566
1567int
1568cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1569{
1570	struct cbb_softc *sc = device_get_softc(brdev);
1571
1572	switch (which) {
1573	case PCIB_IVAR_DOMAIN:
1574		*result = sc->domain;
1575		return (0);
1576	case PCIB_IVAR_BUS:
1577		*result = sc->bus.sec;
1578		return (0);
1579	}
1580	return (ENOENT);
1581}
1582
1583int
1584cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1585{
1586
1587	switch (which) {
1588	case PCIB_IVAR_DOMAIN:
1589		return (EINVAL);
1590	case PCIB_IVAR_BUS:
1591		return (EINVAL);
1592	}
1593	return (ENOENT);
1594}
1595
1596int
1597cbb_child_present(device_t parent, device_t child)
1598{
1599	struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent);
1600	uint32_t sockstate;
1601
1602	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1603	return (CBB_CARD_PRESENT(sockstate) && sc->cardok);
1604}
1605