ofw_pcibus.c revision 331722
1/*-
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
5 * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice unmodified, this list of conditions, and the following
13 *    disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: stable/11/sys/powerpc/ofw/ofw_pcibus.c 331722 2018-03-29 02:50:57Z eadler $");
32
33#include <sys/param.h>
34#include <sys/bus.h>
35#include <sys/kernel.h>
36#include <sys/libkern.h>
37#include <sys/module.h>
38#include <sys/pciio.h>
39
40#include <dev/ofw/ofw_bus.h>
41#include <dev/ofw/ofw_bus_subr.h>
42#include <dev/ofw/ofw_pci.h>
43#include <dev/ofw/openfirm.h>
44
45#include <machine/bus.h>
46#include <machine/intr_machdep.h>
47#include <machine/resource.h>
48
49#include <dev/pci/pcireg.h>
50#include <dev/pci/pcivar.h>
51#include <dev/pci/pci_private.h>
52
53#include "ofw_pcibus.h"
54#include "pcib_if.h"
55#include "pci_if.h"
56
57typedef uint32_t ofw_pci_intr_t;
58
59/* Methods */
60static device_probe_t ofw_pcibus_probe;
61static device_attach_t ofw_pcibus_attach;
62static pci_alloc_devinfo_t ofw_pcibus_alloc_devinfo;
63static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
64static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
65static bus_child_deleted_t ofw_pcibus_child_deleted;
66static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child,
67    char *buf, size_t buflen);
68
69static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
70static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
71
72static device_method_t ofw_pcibus_methods[] = {
73	/* Device interface */
74	DEVMETHOD(device_probe,		ofw_pcibus_probe),
75	DEVMETHOD(device_attach,	ofw_pcibus_attach),
76
77	/* Bus interface */
78	DEVMETHOD(bus_child_deleted,	ofw_pcibus_child_deleted),
79	DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method),
80	DEVMETHOD(bus_rescan,		bus_null_rescan),
81
82	/* PCI interface */
83	DEVMETHOD(pci_alloc_devinfo,	ofw_pcibus_alloc_devinfo),
84	DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
85
86	/* ofw_bus interface */
87	DEVMETHOD(ofw_bus_get_devinfo,	ofw_pcibus_get_devinfo),
88	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
89	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
90	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
91	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
92	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
93
94	DEVMETHOD_END
95};
96
97static devclass_t pci_devclass;
98
99DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods,
100    sizeof(struct pci_softc), pci_driver);
101DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0);
102MODULE_VERSION(ofw_pcibus, 1);
103MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
104
105static int ofw_devices_only = 0;
106TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only);
107
108static int
109ofw_pcibus_probe(device_t dev)
110{
111
112	if (ofw_bus_get_node(dev) == -1)
113		return (ENXIO);
114	device_set_desc(dev, "OFW PCI bus");
115
116	return (BUS_PROBE_DEFAULT);
117}
118
119static int
120ofw_pcibus_attach(device_t dev)
121{
122	u_int busno, domain;
123	int error;
124
125	error = pci_attach_common(dev);
126	if (error)
127		return (error);
128	domain = pcib_get_domain(dev);
129	busno = pcib_get_bus(dev);
130
131	/*
132	 * Attach those children represented in the device tree.
133	 */
134
135	ofw_pcibus_enum_devtree(dev, domain, busno);
136
137	/*
138	 * We now attach any laggard devices. FDT, for instance, allows
139	 * the device tree to enumerate only some PCI devices. Apple's
140	 * OF device tree on some Grackle-based hardware can also miss
141	 * functions on multi-function cards.
142	 */
143
144	if (!ofw_devices_only)
145		ofw_pcibus_enum_bus(dev, domain, busno);
146
147	return (bus_generic_attach(dev));
148}
149
150struct pci_devinfo *
151ofw_pcibus_alloc_devinfo(device_t dev)
152{
153	struct ofw_pcibus_devinfo *dinfo;
154
155	dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
156	return (&dinfo->opd_dinfo);
157}
158
159static void
160ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
161{
162	device_t pcib;
163	struct ofw_pci_register pcir;
164	struct ofw_pcibus_devinfo *dinfo;
165	phandle_t node, child;
166	u_int func, slot;
167	int intline;
168
169	pcib = device_get_parent(dev);
170	node = ofw_bus_get_node(dev);
171
172	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
173		if (OF_getencprop(child, "reg", (pcell_t *)&pcir,
174		    sizeof(pcir)) == -1)
175			continue;
176		slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
177		func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
178
179		/* Some OFW device trees contain dupes. */
180		if (pci_find_dbsf(domain, busno, slot, func) != NULL)
181			continue;
182
183		/*
184		 * The preset in the intline register is usually bogus.  Reset
185		 * it such that the PCI code will reroute the interrupt if
186		 * needed.
187		 */
188
189		intline = PCI_INVALID_IRQ;
190		if (OF_getproplen(child, "interrupts") > 0)
191			intline = 0;
192		PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
193		    intline, 1);
194
195		/*
196		 * Now set up the PCI and OFW bus layer devinfo and add it
197		 * to the PCI bus.
198		 */
199
200		dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, dev,
201		    domain, busno, slot, func);
202		if (dinfo == NULL)
203			continue;
204		if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
205		    0) {
206			pci_freecfg((struct pci_devinfo *)dinfo);
207			continue;
208		}
209		dinfo->opd_dma_tag = NULL;
210		pci_add_child(dev, (struct pci_devinfo *)dinfo);
211
212		/*
213		 * Some devices don't have an intpin set, but do have
214		 * interrupts. These are fully specified, and set in the
215		 * interrupts property, so add that value to the device's
216		 * resource list.
217		 */
218		if (dinfo->opd_dinfo.cfg.intpin == 0)
219			ofw_bus_intr_to_rl(dev, child,
220				&dinfo->opd_dinfo.resources, NULL);
221	}
222}
223
224/*
225 * The following is an almost exact clone of pci_add_children(), with the
226 * addition that it (a) will not add children that have already been added,
227 * and (b) will set up the OFW devinfo to point to invalid values. This is
228 * to handle non-enumerated PCI children as exist in FDT and on the second
229 * function of the Rage 128 in my Blue & White G3.
230 */
231
232static void
233ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
234{
235	device_t pcib;
236	struct ofw_pcibus_devinfo *dinfo;
237	int maxslots;
238	int s, f, pcifunchigh;
239	uint8_t hdrtype;
240
241	pcib = device_get_parent(dev);
242
243	maxslots = PCIB_MAXSLOTS(pcib);
244	for (s = 0; s <= maxslots; s++) {
245		pcifunchigh = 0;
246		f = 0;
247		DELAY(1);
248		hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
249		if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
250			continue;
251		if (hdrtype & PCIM_MFDEV)
252			pcifunchigh = PCI_FUNCMAX;
253		for (f = 0; f <= pcifunchigh; f++) {
254			/* Filter devices we have already added */
255			if (pci_find_dbsf(domain, busno, s, f) != NULL)
256				continue;
257
258			dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
259			    pcib, dev, domain, busno, s, f);
260			if (dinfo == NULL)
261				continue;
262
263			dinfo->opd_dma_tag = NULL;
264			dinfo->opd_obdinfo.obd_node = -1;
265
266			dinfo->opd_obdinfo.obd_name = NULL;
267			dinfo->opd_obdinfo.obd_compat = NULL;
268			dinfo->opd_obdinfo.obd_type = NULL;
269			dinfo->opd_obdinfo.obd_model = NULL;
270
271			/*
272			 * For non OFW-devices, don't believe 0
273			 * for an interrupt.
274			 */
275			if (dinfo->opd_dinfo.cfg.intline == 0) {
276				dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
277				PCIB_WRITE_CONFIG(pcib, busno, s, f,
278				    PCIR_INTLINE, PCI_INVALID_IRQ, 1);
279			}
280
281			pci_add_child(dev, (struct pci_devinfo *)dinfo);
282		}
283	}
284}
285
286static void
287ofw_pcibus_child_deleted(device_t dev, device_t child)
288{
289	struct ofw_pcibus_devinfo *dinfo;
290
291	dinfo = device_get_ivars(dev);
292	ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
293	pci_child_deleted(dev, child);
294}
295
296static int
297ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
298    size_t buflen)
299{
300	pci_child_pnpinfo_str_method(cbdev, child, buf, buflen);
301
302	if (ofw_bus_get_node(child) != -1)  {
303		strlcat(buf, " ", buflen); /* Separate info */
304		ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen);
305	}
306
307	return (0);
308}
309
310static int
311ofw_pcibus_assign_interrupt(device_t dev, device_t child)
312{
313	ofw_pci_intr_t intr[2];
314	phandle_t node, iparent;
315	int isz, icells;
316
317	node = ofw_bus_get_node(child);
318
319	if (node == -1) {
320		/* Non-firmware enumerated child, use standard routing */
321
322		intr[0] = pci_get_intpin(child);
323		return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
324		    intr[0]));
325	}
326
327	/*
328	 * Try to determine the node's interrupt parent so we know which
329	 * PIC to use.
330	 */
331
332	iparent = -1;
333	if (OF_getencprop(node, "interrupt-parent", &iparent,
334	    sizeof(iparent)) < 0)
335		iparent = -1;
336	icells = 1;
337	if (iparent != -1)
338		OF_getencprop(OF_node_from_xref(iparent), "#interrupt-cells",
339		    &icells, sizeof(icells));
340
341	/*
342	 * Any AAPL,interrupts property gets priority and is
343	 * fully specified (i.e. does not need routing)
344	 */
345
346	isz = OF_getencprop(node, "AAPL,interrupts", intr, sizeof(intr));
347	if (isz == sizeof(intr[0])*icells)
348		return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev,
349		    iparent, icells, intr));
350
351	isz = OF_getencprop(node, "interrupts", intr, sizeof(intr));
352	if (isz == sizeof(intr[0])*icells) {
353		if (iparent != -1)
354			intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr);
355	} else {
356		/* No property: our best guess is the intpin. */
357		intr[0] = pci_get_intpin(child);
358	}
359
360	/*
361	 * If we got intr from a property, it may or may not be an intpin.
362	 * For on-board devices, it frequently is not, and is completely out
363	 * of the valid intpin range.  For PCI slots, it hopefully is,
364	 * otherwise we will have trouble interfacing with non-OFW buses
365	 * such as cardbus.
366	 * Since we cannot tell which it is without violating layering, we
367	 * will always use the route_interrupt method, and treat exceptions
368	 * on the level they become apparent.
369	 */
370	return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0]));
371}
372
373static const struct ofw_bus_devinfo *
374ofw_pcibus_get_devinfo(device_t bus, device_t dev)
375{
376	struct ofw_pcibus_devinfo *dinfo;
377
378	dinfo = device_get_ivars(dev);
379	return (&dinfo->opd_obdinfo);
380}
381
382