at91_rtcreg.h revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28/* $FreeBSD: stable/11/sys/arm/at91/at91_rtcreg.h 330897 2018-03-14 03:19:51Z eadler $ */ 29 30#ifndef ARM_AT91_AT91_RTCREG_H 31#define ARM_AT91_AT91_RTCREG_H 32 33/* Registers */ 34#define RTC_CR 0x00 /* RTC Control Register */ 35#define RTC_MR 0x04 /* RTC Mode Register */ 36#define RTC_TIMR 0x08 /* RTC Time Register */ 37#define RTC_CALR 0x0c /* RTC Calendar Register */ 38#define RTC_TIMALR 0x10 /* RTC Time Alarm Register */ 39#define RTC_CALALR 0x14 /* RTC Calendar Alarm Register */ 40#define RTC_SR 0x18 /* RTC Status Register */ 41#define RTC_SCCR 0x1c /* RTC Status Command Clear Register */ 42#define RTC_IER 0x20 /* RTC Interrupt Enable Register */ 43#define RTC_IDR 0x24 /* RTC Interrupt Disable Register */ 44#define RTC_IMR 0x28 /* RTC Interrupt Mask Register */ 45#define RTC_VER 0x2c /* RTC Valid Entry Register */ 46 47/* CR */ 48#define RTC_CR_UPDTIM (0x1u << 0) /* Request update of time register */ 49#define RTC_CR_UPDCAL (0x1u << 1) /* Request update of calendar reg. */ 50 51/* TIMR */ 52#define RTC_TIMR_SEC_M 0x7fUL 53#define RTC_TIMR_SEC_S 0 54#define RTC_TIMR_SEC(x) FROMBCD(((x) & RTC_TIMR_SEC_M) >> RTC_TIMR_SEC_S) 55#define RTC_TIMR_MIN_M 0x7f00UL 56#define RTC_TIMR_MIN_S 8 57#define RTC_TIMR_MIN(x) FROMBCD(((x) & RTC_TIMR_MIN_M) >> RTC_TIMR_MIN_S) 58#define RTC_TIMR_HR_M 0x3f0000UL 59#define RTC_TIMR_HR_S 16 60#define RTC_TIMR_HR(x) FROMBCD(((x) & RTC_TIMR_HR_M) >> RTC_TIMR_HR_S) 61#define RTC_TIMR_MK(hr, min, sec) \ 62 ((TOBCD(hr) << RTC_TIMR_HR_S) | \ 63 (TOBCD(min) << RTC_TIMR_MIN_S) | \ 64 (TOBCD(sec) << RTC_TIMR_SEC_S)) 65#define RTC_TIMR_PM (1UL << 22) 66 67/* CALR */ 68#define RTC_CALR_CEN_M 0x0000007fUL 69#define RTC_CALR_CEN_S 0 70#define RTC_CALR_CEN(x) FROMBCD(((x) & RTC_CALR_CEN_M) >> RTC_CALR_CEN_S) 71#define RTC_CALR_YEAR_M 0x0000ff00UL 72#define RTC_CALR_YEAR_S 8 73#define RTC_CALR_YEAR(x) FROMBCD(((x) & RTC_CALR_YEAR_M) >> RTC_CALR_YEAR_S) 74#define RTC_CALR_MON_M 0x001f0000UL 75#define RTC_CALR_MON_S 16 76#define RTC_CALR_MON(x) FROMBCD(((x) & RTC_CALR_MON_M) >> RTC_CALR_MON_S) 77#define RTC_CALR_DOW_M 0x00d0000UL 78#define RTC_CALR_DOW_S 21 79#define RTC_CALR_DOW(x) FROMBCD(((x) & RTC_CALR_DOW_M) >> RTC_CALR_DOW_S) 80#define RTC_CALR_DAY_M 0x3f000000UL 81#define RTC_CALR_DAY_S 24 82#define RTC_CALR_DAY(x) FROMBCD(((x) & RTC_CALR_DAY_M) >> RTC_CALR_DAY_S) 83#define RTC_CALR_MK(yr, mon, day, dow) \ 84 ((TOBCD((yr) / 100) << RTC_CALR_CEN_S) | \ 85 (TOBCD((yr) % 100) << RTC_CALR_YEAR_S) | \ 86 (TOBCD(mon) << RTC_CALR_MON_S) | \ 87 (TOBCD(dow) << RTC_CALR_DOW_S) | \ 88 (TOBCD(day) << RTC_CALR_DAY_S)) 89 90/* SR */ 91 92#define RTC_SR_ACKUPD (0x1u << 0) /* Acknowledge for Update */ 93#define RTC_SR_ALARM (0x1u << 1) /* Alarm Flag */ 94#define RTC_SR_SECEV (0x1u << 2) /* Second Event */ 95#define RTC_SR_TIMEV (0x1u << 3) /* Time Event */ 96#define RTC_SR_CALEV (0x1u << 4) /* Calendar event */ 97 98/* VER */ 99 100#define RTC_VER_NVTIM (0x1 << 0) /* Non-valid time */ 101#define RTC_VER_NVCAL (0x1 << 1) /* Non-valid calendar */ 102#define RTC_VER_NVTIMALR (0x1 << 2) /* Non-valid time alarm */ 103#define RTC_VER_NVCALALR (0x1 << 3) /* Non-valid calendar alarm */ 104 105#endif /* ARM_AT91_AT91_RTCREG_H */ 106