vxge_log.h revision 331722
1/*- 2 * Copyright(c) 2002-2011 Exar Corp. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification are permitted provided the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Exar Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31/*$FreeBSD: stable/11/tools/tools/vxge/vxge_log.h 331722 2018-03-29 02:50:57Z eadler $*/ 32 33#ifndef _VXGE_LOG_H_ 34#define _VXGE_LOG_H_ 35 36#include "vxge_cmn.h" 37 38#define VXGE_STR_MAX_LEN_REGS 40 39#define VXGE_STR_MAX_LEN_STATS 32 40#define VXGE_STR_MAX_LEN_PCICONF 20 41#define VXGE_STR_MAX_LEN_DEVCONF 32 42 43#define VXGE_FORMAT_STATS "%s%*s%d" 44#define VXGE_FORMAT_DEVCONF "%s%*s\t%d" 45#define VXGE_FORMAT_PCICONF "%s%*s\t0x%.4llx\t0x%.4llx" 46#define VXGE_FORMAT_REGS "| %.8llx | %s%*s | %.16llx |" 47#define VXGE_FORMAT_HEADER \ 48 "| Address | Name%*s | Value |" 49 50static int vxge_nspaces = 0; 51static char vxge_line[120] = \ 52"+-----------------------------------------------------------------------------+"; 53 54#define VXGE_PRINT_LINE(fd) VXGE_PRINT(fd, vxge_line); 55 56#define VXGE_PRINT_REG_NAME(fd, parameter) { \ 57 VXGE_PRINT(fd, parameter); \ 58} 59 60#define VXGE_PRINT_HEADER(fd, maxSize, Offset) { \ 61 VXGE_PRINT_LINE(fd); \ 62 vxge_nspaces = maxSize - 4; \ 63 if (Offset == 1) { \ 64 VXGE_PRINT(fd, VXGE_FORMAT_HEADER, vxge_nspaces, " "); \ 65 } else { \ 66 VXGE_PRINT(fd, "Name%*s\tValue", vxge_nspaces, " "); \ 67 } \ 68 VXGE_PRINT_LINE(fd); \ 69} 70 71#define VXGE_PRINT_HEADER_REGS(fd) \ 72 VXGE_PRINT_HEADER(fd, VXGE_STR_MAX_LEN_REGS, 1) 73 74#define VXGE_PRINT_HEADER_PCICONF(fd) \ 75 VXGE_PRINT_HEADER(fd, VXGE_STR_MAX_LEN_PCICONF, 1) 76 77#define VXGE_PRINT_HEADER_DEVCONF(fd) \ 78 VXGE_PRINT_HEADER(fd, VXGE_STR_MAX_LEN_DEVCONF, 0) 79 80#define VXGE_PRINT_REGS(fd, parameter, offset, value) { \ 81 vxge_nspaces = VXGE_STR_MAX_LEN_REGS - strlen(parameter); \ 82 VXGE_PRINT(fd, VXGE_FORMAT_REGS, (offset), (parameter), \ 83 (vxge_nspaces), " ", (value)); \ 84} 85 86#define VXGE_PRINT_STATS(fd, parameter, value) { \ 87 vxge_nspaces = VXGE_STR_MAX_LEN_STATS - strlen(parameter); \ 88 VXGE_PRINT(fd, VXGE_FORMAT_STATS, (parameter), \ 89 (vxge_nspaces), " ", (value)); \ 90} 91 92#define STR_FUNC_MODE_SF1_VP17 "Single Function - 1 function(s) 17 VPath(s)/function" 93#define STR_FUNC_MODE_MF2_VP8 "Multi Function - 2 function(s) 8 VPath(s)/function" 94#define STR_FUNC_MODE_MF4_VP4 "Multi Function - 4 function(s) 4 VPath(s)/function" 95#define STR_FUNC_MODE_MF8_VP2 "Multi Function - 8 function(s) 2 VPath(s)/function" 96#define STR_FUNC_MODE_MF8P_VP2 "Multi Function (DirectIO) - 8 function(s) 2 VPath(s)/function" 97 98const char * 99vxge_func_mode[12] = 100{ 101 STR_FUNC_MODE_SF1_VP17, 102 STR_FUNC_MODE_MF8_VP2, 103 "Not supported", 104 "Not supported", 105 "Not supported", 106 "Not supported", 107 "Not supported", 108 "Not supported", 109 STR_FUNC_MODE_MF2_VP8, 110 STR_FUNC_MODE_MF4_VP4, 111 "Not supported", 112 STR_FUNC_MODE_MF8P_VP2 113}; 114 115const char * 116vxge_port_mode[6] = 117{ 118 "Default", 119 "Reserved", 120 "Active/Passive", 121 "Single Port", 122 "Dual Port", 123 "Disabled" 124}; 125 126const char * 127vxge_port_failure[3] = 128{ 129 "No Failover", 130 "Failover only", 131 "Failover & Failback" 132}; 133 134vxge_pci_bar0_t reginfo_registers[] = 135{ 136 {"PRC_STATUS1", 0x00A00, 1}, 137 {"RXDCM_RESET_IN_PROGRESS", 0x00A08, 1}, 138 {"REPLICQ_FLUSH_IN_PROGRESS", 0x00A10, 1}, 139 {"RXPE_CMDS_RESET_IN_PROGRESS", 0x00A18, 1}, 140 {"MXP_CMDS_RESET_IN_PROGRESS", 0x00A20, 1}, 141 {"NOFFLOAD_RESET_IN_PROGRESS", 0x00A28, 1}, 142 {"RD_REQ_IN_PROGRESS", 0x00A30, 1}, 143 {"RD_REQ_OUTSTANDING", 0x00A38, 1}, 144 {"KDFC_RESET_IN_PROGRESS", 0x00A40, 1}, 145 {"ONE_CFG_VP", 0x00B00, 1}, 146 {"ONE_COMMON", 0x00B08, 1}, 147 {"TIM_INT_EN", 0x00B80, 1}, 148 {"TIM_SET_INT_EN", 0x00B88, 1}, 149 {"TIM_CLR_INT_EN", 0x00B90, 1}, 150 {"TIM_MASK_INT_DURING_RESET", 0x00B98, 1}, 151 {"TIM_RESET_IN_PROGRESS", 0x00BA0, 1}, 152 {"TIM_OUTSTANDING_BMAP", 0x00BA8, 1}, 153 {"MSG_RESET_IN_PROGRESS", 0x00C00, 1}, 154 {"MSG_MXP_MR_READY", 0x00C08, 1}, 155 {"MSG_UXP_MR_READY", 0x00C10, 1}, 156 {"MSG_DMQ_NONI_RTL_PREFETCH", 0x00C18, 1}, 157 {"MSG_UMQ_RTL_BWR", 0x00C20, 1}, 158 {"CMN_RSTHDLR_CFG%d", 0x00D00, 5}, 159 {"CMN_RSTHDLR_CFG8", 0x00D40, 1}, 160 {"STATS_CFG0", 0x00D48, 1}, 161 {"CLEAR_MSIX_MASK_VECT%d", 0x00DA8, 4}, 162 {"SET_MSIX_MASK_VECT%d", 0x00DC8, 4}, 163 {"CLEAR_MSIX_MASK_ALL_VECT", 0x00DE8, 1}, 164 {"SET_MSIX_MASK_ALL_VECT", 0x00DF0, 1}, 165 {"MASK_VECTOR_%d", 0x00DF8, 4}, 166 {"MSIX_PENDING_VECTOR_%d", 0x00E18, 4}, 167 {"CLR_MSIX_ONE_SHOT_VEC%d", 0x00E38, 4}, 168 {"TITAN_ASIC_ID", 0x00E58, 1}, 169 {"TITAN_GENERAL_INT_STATUS", 0x00E60, 1}, 170 {"TITAN_MASK_ALL_INT", 0x00E70, 1}, 171 {"TIM_INT_STATUS0", 0x00E80, 1}, 172 {"TIM_INT_MASK0", 0x00E88, 1}, 173 {"TIM_INT_STATUS1", 0x00E90, 1}, 174 {"TIM_INT_MASK1", 0x00E98, 1}, 175 {"RTI_INT_STATUS", 0x00EA0, 1}, 176 {"RTI_INT_MASK", 0x00EA8, 1}, 177 {"ADAPTER_STATUS", 0x00EB0, 1}, 178 {"GEN_CTRL", 0x00EB8, 1}, 179 {"ADAPTER_READY", 0x00ED0, 1}, 180 {"OUTSTANDING_READ", 0x00ED8, 1}, 181 {"VPATH_RST_IN_PROG", 0x00EE0, 1}, 182 {"VPATH_REG_MODIFIED", 0x00EE8, 1}, 183 {"QCC_RESET_IN_PROGRESS", 0x00F40, 1}, 184 {"CP_RESET_IN_PROGRESS", 0x00FC0, 1}, 185 {"H2L_RESET_IN_PROGRESS", 0x01000, 1}, 186 {"XGMAC_READY", 0x01080, 1}, 187 {"FBIF_READY", 0x010C0, 1}, 188 {"VPLANE_ASSIGNMENTS", 0x01100, 1}, 189 {"VPATH_ASSIGNMENTS", 0x01108, 1}, 190 {"RESOURCE_ASSIGNMENTS", 0x01110, 1}, 191 {"HOST_TYPE_ASSIGNMENTS", 0x01118, 1}, 192 {"MAX_RESOURCE_ASSIGNMENTS", 0x01128, 1}, 193 {"PF_VPATH_ASSIGNMENTS", 0x01130, 1}, 194 {"RTS_ACCESS_ICMP", 0x01200, 1}, 195 {"RTS_ACCESS_TCPSYN", 0x01208, 1}, 196 {"RTS_ACCESS_ZL4PYLD", 0x01210, 1}, 197 {"RTS_ACCESS_L4PRTCL_TCP", 0x01218, 1}, 198 {"RTS_ACCESS_L4PRTCL_UDP", 0x01220, 1}, 199 {"RTS_ACCESS_L4PRTCL_FLEX", 0x01228, 1}, 200 {"RTS_ACCESS_IPFRAG", 0x01230, 1} 201}; 202 203vxge_pci_bar0_t reginfo_legacy[] = 204{ 205 {"TOC_SWAPPER_FB", 0x00010, 1}, 206 {"PIFM_RD_SWAP_EN", 0x00018, 1}, 207 {"PIFM_RD_FLIP_EN", 0x00020, 1}, 208 {"PIFM_WR_SWAP_EN", 0x00028, 1}, 209 {"PIFM_WR_FLIP_EN", 0x00030, 1}, 210 {"TOC_FIRST_POINTER", 0x00038, 1}, 211 {"HOST_ACCESS_EN", 0x00040, 1} 212}; 213 214vxge_pci_bar0_t reginfo_pcicfgmgmt[] = 215{ 216 {"RESOURCE_NO", 0x00000, 1}, 217 {"BARGRP_PF_OR_VF_BAR%d_MASK", 0x00008, 3}, 218 {"MSIXGRP_NO", 0x00020, 1} 219}; 220 221vxge_pci_bar0_t reginfo_toc[] = 222{ 223 {"TOC_COMMON_POINTER", 0x00050, 1}, 224 {"TOC_MEMREPAIR_POINTER", 0x00058, 1}, 225 {"TOC_PCICFGMGMT_POINTER_%d", 0x00060, 17}, 226 {"TOC_MRPCIM_POINTER", 0x001E0, 1}, 227 {"TOC_SRPCIM_POINTER_%d", 0x001E8, 17}, 228 {"TOC_VPMGMT_POINTER_%d", 0x00278, 17}, 229 {"TOC_VPATH_POINTER_%d", 0x00390, 17}, 230 {"TOC_KDFC", 0x004A0, 1}, 231 {"TOC_USDC", 0x004A8, 1}, 232 {"TOC_KDFC_VPATH_STRIDE", 0x004B0, 1}, 233 {"TOC_KDFC_FIFO_STRIDE", 0x004B8, 1} 234}; 235 236vxge_pci_bar0_t reginfo_vpath[] = 237{ 238 {"USDC_VPATH_VP%d", 0x00300, 1}, 239 {"WRDMA_ALARM_STATUS_VP%d", 0x00A00, 1}, 240 {"WRDMA_ALARM_MASK_VP%d", 0x00A08, 1}, 241 {"PRC_ALARM_REG_VP%d", 0x00A30, 1}, 242 {"PRC_ALARM_MASK_VP%d", 0x00A38, 1}, 243 {"PRC_ALARM_ALARM_VP%d", 0x00A40, 1}, 244 {"PRC_CFG1_VP%d", 0x00A48, 1}, 245 {"PRC_CFG4_VP%d", 0x00A60, 1}, 246 {"PRC_CFG5_VP%d", 0x00A68, 1}, 247 {"PRC_CFG6_VP%d", 0x00A70, 1}, 248 {"PRC_CFG7_VP%d", 0x00A78, 1}, 249 {"TIM_DEST_ADDR_VP%d", 0x00A80, 1}, 250 {"PRC_RXD_DOORBELL_VP%d", 0x00A88, 1}, 251 {"RQA_PRTY_FOR_VP_VP%d", 0x00A90, 1}, 252 {"RXDMEM_SIZE_VP%d", 0x00A98, 1}, 253 {"FRM_IN_PROGRESS_CNT_VP%d", 0x00AA0, 1}, 254 {"RX_MULTI_CAST_STATS_VP%d", 0x00AA8, 1}, 255 {"RX_FRM_TRANSFERRED_VP%d", 0x00AB0, 1}, 256 {"RXD_RETURNED_VP%d", 0x00AB8, 1}, 257 {"KDFC_FIFO_TRPL_PARTITION_VP%d", 0x00C00, 1}, 258 {"KDFC_FIFO_TRPL_CTRL_VP%d", 0x00C08, 1}, 259 {"KDFC_TRPL_FIFO_%d_CTRL_VP%d", 0x00C10, 3}, 260 {"KDFC_TRPL_FIFO_%d_WB_ADDRESS_VP%d", 0x00C28, 3}, 261 {"KDFC_TRPL_FIFO_OFFSET_VP%d", 0x00C40, 1}, 262 {"KDFC_DRBL_TRIPLET_TOTAL_VP%d", 0x00C48, 1}, 263 {"USDC_DRBL_CTRL_VP%d", 0x00C60, 1}, 264 {"USDC_VP_READY_VP%d", 0x00C68, 1}, 265 {"KDFC_STATUS_VP%d", 0x00C70, 1}, 266 {"XMAC_RPA_VCFG_VP%d", 0x00C80, 1}, 267 {"RXMAC_VCFG%d_VP%d", 0x00C88, 2}, 268 {"RTS_ACCESS_STEER_CTRL_VP%d", 0x00C98, 1}, 269 {"RTS_ACCESS_STEER_DATA%d_VP%d", 0x00CA0, 2}, 270 {"XMAC_VSPORT_CHOICE_VP%d", 0x00D00, 1}, 271 {"XMAC_STATS_CFG_VP%d", 0x00D08, 1}, 272 {"XMAC_STATS_ACCESS_CMD_VP%d", 0x00D10, 1}, 273 {"XMAC_STATS_ACCESS_DATA_VP%d", 0x00D18, 1}, 274 {"ASIC_NTWK_VP_CTRL_VP%d", 0x00D20, 1}, 275 {"XGMAC_VP_INT_STATUS_VP%d", 0x00D30, 1}, 276 {"XGMAC_VP_INT_MASK_VP%d", 0x00D38, 1}, 277 {"ASIC_NTWK_VP_ERR_REG_VP%d", 0x00D40, 1}, 278 {"ASIC_NTWK_VP_ERR_MASK_VP%d", 0x00D48, 1}, 279 {"ASIC_NTWK_VP_ERR_ALARM_VP%d", 0x00D50, 1}, 280 {"RTDMA_BW_CTRL_VP%d", 0x00D80, 1}, 281 {"RTDMA_RD_OPTIMIZATION_CTRL_VP%d", 0x00D88, 1}, 282 {"PDA_PCC_JOB_MONITOR_VP%d", 0x00D90, 1}, 283 {"TX_PROTOCOL_ASSIST_CFG_VP%d", 0x00D98, 1}, 284 {"TIM_CFG1_INT_NUM_%d_VP%d", 0x01000, 4}, 285 {"TIM_CFG2_INT_NUM_%d_VP%d", 0x01020, 4}, 286 {"TIM_CFG3_INT_NUM_%d_VP%d", 0x01040, 4}, 287 {"TIM_WRKLD_CLC_VP%d", 0x01060, 1}, 288 {"TIM_BITMAP_VP%d", 0x01068, 1}, 289 {"TIM_RING_ASSN_VP%d", 0x01070, 1}, 290 {"TIM_REMAP_VP%d", 0x01078, 1}, 291 {"TIM_VPATH_MAP_VP%d", 0x01080, 1}, 292 {"TIM_PCI_CFG_VP%d", 0x01088, 1}, 293 {"SGRP_ASSIGN_VP%d", 0x01100, 1}, 294 {"SGRP_AOA_AND_RESULT_VP%d", 0x01108, 1}, 295 {"RPE_PCI_CFG_VP%d", 0x01110, 1}, 296 {"RPE_LRO_CFG_VP%d", 0x01118, 1}, 297 {"PE_MR2VP_ACK_BLK_LIMIT_VP%d", 0x01120, 1}, 298 {"PE_MR2VP_RIRR_LIRR_BLK_LIMIT_VP%d", 0x01128, 1}, 299 {"TXPE_PCI_NCE_CFG_VP%d", 0x01130, 1}, 300 {"MSG_QPAD_EN_CFG_VP%d", 0x01180, 1}, 301 {"MSG_PCI_CFG_VP%d", 0x01188, 1}, 302 {"UMQDMQ_IR_INIT_VP%d", 0x01190, 1}, 303 {"DMQ_IR_INT_VP%d", 0x01198, 1}, 304 {"DMQ_BWR_INIT_ADD_VP%d", 0x011A0, 1}, 305 {"DMQ_BWR_INIT_BYTE_VP%d", 0x011A8, 1}, 306 {"DMQ_IR_VP%d", 0x011B0, 1}, 307 {"UMQ_INT_VP%d", 0x011B8, 1}, 308 {"UMQ_MR2VP_BWR_PFCH_INIT_VP%d", 0x011C0, 1}, 309 {"UMQ_BWR_PFCH_CTRL_VP%d", 0x011C8, 1}, 310 {"UMQ_MR2VP_BWR_EOL_VP%d", 0x011D0, 1}, 311 {"UMQ_BWR_INIT_ADD_VP%d", 0x011D8, 1}, 312 {"UMQ_BWR_INIT_BYTE_VP%d", 0x011E0, 1}, 313 {"GENDMA_INT_VP%d", 0x011E8, 1}, 314 {"UMQDMQ_IR_INIT_NOTIFY_VP%d", 0x011F0, 1}, 315 {"DMQ_INIT_NOTIFY_VP%d", 0x011F8, 1}, 316 {"UMQ_INIT_NOTIFY_VP%d", 0x01200, 1}, 317 {"TPA_CFG_VP%d", 0x01380, 1}, 318 {"TX_VP_RESET_DISCARDED_FRMS_VP%d", 0x01400, 1}, 319 {"FAU_RPA_VCFG_VP%d", 0x01480, 1}, 320 {"FAU_ADAPTIVE_LRO_FILTER_CTRL_VP%d", 0x014A8, 1}, 321 {"FAU_ADAPTIVE_LRO_FILTER_IP_DATA0_VP%d", 0x014B0, 1}, 322 {"FAU_ADAPTIVE_LRO_FILTER_IP_DATA1_VP%d", 0x014B8, 1}, 323 {"FAU_ADAPTIVE_LRO_FILTER_VLAN_DATA_VP%d", 0x014C0, 1}, 324 {"DBG_STATS_RX_MPA_VP%d", 0x014D0, 1}, 325 {"DBG_STATS_RX_FAU_VP%d", 0x014D8, 1}, 326 {"FBMC_VP_RDY_VP%d", 0x014F0, 1}, 327 {"VPATH_PCIPIF_INT_STATUS_VP%d", 0x01E00, 1}, 328 {"VPATH_PCIPIF_INT_MASK_VP%d", 0x01E08, 1}, 329 {"SRPCIM_MSG_TO_VPATH_REG_VP%d", 0x01E20, 1}, 330 {"SRPCIM_MSG_TO_VPATH_MASK_VP%d", 0x01E28, 1}, 331 {"SRPCIM_MSG_TO_VPATH_ALARM_VP%d", 0x01E30, 1}, 332 {"VPATH_TO_SRPCIM_WMSG_VP%d", 0x01EA0, 1}, 333 {"VPATH_TO_SRPCIM_WMSG_TRIG_VP%d", 0x01EA8, 1}, 334 {"VPATH_GENERAL_INT_STATUS_VP%d", 0x02000, 1}, 335 {"VPATH_GENERAL_INT_MASK_VP%d", 0x02008, 1}, 336 {"VPATH_PPIF_INT_STATUS_VP%d", 0x02010, 1}, 337 {"VPATH_PPIF_INT_MASK_VP%d", 0x02018, 1}, 338 {"KDFCCTL_ERRORS_REG_VP%d", 0x02020, 1}, 339 {"KDFCCTL_ERRORS_MASK_VP%d", 0x02028, 1}, 340 {"KDFCCTL_ERRORS_ALARM_VP%d", 0x02030, 1}, 341 {"GENERAL_ERRORS_REG_VP%d", 0x02040, 1}, 342 {"GENERAL_ERRORS_MASK_VP%d", 0x02048, 1}, 343 {"GENERAL_ERRORS_ALARM_VP%d", 0x02050, 1}, 344 {"PCI_CONFIG_ERRORS_REG_VP%d", 0x02058, 1}, 345 {"PCI_CONFIG_ERRORS_MASK_VP%d", 0x02060, 1}, 346 {"PCI_CONFIG_ERRORS_ALARM_VP%d", 0x02068, 1}, 347 {"MRPCIM_TO_VPATH_ALARM_REG_VP%d", 0x02070, 1}, 348 {"MRPCIM_TO_VPATH_ALARM_MASK_VP%d", 0x02078, 1}, 349 {"MRPCIM_TO_VPATH_ALARM_ALARM_VP%d", 0x02080, 1}, 350 {"SRPCIM_TO_VPATH_ALARM_REG_VP%d", 0x02088, 1}, 351 {"SRPCIM_TO_VPATH_ALARM_MASK_VP%d", 0x02090, 1}, 352 {"SRPCIM_TO_VPATH_ALARM_ALARM_VP%d", 0x02098, 1}, 353 {"KDFCCTL_STATUS_VP%d", 0x02108, 1}, 354 {"RSTHDLR_STATUS_VP%d", 0x02110, 1}, 355 {"FIFO%d_STATUS_VP%d", 0x02118, 3}, 356 {"TGT_ILLEGAL_ACCESS_VP%d", 0x02158, 1}, 357 {"VPATH_GENERAL_CFG1_VP%d", 0x02200, 1}, 358 {"VPATH_GENERAL_CFG2_VP%d", 0x02208, 1}, 359 {"VPATH_GENERAL_CFG3_VP%d", 0x02210, 1}, 360 {"KDFCCTL_CFG0_VP%d", 0x02220, 1}, 361 {"DBLGEN_CFG%d_VP%d", 0x02228, 8}, 362 {"STATS_CFG_VP%d", 0x02268, 1}, 363 {"INTERRUPT_CFG0_VP%d", 0x02270, 1}, 364 {"INTERRUPT_CFG2_VP%d", 0x02280, 1}, 365 {"ONE_SHOT_VECT%d_EN_VP%d", 0x02288, 4}, 366 {"PCI_CONFIG_ACCESS_CFG1_VP%d", 0x022B0, 1}, 367 {"PCI_CONFIG_ACCESS_CFG2_VP%d", 0x022B8, 1}, 368 {"PCI_CONFIG_ACCESS_STATUS_VP%d", 0x022C0, 1}, 369 {"VPATH_DEBUG_STATS%d_VP%d", 0x02300, 7}, 370 {"VPATH_GENSTATS_COUNT01_VP%d", 0x02338, 1}, 371 {"VPATH_GENSTATS_COUNT23_VP%d", 0x02340, 1}, 372 {"VPATH_GENSTATS_COUNT4_VP%d", 0x02348, 1}, 373 {"VPATH_GENSTATS_COUNT5_VP%d", 0x02350, 1}, 374 {"QCC_PCI_CFG_VP%d", 0x02540, 1}, 375 {"H2L_VPATH_CONFIG_VP%d", 0x02600, 1}, 376 {"H2L_ZERO_BYTE_READ_ADDRESS_VP%d", 0x02608, 1}, 377 {"PH2L_VP_CFG0_VP%d", 0x02640, 1} 378}; 379 380vxge_pci_bar0_t reginfo_vpmgmt[] = 381{ 382 {"ONE_CFG_SR_RDY", 0x00000, 1}, 383 {"SGRP_OWN", 0x00008, 1}, 384 {"VPATH_TO_FUNC_MAP_CFG1", 0x00040, 1}, 385 {"VPATH_IS_FIRST", 0x00048, 1}, 386 {"SRPCIM_TO_VPATH_WMSG", 0x00050, 1}, 387 {"SRPCIM_TO_VPATH_WMSG_TRIG", 0x00058, 1}, 388 {"TIM_VPATH_ASSIGNMENT", 0x00100, 1}, 389 {"RQA_TOP_PRTY_FOR_VP", 0x00140, 1}, 390 {"USDC_VPATH_OWN", 0x00180, 1}, 391 {"RXMAC_RX_PA_CFG0_VPMGMT_CLONE", 0x001C0, 1}, 392 {"RTS_MGR_CFG0_VPMGMT_CLONE", 0x001C8, 1}, 393 {"RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE", 0x001D0, 1}, 394 {"RXMAC_CFG0_PORT_VPMGMT_CLONE_%d", 0x001D8, 3}, 395 {"RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_%d", 0x001F0, 3}, 396 {"XMAC_VSPORT_CHOICES_VP", 0x00240, 1}, 397 {"XGMAC_GEN_STATUS_VPMGMT_CLONE", 0x00260, 1}, 398 {"XGMAC_STATUS_PORT_VPMGMT_CLONE_%d", 0x00268, 2}, 399 {"XMAC_GEN_CFG_VPMGMT_CLONE", 0x00278, 1}, 400 {"XMAC_TIMESTAMP_VPMGMT_CLONE", 0x00280, 1}, 401 {"XMAC_STATS_GEN_CFG_VPMGMT_CLONE", 0x00288, 1}, 402 {"XMAC_CFG_PORT_VPMGMT_CLONE_%d", 0x00290, 3}, 403 {"TXMAC_GEN_CFG0_VPMGMT_CLONE", 0x002C0, 1}, 404 {"TXMAC_CFG0_PORT_VPMGMT_CLONE_%d", 0x002C8, 3}, 405 {"WOL_MP_CRC", 0x00300, 1}, 406 {"WOL_MP_MASK_A", 0x00308, 1}, 407 {"WOL_MP_MASK_B", 0x00310, 1}, 408 {"FAU_PA_CFG_VPMGMT_CLONE", 0x00360, 1}, 409 {"RX_DATAPATH_UTIL_VP_CLONE", 0x00368, 1}, 410 {"TX_DATAPATH_UTIL_VP_CLONE", 0x00380, 1} 411}; 412 413vxge_pci_bar0_t reginfo_mrpcim[] = 414{ 415 {"G3FBCT_INT_STATUS", 0x00000, 1}, 416 {"G3FBCT_INT_MASK", 0x00008, 1}, 417 {"G3FBCT_ERR_REG", 0x00010, 1}, 418 {"G3FBCT_ERR_MASK", 0x00018, 1}, 419 {"G3FBCT_ERR_ALARM", 0x00020, 1}, 420 {"G3FBCT_CONFIG%d", 0x00028, 3}, 421 {"G3FBCT_INIT%d", 0x00040, 6}, 422 {"G3FBCT_DLL_TRAINING1", 0x00070, 1}, 423 {"G3FBCT_DLL_TRAINING2", 0x00078, 1}, 424 {"G3FBCT_DLL_TRAINING3", 0x00080, 1}, 425 {"G3FBCT_DLL_TRAINING4", 0x00088, 1}, 426 {"G3FBCT_DLL_TRAINING6", 0x00090, 1}, 427 {"G3FBCT_DLL_TRAINING7", 0x00098, 1}, 428 {"G3FBCT_DLL_TRAINING8", 0x000A0, 1}, 429 {"G3FBCT_DLL_TRAINING9", 0x000A8, 1}, 430 {"G3FBCT_DLL_TRAINING5", 0x000B0, 1}, 431 {"G3FBCT_DLL_TRAINING10", 0x000B8, 1}, 432 {"G3FBCT_DLL_TRAINING11", 0x000C0, 1}, 433 {"G3FBCT_INIT6", 0x000C8, 1}, 434 {"G3FBCT_TEST0", 0x000D0, 1}, 435 {"G3FBCT_TEST01", 0x000D8, 1}, 436 {"G3FBCT_TEST1", 0x000E0, 1}, 437 {"G3FBCT_TEST2", 0x000E8, 1}, 438 {"G3FBCT_TEST11", 0x000F0, 1}, 439 {"G3FBCT_TEST21", 0x000F8, 1}, 440 {"G3FBCT_TEST3", 0x00100, 1}, 441 {"G3FBCT_TEST4", 0x00108, 1}, 442 {"G3FBCT_TEST31", 0x00110, 1}, 443 {"G3FBCT_TEST41", 0x00118, 1}, 444 {"G3FBCT_TEST5", 0x00120, 1}, 445 {"G3FBCT_TEST6", 0x00128, 1}, 446 {"G3FBCT_TEST51", 0x00130, 1}, 447 {"G3FBCT_TEST61", 0x00138, 1}, 448 {"G3FBCT_TEST7", 0x00140, 1}, 449 {"G3FBCT_TEST71", 0x00148, 1}, 450 {"G3FBCT_LOOP_BACK", 0x001B0, 1}, 451 {"G3FBCT_LOOP_BACK1", 0x001B8, 1}, 452 {"G3FBCT_LOOP_BACK2", 0x001C0, 1}, 453 {"G3FBCT_LOOP_BACK3", 0x001C8, 1}, 454 {"G3FBCT_LOOP_BACK4", 0x001D0, 1}, 455 {"G3FBCT_LOOP_BACK5", 0x001D8, 1}, 456 {"G3FBCT_LOOP_BACK_RDLL_%d", 0x00200, 4}, 457 {"G3FBCT_LOOP_BACK_WDLL_%d", 0x00220, 4}, 458 {"G3FBCT_TRAN_WRD_CNT", 0x00240, 1}, 459 {"G3FBCT_TRAN_AP_CNT", 0x00248, 1}, 460 {"G3FBCT_G3BIST", 0x00250, 1}, 461 {"WRDMA_INT_STATUS", 0x00A00, 1}, 462 {"WRDMA_INT_MASK", 0x00A08, 1}, 463 {"RC_ALARM_REG", 0x00A10, 1}, 464 {"RC_ALARM_MASK", 0x00A18, 1}, 465 {"RC_ALARM_ALARM", 0x00A20, 1}, 466 {"RXDRM_SM_ERR_REG", 0x00A28, 1}, 467 {"RXDRM_SM_ERR_MASK", 0x00A30, 1}, 468 {"RXDRM_SM_ERR_ALARM", 0x00A38, 1}, 469 {"RXDCM_SM_ERR_REG", 0x00A40, 1}, 470 {"RXDCM_SM_ERR_MASK", 0x00A48, 1}, 471 {"RXDCM_SM_ERR_ALARM", 0x00A50, 1}, 472 {"RXDWM_SM_ERR_REG", 0x00A58, 1}, 473 {"RXDWM_SM_ERR_MASK", 0x00A60, 1}, 474 {"RXDWM_SM_ERR_ALARM", 0x00A68, 1}, 475 {"RDA_ERR_REG", 0x00A70, 1}, 476 {"RDA_ERR_MASK", 0x00A78, 1}, 477 {"RDA_ERR_ALARM", 0x00A80, 1}, 478 {"RDA_ECC_DB_REG", 0x00A88, 1}, 479 {"RDA_ECC_DB_MASK", 0x00A90, 1}, 480 {"RDA_ECC_DB_ALARM", 0x00A98, 1}, 481 {"RDA_ECC_SG_REG", 0x00AA0, 1}, 482 {"RDA_ECC_SG_MASK", 0x00AA8, 1}, 483 {"RDA_ECC_SG_ALARM", 0x00AB0, 1}, 484 {"RQA_ERR_REG", 0x00AB8, 1}, 485 {"RQA_ERR_MASK", 0x00AC0, 1}, 486 {"RQA_ERR_ALARM", 0x00AC8, 1}, 487 {"FRF_ALARM_REG", 0x00AD0, 1}, 488 {"FRF_ALARM_MASK", 0x00AD8, 1}, 489 {"FRF_ALARM_ALARM", 0x00AE0, 1}, 490 {"ROCRC_ALARM_REG", 0x00AE8, 1}, 491 {"ROCRC_ALARM_MASK", 0x00AF0, 1}, 492 {"ROCRC_ALARM_ALARM", 0x00AF8, 1}, 493 {"WDE0_ALARM_REG", 0x00B00, 1}, 494 {"WDE0_ALARM_MASK", 0x00B08, 1}, 495 {"WDE0_ALARM_ALARM", 0x00B10, 1}, 496 {"WDE1_ALARM_REG", 0x00B18, 1}, 497 {"WDE1_ALARM_MASK", 0x00B20, 1}, 498 {"WDE1_ALARM_ALARM", 0x00B28, 1}, 499 {"WDE2_ALARM_REG", 0x00B30, 1}, 500 {"WDE2_ALARM_MASK", 0x00B38, 1}, 501 {"WDE2_ALARM_ALARM", 0x00B40, 1}, 502 {"WDE3_ALARM_REG", 0x00B48, 1}, 503 {"WDE3_ALARM_MASK", 0x00B50, 1}, 504 {"WDE3_ALARM_ALARM", 0x00B58, 1}, 505 {"RC_CFG", 0x00B60, 1}, 506 {"ECC_CFG", 0x00B68, 1}, 507 {"RXD_CFG_1BM", 0x00B70, 1}, 508 {"RXD_CFG1_1BM", 0x00B78, 1}, 509 {"RXD_CFG2_1BM", 0x00B80, 1}, 510 {"RXD_CFG3_1BM", 0x00B88, 1}, 511 {"RXD_CFG4_1BM", 0x00B90, 1}, 512 {"RXD_CFG_3BM", 0x00B98, 1}, 513 {"RXD_CFG1_3BM", 0x00BA0, 1}, 514 {"RXD_CFG2_3BM", 0x00BA8, 1}, 515 {"RXD_CFG3_3BM", 0x00BB0, 1}, 516 {"RXD_CFG4_3BM", 0x00BB8, 1}, 517 {"RXD_CFG_5BM", 0x00BC0, 1}, 518 {"RXD_CFG1_5BM", 0x00BC8, 1}, 519 {"RXD_CFG2_5BM", 0x00BD0, 1}, 520 {"RXD_CFG3_5BM", 0x00BD8, 1}, 521 {"RXD_CFG4_5BM", 0x00BE0, 1}, 522 {"RX_W_ROUND_ROBIN_%d", 0x00BE8, 22}, 523 {"RX_QUEUE_PRIORITY_%d", 0x00C98, 3}, 524 {"REPLICATION_QUEUE_PRIORITY", 0x00CC8, 1}, 525 {"RX_QUEUE_SELECT", 0x00CD0, 1}, 526 {"RQA_VPBP_CTRL", 0x00CD8, 1}, 527 {"RX_MULTI_CAST_CTRL", 0x00CE0, 1}, 528 {"WDE_PRM_CTRL", 0x00CE8, 1}, 529 {"NOA_CTRL", 0x00CF0, 1}, 530 {"PHASE_CFG", 0x00CF8, 1}, 531 {"RCQ_BYPQ_CFG", 0x00D00, 1}, 532 {"DOORBELL_INT_STATUS", 0x00E00, 1}, 533 {"DOORBELL_INT_MASK", 0x00E08, 1}, 534 {"KDFC_ERR_REG", 0x00E10, 1}, 535 {"KDFC_ERR_MASK", 0x00E18, 1}, 536 {"KDFC_ERR_REG_ALARM", 0x00E20, 1}, 537 {"USDC_ERR_REG", 0x00E28, 1}, 538 {"USDC_ERR_MASK", 0x00E30, 1}, 539 {"USDC_ERR_REG_ALARM", 0x00E38, 1}, 540 {"KDFC_VP_PARTITION_%d", 0x00E40, 9}, 541 {"KDFC_W_ROUND_ROBIN_%d", 0x00E88, 60}, 542 {"KDFC_ENTRY_TYPE_SEL_%d", 0x01068, 2}, 543 {"KDFC_FIFO_%d_CTRL", 0x01078, 51}, 544 {"KDFC_KRNL_USR_CTRL", 0x01210, 1}, 545 {"KDFC_PDA_MONITOR", 0x01218, 1}, 546 {"KDFC_MP_MONITOR", 0x01220, 1}, 547 {"KDFC_PE_MONITOR", 0x01228, 1}, 548 {"KDFC_READ_CNTRL", 0x01230, 1}, 549 {"KDFC_READ_DATA", 0x01238, 1}, 550 {"KDFC_FORCE_VALID_CTRL", 0x01240, 1}, 551 {"KDFC_MULTI_CYCLE_CTRL", 0x01248, 1}, 552 {"KDFC_ECC_CTRL", 0x01250, 1}, 553 {"KDFC_VPBP_CTRL", 0x01258, 1}, 554 {"RXMAC_INT_STATUS", 0x01600, 1}, 555 {"RXMAC_INT_MASK", 0x01608, 1}, 556 {"RXMAC_GEN_ERR_REG", 0x01618, 1}, 557 {"RXMAC_GEN_ERR_MASK", 0x01620, 1}, 558 {"RXMAC_GEN_ERR_ALARM", 0x01628, 1}, 559 {"RXMAC_ECC_ERR_REG", 0x01630, 1}, 560 {"RXMAC_ECC_ERR_MASK", 0x01638, 1}, 561 {"RXMAC_ECC_ERR_ALARM", 0x01640, 1}, 562 {"RXMAC_VARIOUS_ERR_REG", 0x01648, 1}, 563 {"RXMAC_VARIOUS_ERR_MASK", 0x01650, 1}, 564 {"RXMAC_VARIOUS_ERR_ALARM", 0x01658, 1}, 565 {"RXMAC_GEN_CFG", 0x01660, 1}, 566 {"RXMAC_AUTHORIZE_ALL_ADDR", 0x01668, 1}, 567 {"RXMAC_AUTHORIZE_ALL_VID", 0x01670, 1}, 568 {"RXMAC_THRESH_CROSS_REPL", 0x016B8, 1}, 569 {"RXMAC_RED_RATE_REPL_QUEUE", 0x016C0, 1}, 570 {"RXMAC_CFG0_PORT%d", 0x016E0, 3}, 571 {"RXMAC_CFG2_PORT%d", 0x01710, 3}, 572 {"RXMAC_PAUSE_CFG_PORT%d", 0x01728, 3}, 573 {"RXMAC_RED_CFG0_PORT%d", 0x01758, 3}, 574 {"RXMAC_RED_CFG1_PORT%d", 0x01770, 3}, 575 {"RXMAC_RED_CFG2_PORT%d", 0x01788, 3}, 576 {"RXMAC_LINK_UTIL_PORT%d", 0x017A0, 3}, 577 {"RXMAC_STATUS_PORT%d", 0x017D0, 3}, 578 {"RXMAC_RX_PA_CFG%d", 0x01800, 2}, 579 {"RTS_MGR_CFG%d", 0x01828, 2}, 580 {"RTS_MGR_CRITERIA_PRIORITY", 0x01838, 1}, 581 {"RTS_MGR_DA_PAUSE_CFG", 0x01840, 1}, 582 {"RTS_MGR_DA_SLOW_PROTO_CFG", 0x01848, 1}, 583 {"RTS_MGR_STEER_CTRL", 0x018A8, 1}, 584 {"RTS_MGR_STEER_DATA0", 0x018B0, 1}, 585 {"RTS_MGR_STEER_DATA1", 0x018B8, 1}, 586 {"RTS_MGR_STEER_VPATH_VECTOR", 0x018C0, 1}, 587 {"XMAC_STATS_RX_XGMII_CHAR", 0x01930, 1}, 588 {"XMAC_STATS_RX_XGMII_COLUMN1", 0x01938, 1}, 589 {"XMAC_STATS_RX_XGMII_COLUMN2", 0x01940, 1}, 590 {"XMAC_STATS_RX_XGMII_BEHAV_COLUMN2", 0x01948, 1}, 591 {"XMAC_RX_XGMII_CAPTURE_CTRL_PORT%d", 0x01950, 3}, 592 {"DBG_STAT_RX_ANY_FRMS", 0x01968, 1}, 593 {"RXMAC_RED_RATE_VP%d", 0x01A00, 17}, 594 {"RXMAC_THRESH_CROSS_VP%d", 0x01C00, 17}, 595 {"XGMAC_INT_STATUS", 0x01E00, 1}, 596 {"XGMAC_INT_MASK", 0x01E08, 1}, 597 {"XMAC_GEN_ERR_REG", 0x01E10, 1}, 598 {"XMAC_GEN_ERR_MASK", 0x01E18, 1}, 599 {"XMAC_GEN_ERR_ALARM", 0x01E20, 1}, 600 {"XMAC_LINK_ERR_PORT_REG%d", 0x01E28, 2}, 601 {"XMAC_LINK_ERR_PORT_MASK%d", 0x01E30, 2}, 602 {"XMAC_LINK_ERR_PORT_ALARM%d", 0x01E38, 2}, 603 {"XGXS_GEN_ERR_REG", 0x01E58, 1}, 604 {"XGXS_GEN_ERR_MASK", 0x01E60, 1}, 605 {"XGXS_GEN_ERR_ALARM", 0x01E68, 1}, 606 {"ASIC_NTWK_ERR_REG", 0x01E70, 1}, 607 {"ASIC_NTWK_ERR_MASK", 0x01E78, 1}, 608 {"ASIC_NTWK_ERR_ALARM", 0x01E80, 1}, 609 {"ASIC_GPIO_ERR_REG", 0x01E88, 1}, 610 {"ASIC_GPIO_ERR_MASK", 0x01E90, 1}, 611 {"ASIC_GPIO_ERR_ALARM", 0x01E98, 1}, 612 {"XGMAC_GEN_STATUS", 0x01EA0, 1}, 613 {"XGMAC_GEN_FW_MEMO_STATUS", 0x01EA8, 1}, 614 {"XGMAC_GEN_FW_MEMO_MASK", 0x01EB0, 1}, 615 {"XGMAC_GEN_FW_VPATH_TO_VSPORT_STATUS", 0x01EB8, 1}, 616 {"XGMAC_MAIN_CFG_PORT%d", 0x01EC0, 2}, 617 {"XGMAC_DEBOUNCE_PORT%d", 0x01ED0, 2}, 618 {"XGMAC_STATUS_PORT%d", 0x01EE0, 2}, 619 {"XMAC_GEN_CFG", 0x01F40, 1}, 620 {"XMAC_TIMESTAMP", 0x01F48, 1}, 621 {"XMAC_STATS_GEN_CFG", 0x01F50, 1}, 622 {"XMAC_STATS_SYS_CMD", 0x01F58, 1}, 623 {"XMAC_STATS_SYS_DATA", 0x01F60, 1}, 624 {"ASIC_NTWK_CTRL", 0x01F80, 1}, 625 {"ASIC_NTWK_CFG_SHOW_PORT_INFO", 0x01F88, 1}, 626 {"ASIC_NTWK_CFG_PORT_NUM", 0x01F90, 1}, 627 {"XMAC_CFG_PORT%d", 0x01F98, 3}, 628 {"XMAC_STATION_ADDR_PORT%d", 0x01FB0, 2}, 629 {"ASIC_LED_ACTIVITY_CTRL_PORT%d", 0x01FC0, 3}, 630 {"LAG_CFG", 0x02020, 1}, 631 {"LAG_STATUS", 0x02028, 1}, 632 {"LAG_ACTIVE_PASSIVE_CFG", 0x02030, 1}, 633 {"LAG_LACP_CFG", 0x02040, 1}, 634 {"LAG_TIMER_CFG_1", 0x02048, 1}, 635 {"LAG_TIMER_CFG_2", 0x02050, 1}, 636 {"LAG_SYS_ID", 0x02058, 1}, 637 {"LAG_SYS_CFG", 0x02060, 1}, 638 {"LAG_AGGR_ADDR_CFG%d", 0x02070, 2}, 639 {"LAG_AGGR_ID_CFG%d", 0x02080, 2}, 640 {"LAG_AGGR_ADMIN_KEY%d", 0x02090, 2}, 641 {"LAG_AGGR_ALT_ADMIN_KEY", 0x020A0, 1}, 642 {"LAG_AGGR_OPER_KEY%d", 0x020A8, 2}, 643 {"LAG_AGGR_PARTNER_SYS_ID%d", 0x020B8, 2}, 644 {"LAG_AGGR_PARTNER_INFO%d", 0x020C8, 2}, 645 {"LAG_AGGR_STATE%d", 0x020D8, 2}, 646 {"LAG_PORT_CFG%d", 0x020F0, 2}, 647 {"LAG_PORT_ACTOR_ADMIN_CFG%d", 0x02100, 2}, 648 {"LAG_PORT_ACTOR_ADMIN_STATE%d", 0x02110, 2}, 649 {"LAG_PORT_PARTNER_ADMIN_SYS_ID%d", 0x02120, 2}, 650 {"LAG_PORT_PARTNER_ADMIN_CFG%d", 0x02130, 2}, 651 {"LAG_PORT_PARTNER_ADMIN_STATE%d", 0x02140, 2}, 652 {"LAG_PORT_TO_AGGR%d", 0x02150, 2}, 653 {"LAG_PORT_ACTOR_OPER_KEY%d", 0x02160, 2}, 654 {"LAG_PORT_ACTOR_OPER_STATE%d", 0x02170, 2}, 655 {"LAG_PORT_PARTNER_OPER_SYS_ID%d", 0x02180, 2}, 656 {"LAG_PORT_PARTNER_OPER_INFO%d", 0x02190, 2}, 657 {"LAG_PORT_PARTNER_OPER_STATE%d", 0x021A0, 2}, 658 {"LAG_PORT_STATE_VARS%d", 0x021B0, 2}, 659 {"LAG_PORT_TIMER_CNTR%d", 0x021C0, 2}, 660 {"TRANSCEIVER_RESET_PORT%d", 0x021E0, 2}, 661 {"TRANSCEIVER_CTRL_PORT%d", 0x021F0, 2}, 662 {"ASIC_GPIO_CTRL", 0x02200, 1}, 663 {"ASIC_LED_BEACON_CTRL", 0x02208, 1}, 664 {"ASIC_LED_CTRL%d", 0x02210, 2}, 665 {"ASIC_LED_DEBUG_SEL", 0x02220, 1}, 666 {"USDC_SGRP_PARTITION", 0x02300, 1}, 667 {"USDC_UGRP_PRIORITY_%d", 0x02308, 17}, 668 {"UGRP_HTN_WRR_PRIORITY_%d", 0x02398, 20}, 669 {"USDC_VPLANE_%d", 0x02438, 17}, 670 {"USDC_SGRP_ASSIGNMENT", 0x024C8, 1}, 671 {"USDC_CNTRL", 0x024D0, 1}, 672 {"USDC_READ_CNTRL", 0x024D8, 1}, 673 {"USDC_READ_DATA", 0x024E0, 1}, 674 {"UGRP_SRQ_WRR_PRIORITY_%d", 0x02500, 20}, 675 {"UGRP_CQRQ_WRR_PRIORITY_%d", 0x025A0, 20}, 676 {"USDC_ECC_CTRL", 0x02640, 1}, 677 {"USDC_VPBP_CTRL", 0x02648, 1}, 678 {"RTDMA_INT_STATUS", 0x02700, 1}, 679 {"RTDMA_INT_MASK", 0x02708, 1}, 680 {"PDA_ALARM_REG", 0x02710, 1}, 681 {"PDA_ALARM_MASK", 0x02718, 1}, 682 {"PDA_ALARM_ALARM", 0x02720, 1}, 683 {"PCC_ERROR_REG", 0x02728, 1}, 684 {"PCC_ERROR_MASK", 0x02730, 1}, 685 {"PCC_ERROR_ALARM", 0x02738, 1}, 686 {"LSO_ERROR_REG", 0x02740, 1}, 687 {"LSO_ERROR_MASK", 0x02748, 1}, 688 {"LSO_ERROR_ALARM", 0x02750, 1}, 689 {"SM_ERROR_REG", 0x02758, 1}, 690 {"SM_ERROR_MASK", 0x02760, 1}, 691 {"SM_ERROR_ALARM", 0x02768, 1}, 692 {"PDA_CONTROL", 0x02770, 1}, 693 {"PDA_PDA_CONTROL_0", 0x02778, 1}, 694 {"PDA_PDA_SERVICE_STATE_%d", 0x02780, 3}, 695 {"PDA_PDA_TASK_PRIORITY_NUMBER", 0x02798, 1}, 696 {"PDA_VP", 0x027A0, 1}, 697 {"TXD_OWNERSHIP_CTRL", 0x027A8, 1}, 698 {"PCC_CFG", 0x027B0, 1}, 699 {"PCC_CONTROL", 0x027B8, 1}, 700 {"PDA_STATUS1", 0x027C0, 1}, 701 {"RTDMA_BW_TIMER", 0x027C8, 1}, 702 {"G3CMCT_INT_STATUS", 0x02900, 1}, 703 {"G3CMCT_INT_MASK", 0x02908, 1}, 704 {"G3CMCT_ERR_REG", 0x02910, 1}, 705 {"G3CMCT_ERR_MASK", 0x02918, 1}, 706 {"G3CMCT_ERR_ALARM", 0x02920, 1}, 707 {"G3CMCT_CONFIG%d", 0x02928, 3}, 708 {"G3CMCT_INIT%d", 0x02940, 6}, 709 {"G3CMCT_DLL_TRAINING1", 0x02970, 1}, 710 {"G3CMCT_DLL_TRAINING2", 0x02978, 1}, 711 {"G3CMCT_DLL_TRAINING3", 0x02980, 1}, 712 {"G3CMCT_DLL_TRAINING4", 0x02988, 1}, 713 {"G3CMCT_DLL_TRAINING6", 0x02990, 1}, 714 {"G3CMCT_DLL_TRAINING7", 0x02998, 1}, 715 {"G3CMCT_DLL_TRAINING8", 0x029A0, 1}, 716 {"G3CMCT_DLL_TRAINING9", 0x029A8, 1}, 717 {"G3CMCT_DLL_TRAINING5", 0x029B0, 1}, 718 {"G3CMCT_DLL_TRAINING10", 0x029B8, 1}, 719 {"G3CMCT_DLL_TRAINING11", 0x029C0, 1}, 720 {"G3CMCT_INIT6", 0x029C8, 1}, 721 {"G3CMCT_TEST0", 0x029D0, 1}, 722 {"G3CMCT_TEST01", 0x029D8, 1}, 723 {"G3CMCT_TEST1", 0x029E0, 1}, 724 {"G3CMCT_TEST2", 0x029E8, 1}, 725 {"G3CMCT_TEST11", 0x029F0, 1}, 726 {"G3CMCT_TEST21", 0x029F8, 1}, 727 {"G3CMCT_TEST3", 0x02A00, 1}, 728 {"G3CMCT_TEST4", 0x02A08, 1}, 729 {"G3CMCT_TEST31", 0x02A10, 1}, 730 {"G3CMCT_TEST41", 0x02A18, 1}, 731 {"G3CMCT_TEST5", 0x02A20, 1}, 732 {"G3CMCT_TEST6", 0x02A28, 1}, 733 {"G3CMCT_TEST51", 0x02A30, 1}, 734 {"G3CMCT_TEST61", 0x02A38, 1}, 735 {"G3CMCT_TEST7", 0x02A40, 1}, 736 {"G3CMCT_TEST71", 0x02A48, 1}, 737 {"G3CMCT_INIT41", 0x02A50, 1}, 738 {"G3CMCT_TEST8", 0x02A58, 1}, 739 {"G3CMCT_TEST9", 0x02A60, 1}, 740 {"G3CMCT_TEST10", 0x02A68, 1}, 741 {"G3CMCT_TEST101", 0x02A70, 1}, 742 {"G3CMCT_TEST12", 0x02A78, 1}, 743 {"G3CMCT_TEST13", 0x02A80, 1}, 744 {"G3CMCT_TEST14", 0x02A88, 1}, 745 {"G3CMCT_TEST15", 0x02A90, 1}, 746 {"G3CMCT_TEST16", 0x02A98, 1}, 747 {"G3CMCT_TEST17", 0x02AA0, 1}, 748 {"G3CMCT_TEST18", 0x02AA8, 1}, 749 {"G3CMCT_LOOP_BACK", 0x02AB0, 1}, 750 {"G3CMCT_LOOP_BACK1", 0x02AB8, 1}, 751 {"G3CMCT_LOOP_BACK2", 0x02AC0, 1}, 752 {"G3CMCT_LOOP_BACK3", 0x02AC8, 1}, 753 {"G3CMCT_LOOP_BACK4", 0x02AD0, 1}, 754 {"G3CMCT_LOOP_BACK5", 0x02AD8, 1}, 755 {"G3CMCT_LOOP_BACK_RDLL_%d", 0x02B00, 4}, 756 {"G3CMCT_LOOP_BACK_WDLL_%d", 0x02B20, 4}, 757 {"G3CMCT_TRAN_WRD_CNT", 0x02B40, 1}, 758 {"G3CMCT_TRAN_AP_CNT", 0x02B48, 1}, 759 {"G3CMCT_G3BIST", 0x02B50, 1}, 760 {"MC_INT_STATUS", 0x03000, 1}, 761 {"MC_INT_MASK", 0x03008, 1}, 762 {"MC_ERR_REG", 0x03010, 1}, 763 {"MC_ERR_MASK", 0x03018, 1}, 764 {"MC_ERR_ALARM", 0x03020, 1}, 765 {"GROCRC_ALARM_REG", 0x03028, 1}, 766 {"GROCRC_ALARM_MASK", 0x03030, 1}, 767 {"GROCRC_ALARM_ALARM", 0x03038, 1}, 768 {"RX_THRESH_CFG_REPL", 0x03100, 1}, 769 {"DBG_REG1_%d", 0x03108, 8}, 770 {"DBG_REG2", 0x03148, 1}, 771 {"DBG_REG3", 0x03150, 1}, 772 {"DBG_REG4", 0x03158, 1}, 773 {"DBG_REG5", 0x03160, 1}, 774 {"RX_QUEUE_CFG", 0x03200, 1}, 775 {"RX_QUEUE_SIZE_Q%d", 0x03208, 15}, 776 {"RX_QUEUE_SIZE_Q15", 0x03280, 0}, 777 {"RX_QUEUE_SIZE_Q16", 0x03288, 0}, 778 {"RX_QUEUE_SIZE_Q17", 0x03290, 0}, 779 {"RX_QUEUE_START_Q%d", 0x032A0, 18}, 780 {"FM_DEFINITION", 0x03330, 1}, 781 {"TRAFFIC_CTRL", 0x03380, 1}, 782 {"XFMD_ARB_CTRL", 0x03388, 1}, 783 {"XFMD_ARB_CTRL1", 0x03390, 1}, 784 {"RD_TRANC_CTRL", 0x03398, 1}, 785 {"FM_ARB", 0x033A0, 1}, 786 {"ARB", 0x033A8, 1}, 787 {"SETTINGS0", 0x033B0, 1}, 788 {"FBMC_ECC_CFG", 0x033B8, 1}, 789 {"PCIPIF_INT_STATUS", 0x03400, 1}, 790 {"PCIPIF_INT_MASK", 0x03408, 1}, 791 {"DBECC_ERR_REG", 0x03410, 1}, 792 {"DBECC_ERR_MASK", 0x03418, 1}, 793 {"DBECC_ERR_ALARM", 0x03420, 1}, 794 {"SBECC_ERR_REG", 0x03428, 1}, 795 {"SBECC_ERR_MASK", 0x03430, 1}, 796 {"SBECC_ERR_ALARM", 0x03438, 1}, 797 {"GENERAL_ERR_REG", 0x03440, 1}, 798 {"GENERAL_ERR_MASK", 0x03448, 1}, 799 {"GENERAL_ERR_ALARM", 0x03450, 1}, 800 {"SRPCIM_MSG_REG", 0x03458, 1}, 801 {"SRPCIM_MSG_MASK", 0x03460, 1}, 802 {"SRPCIM_MSG_ALARM", 0x03468, 1}, 803 {"GCMG1_INT_STATUS", 0x03600, 1}, 804 {"GCMG1_INT_MASK", 0x03608, 1}, 805 {"GSSCC_ERR_REG", 0x03610, 1}, 806 {"GSSCC_ERR_MASK", 0x03618, 1}, 807 {"GSSCC_ERR_ALARM", 0x03620, 1}, 808 {"GSSC_ERR0_REG_%d", 0x03628, 3}, 809 {"GSSC_ERR0_MASK_%d", 0x03630, 3}, 810 {"GSSC_ERR0_ALARM_%d", 0x03638, 3}, 811 {"GSSC_ERR1_REG_%d", 0x03670, 3}, 812 {"GSSC_ERR1_MASK_%d", 0x03678, 3}, 813 {"GSSC_ERR1_ALARM_%d", 0x03680, 3}, 814 {"GQCC_ERR_REG", 0x036B8, 1}, 815 {"GQCC_ERR_MASK", 0x036C0, 1}, 816 {"GQCC_ERR_ALARM", 0x036C8, 1}, 817 {"UQM_ERR_REG", 0x036D0, 1}, 818 {"UQM_ERR_MASK", 0x036D8, 1}, 819 {"UQM_ERR_ALARM", 0x036E0, 1}, 820 {"SSCC_CONFIG", 0x036E8, 1}, 821 {"SSCC_MASK_%d", 0x036F0, 6}, 822 {"GCMG1_ECC", 0x03720, 1}, 823 {"PCMG1_INT_STATUS", 0x03A00, 1}, 824 {"PCMG1_INT_MASK", 0x03A08, 1}, 825 {"PSSCC_ERR_REG", 0x03A10, 1}, 826 {"PSSCC_ERR_MASK", 0x03A18, 1}, 827 {"PSSCC_ERR_ALARM", 0x03A20, 1}, 828 {"PQCC_ERR_REG", 0x03A28, 1}, 829 {"PQCC_ERR_MASK", 0x03A30, 1}, 830 {"PQCC_ERR_ALARM", 0x03A38, 1}, 831 {"PQCC_CQM_ERR_REG", 0x03A40, 1}, 832 {"PQCC_CQM_ERR_MASK", 0x03A48, 1}, 833 {"PQCC_CQM_ERR_ALARM", 0x03A50, 1}, 834 {"PQCC_SQM_ERR_REG", 0x03A58, 1}, 835 {"PQCC_SQM_ERR_MASK", 0x03A60, 1}, 836 {"PQCC_SQM_ERR_ALARM", 0x03A68, 1}, 837 {"QCC_SRQ_CQRQ", 0x03A70, 1}, 838 {"QCC_ERR_POLICY", 0x03A78, 1}, 839 {"QCC_BP_CTRL", 0x03A80, 1}, 840 {"PCMG1_ECC", 0x03A88, 1}, 841 {"QCC_CQM_CQRQ_ID", 0x03A90, 1}, 842 {"QCC_SQM_SRQ_ID", 0x03A98, 1}, 843 {"QCC_CQM_FLM_ID", 0x03AA0, 1}, 844 {"QCC_SQM_FLM_ID", 0x03AA8, 1}, 845 {"ONE_INT_STATUS", 0x04000, 1}, 846 {"ONE_INT_MASK", 0x04008, 1}, 847 {"RPE_ERR_REG", 0x04010, 1}, 848 {"RPE_ERR_MASK", 0x04018, 1}, 849 {"RPE_ERR_ALARM", 0x04020, 1}, 850 {"PE_ERR_REG", 0x04028, 1}, 851 {"PE_ERR_MASK", 0x04030, 1}, 852 {"PE_ERR_ALARM", 0x04038, 1}, 853 {"RXPE_ERR_REG", 0x04040, 1}, 854 {"RXPE_ERR_MASK", 0x04048, 1}, 855 {"RXPE_ERR_ALARM", 0x04050, 1}, 856 {"DLM_ERR_REG", 0x04058, 1}, 857 {"DLM_ERR_MASK", 0x04060, 1}, 858 {"DLM_ERR_ALARM", 0x04068, 1}, 859 {"OES_ERR_REG", 0x04070, 1}, 860 {"OES_ERR_MASK", 0x04078, 1}, 861 {"OES_ERR_ALARM", 0x04080, 1}, 862 {"TXPE_ERR_REG", 0x04088, 1}, 863 {"TXPE_ERR_MASK", 0x04090, 1}, 864 {"TXPE_ERR_ALARM", 0x04098, 1}, 865 {"TXPE_BCC_MEM_SG_ECC_ERR_REG", 0x040A0, 1}, 866 {"TXPE_BCC_MEM_SG_ECC_ERR_MASK", 0x040A8, 1}, 867 {"TXPE_BCC_MEM_SG_ECC_ERR_ALARM", 0x040B0, 1}, 868 {"TXPE_BCC_MEM_DB_ECC_ERR_REG", 0x040B8, 1}, 869 {"TXPE_BCC_MEM_DB_ECC_ERR_MASK", 0x040C0, 1}, 870 {"TXPE_BCC_MEM_DB_ECC_ERR_ALARM", 0x040C8, 1}, 871 {"RPE_FSM_ERR_REG", 0x040D0, 1}, 872 {"RPE_FSM_ERR_MASK", 0x040D8, 1}, 873 {"RPE_FSM_ERR_ALARM", 0x040E0, 1}, 874 {"ONE_CFG", 0x04100, 1}, 875 {"SGRP_ALLOC_%d", 0x04108, 17}, 876 {"SGRP_IWARP_LRO_ALLOC", 0x04190, 1}, 877 {"RPE_CFG0", 0x04198, 1}, 878 {"RPE_CFG1", 0x041A0, 1}, 879 {"RPE_CFG2", 0x041A8, 1}, 880 {"RPE_CFG5", 0x041C0, 1}, 881 {"WQEOWN%d", 0x041C8, 2}, 882 {"RPE_WQEOWN2", 0x041D8, 1}, 883 {"PE_CTXT", 0x04200, 1}, 884 {"PE_CFG", 0x04208, 1}, 885 {"PE_STATS_CMD", 0x04210, 1}, 886 {"PE_STATS_DATA", 0x04218, 1}, 887 {"RXPE_FP_MASK", 0x04220, 1}, 888 {"RXPE_CFG", 0x04228, 1}, 889 {"PE_XT_CTRL%d", 0x04230, 4}, 890 {"PET_IWARP_COUNTERS", 0x04250, 1}, 891 {"PET_IWARP_SLOW_COUNTER", 0x04258, 1}, 892 {"PET_IWARP_TIMERS", 0x04260, 1}, 893 {"PET_LRO_CFG", 0x04268, 1}, 894 {"PET_LRO_COUNTERS", 0x04270, 1}, 895 {"PET_TIMER_BP_CTRL", 0x04278, 1}, 896 {"PE_VP_ACK_%d", 0x04280, 17}, 897 {"PE_VP%d", 0x04308, 17}, 898 {"DLM_CFG", 0x04390, 1}, 899 {"TXPE_TOWI_CFG", 0x04400, 1}, 900 {"TXPE_PMON", 0x04410, 1}, 901 {"TXPE_PMON_DOWNCOUNT", 0x04418, 1}, 902 {"TXPE_PMON_EVENT", 0x04420, 1}, 903 {" TXPE_PMON_OTHER", 0x04428, 1}, 904 {"OES_INEVT", 0x04500, 1}, 905 {"OES_INBKBKEVT", 0x04508, 1}, 906 {"OES_INEVT_WRR%d", 0x04510, 2}, 907 {"OES_PENDEVT", 0x04520, 1}, 908 {"OES_PENDBKBKEVT", 0x04528, 1}, 909 {"OES_PENDEVT_WRR%d", 0x04530, 2}, 910 {"OES_PEND_QUEUE", 0x04540, 1}, 911 {"ROCRC_BYPQ%d_STAT_WATERMARK", 0x04800, 3}, 912 {"NOA_WCT_CTRL", 0x04818, 1}, 913 {"RC_CFG2", 0x04820, 1}, 914 {"RC_CFG3", 0x04828, 1}, 915 {"RX_MULTI_CAST_CTRL1", 0x04830, 1}, 916 {"RXDM_DBG_RD", 0x04838, 1}, 917 {"RXDM_DBG_RD_DATA", 0x04840, 1}, 918 {"RQA_TOP_PRTY_FOR_VH%d", 0x04848, 17}, 919 {"TIM_STATUS", 0x04900, 1}, 920 {"TIM_ECC_ENABLE", 0x04908, 1}, 921 {"TIM_BP_CTRL", 0x04910, 1}, 922 {"TIM_RESOURCE_ASSIGNMENT_VH%d", 0x04918, 17}, 923 {"TIM_BMAP_MAPPING_VP_ERR%d", 0x049A0, 17}, 924 {"GCMG2_INT_STATUS", 0x04B00, 1}, 925 {"GCMG2_INT_MASK", 0x04B08, 1}, 926 {"GXTMC_ERR_REG", 0x04B10, 1}, 927 {"GXTMC_ERR_MASK", 0x04B18, 1}, 928 {"GXTMC_ERR_ALARM", 0x04B20, 1}, 929 {"CMC_ERR_REG", 0x04B28, 1}, 930 {"CMC_ERR_MASK", 0x04B30, 1}, 931 {"CMC_ERR_ALARM", 0x04B38, 1}, 932 {"GCP_ERR_REG", 0x04B40, 1}, 933 {"GCP_ERR_MASK", 0x04B48, 1}, 934 {"GCP_ERR_ALARM", 0x04B50, 1}, 935 {"CMC_L2_CLIENT_UQM_1", 0x04B58, 1}, 936 {"CMC_L2_CLIENT_SSC_L", 0x04B60, 1}, 937 {"CMC_L2_CLIENT_QCC_SQM_0", 0x04B68, 1}, 938 {"CMC_L2_CLIENT_DAM_0", 0x04B70, 1}, 939 {"CMC_L2_CLIENT_H2L_0", 0x04B78, 1}, 940 {"CMC_L2_CLIENT_STC_0", 0x04B80, 1}, 941 {"CMC_L2_CLIENT_XTMC_0", 0x04B88, 1}, 942 {"CMC_WRR_L2_CALENDAR_%d", 0x04B90, 4}, 943 {"CMC_L3_CLIENT_QCC_SQM_1", 0x04BB0, 1}, 944 {"CMC_L3_CLIENT_QCC_CQM", 0x04BB8, 1}, 945 {"CMC_L3_CLIENT_DAM_1", 0x04BC0, 1}, 946 {"CMC_L3_CLIENT_H2L_1", 0x04BC8, 1}, 947 {"CMC_L3_CLIENT_STC_1", 0x04BD0, 1}, 948 {"CMC_L3_CLIENT_XTMC_1", 0x04BD8, 1}, 949 {"CMC_WRR_L3_CALENDAR_%d", 0x04BE0, 3}, 950 {"CMC_USER_DOORBELL_PARTITION", 0x04BF8, 1}, 951 {"CMC_HIT_RECORD_PARTITION_%d", 0x04C00, 8}, 952 {"CMC_C_SCR_RECORD_PARTITION_%d", 0x04C40, 8}, 953 {"CMC_WQE_OD_GROUP_RECORD_PARTITION", 0x04C80, 1}, 954 {"CMC_ACK_RECORD_PARTITION", 0x04C88, 1}, 955 {"CMC_LIRR_RECORD_PARTITION", 0x04C90, 1}, 956 {"CMC_RIRR_RECORD_PARTITION", 0x04C98, 1}, 957 {"CMC_TCE_RECORD_PARTITION", 0x04CA0, 1}, 958 {"CMC_HOQ_RECORD_PARTITION", 0x04CA8, 1}, 959 {"CMC_STAG_VP_RECORD_PARTITION_%d", 0x04CB0, 17}, 960 {"CMC_R_SCR_RECORD_PARTITION", 0x04D38, 1}, 961 {"CMC_CQRQ_CONTEXT_RECORD_PARTITION", 0x04D40, 1}, 962 {"CMC_CQE_GROUP_RECORD_PARTITION", 0x04D48, 1}, 963 {"CMC_P_SCR_RECORD_PARTITION", 0x04D50, 1}, 964 {"CMC_NCE_CONTEXT_RECORD_PARTITION", 0x04D58, 1}, 965 {"CMC_BYPASS_QUEUE_PARTITION", 0x04D60, 1}, 966 {"CMC_H_SCR_RECORD_PARTITION", 0x04D68, 1}, 967 {"CMC_PBL_RECORD_PARTITION", 0x04D70, 1}, 968 {"CMC_LIT_RECORD_PARTITION", 0x04D78, 1}, 969 {"CMC_SRQ_CONTEXT_RECORD_PARTITION", 0x04D80, 1}, 970 {"CMC_P_SCR_RECORD", 0x04D88, 1}, 971 {"CMC_DEVICE_SELECT", 0x04D90, 1}, 972 {"G3IF_FIFO_DST_ECC", 0x04D98, 1}, 973 {"GXTMC_CFG", 0x04DA0, 1}, 974 {"PCMG2_INT_STATUS", 0x04F00, 1}, 975 {"PCMG2_INT_MASK", 0x04F08, 1}, 976 {"PXTMC_ERR_REG", 0x04F10, 1}, 977 {"PXTMC_ERR_MASK", 0x04F18, 1}, 978 {"PXTMC_ERR_ALARM", 0x04F20, 1}, 979 {"CP_ERR_REG", 0x04F28, 1}, 980 {"CP_ERR_MASK", 0x04F30, 1}, 981 {"CP_ERR_ALARM", 0x04F38, 1}, 982 {"CP_XT_CTRL1", 0x04F40, 1}, 983 {"CP_GEN_CFG", 0x04F48, 1}, 984 {"CP_EXC_REG", 0x04F50, 1}, 985 {"CP_EXC_MASK", 0x04F58, 1}, 986 {"CP_EXC_ALARM", 0x04F60, 1}, 987 {"CP_EXC_CAUSE", 0x04F68, 1}, 988 {"XTMC_IMG_CTRL%d", 0x04FE8, 5}, 989 {"PXTMC_CFG0%d", 0x05010, 2}, 990 {"XTMC_MEM_CFG", 0x05020, 1}, 991 {"XTMC_MEM_BYPASS_CFG", 0x05028, 1}, 992 {"XTMC_CXP_REGION0", 0x05030, 1}, 993 {"XTMC_MXP_REGION0", 0x05038, 1}, 994 {"XTMC_UXP_REGION0", 0x05040, 1}, 995 {"XTMC_CXP_REGION1", 0x05048, 1}, 996 {"XTMC_MXP_REGION1", 0x05050, 1}, 997 {"XTMC_UXP_REGION1", 0x05058, 1}, 998 {"XTMC_CXP_REGION2", 0x05060, 1}, 999 {"XTMC_MXP_REGION2", 0x05068, 1}, 1000 {"XTMC_UXP_REGION2", 0x05070, 1}, 1001 {"MSG_INT_STATUS", 0x05200, 1}, 1002 {"MSG_INT_MASK", 0x05208, 1}, 1003 {"TIM_ERR_REG", 0x05210, 1}, 1004 {"TIM_ERR_MASK", 0x05218, 1}, 1005 {"TIM_ERR_ALARM", 0x05220, 1}, 1006 {"MSG_ERR_REG", 0x05228, 1}, 1007 {"MSG_ERR_MASK", 0x05230, 1}, 1008 {"MSG_ERR_ALARM", 0x05238, 1}, 1009 {"MSG_XT_CTRL", 0x05240, 1}, 1010 {"MSG_DISPATCH", 0x052A8, 1}, 1011 {"MSG_EXC_REG", 0x05340, 1}, 1012 {"MSG_EXC_MASK", 0x05348, 1}, 1013 {"MSG_EXC_ALARM", 0x05350, 1}, 1014 {"MSG_EXC_CAUSE", 0x05358, 1}, 1015 {"MSG_DIRECT_PIC", 0x05368, 1}, 1016 {"UMQ_IR_TEST_VPA", 0x05370, 1}, 1017 {"UMQ_IR_TEST_BYTE", 0x05378, 1}, 1018 {"MSG_ERR2_REG", 0x05380, 1}, 1019 {"MSG_ERR2_MASK", 0x05388, 1}, 1020 {"MSG_ERR2_ALARM", 0x05390, 1}, 1021 {"MSG_ERR3_REG", 0x05398, 1}, 1022 {"MSG_ERR3_MASK", 0x053A0, 1}, 1023 {"MSG_ERR3_ALARM", 0x053A8, 1}, 1024 {"UMQ_IR_TEST_BYTE_NOTIFY", 0x053B0, 1}, 1025 {"MSG_BP_CTRL", 0x053B8, 1}, 1026 {"UMQ_BWR_PFCH_INIT_%d", 0x053C0, 17}, 1027 {"UMQ_BWR_PFCH_INIT_NOTIFY_%d", 0x05448, 17}, 1028 {"UMQ_BWR_EOL", 0x054D0, 1}, 1029 {"UMQ_BWR_EOL_LATENCY_NOTIFY", 0x054D8, 1}, 1030 {"FAU_GEN_ERR_REG", 0x05600, 1}, 1031 {"FAU_GEN_ERR_MASK", 0x05608, 1}, 1032 {"FAU_GEN_ERR_ALARM", 0x05610, 1}, 1033 {"FAU_ECC_ERR_REG", 0x05618, 1}, 1034 {"FAU_ECC_ERR_MASK", 0x05620, 1}, 1035 {"FAU_ECC_ERR_ALARM", 0x05628, 1}, 1036 {"FAU_GLOBAL_CFG", 0x05648, 1}, 1037 {"RX_DATAPATH_UTIL", 0x05650, 1}, 1038 {"FAU_PA_CFG", 0x05658, 1}, 1039 {"DBG_STATS_FAU_RX_PATH", 0x05668, 1}, 1040 {"FAU_AUTO_LRO_CONTROL", 0x05670, 1}, 1041 {"FAU_AUTO_LRO_DATA_%d", 0x05678, 5}, 1042 {"FAU_LAG_CFG", 0x056C0, 1}, 1043 {"FAU_MPA_CFG", 0x05700, 1}, 1044 {"XMAC_RX_XGMII_CAPTURE_DATA_PORT%d", 0x057A0, 3}, 1045 {"TPA_INT_STATUS", 0x05800, 1}, 1046 {"TPA_INT_MASK", 0x05808, 1}, 1047 {"ORP_ERR_REG", 0x05810, 1}, 1048 {"ORP_ERR_MASK", 0x05818, 1}, 1049 {"ORP_ERR_ALARM", 0x05820, 1}, 1050 {"PTM_ALARM_REG", 0x05828, 1}, 1051 {"PTM_ALARM_MASK", 0x05830, 1}, 1052 {"PTM_ALARM_ALARM", 0x05838, 1}, 1053 {"TPA_ERROR_REG", 0x05840, 1}, 1054 {"TPA_ERROR_MASK", 0x05848, 1}, 1055 {"TPA_ERROR_ALARM", 0x05850, 1}, 1056 {"TPA_GLOBAL_CFG", 0x05858, 1}, 1057 {"TX_DATAPATH_UTIL", 0x05860, 1}, 1058 {"ORP_CFG", 0x05868, 1}, 1059 {"PTM_ECC_CFG", 0x05870, 1}, 1060 {"PTM_PHASE_CFG", 0x05878, 1}, 1061 {"ORP_LRO_EVENTS", 0x05880, 1}, 1062 {"ORP_BS_EVENTS", 0x05888, 1}, 1063 {"ORP_IWARP_EVENTS", 0x05890, 1}, 1064 {"DBG_STATS_TPA_TX_PATH", 0x05898, 1}, 1065 {"TMAC_INT_STATUS", 0x05900, 1}, 1066 {"TMAC_INT_MASK", 0x05908, 1}, 1067 {"TXMAC_GEN_ERR_REG", 0x05910, 1}, 1068 {"TXMAC_GEN_ERR_MASK", 0x05918, 1}, 1069 {"TXMAC_GEN_ERR_ALARM", 0x05920, 1}, 1070 {"TXMAC_ECC_ERR_REG", 0x05928, 1}, 1071 {"TXMAC_ECC_ERR_MASK", 0x05930, 1}, 1072 {"TXMAC_ECC_ERR_ALARM", 0x05938, 1}, 1073 {"TXMAC_GEN_CFG1", 0x05948, 1}, 1074 {"TXMAC_ERR_INJECT_CFG", 0x05958, 1}, 1075 {"TXMAC_FRMGEN_CFG", 0x05960, 1}, 1076 {"TXMAC_FRMGEN_CONTENTS", 0x05968, 1}, 1077 {"TXMAC_FRMGEN_DATA", 0x05970, 1}, 1078 {"DBG_STAT_TX_ANY_FRMS", 0x05978, 1}, 1079 {"TXMAC_LINK_UTIL_PORT%d", 0x059A0, 3}, 1080 {"TXMAC_CFG0_PORT%d", 0x059B8, 3}, 1081 {"TXMAC_CFG1_PORT%d", 0x059D0, 3}, 1082 {"TXMAC_STATUS_PORT%d", 0x059E8, 3}, 1083 {"LAG_DISTRIB_DEST", 0x05A20, 1}, 1084 {"LAG_MARKER_CFG", 0x05A28, 1}, 1085 {"LAG_TX_CFG", 0x05A30, 1}, 1086 {"LAG_TX_STATUS", 0x05A38, 1}, 1087 {"TXMAC_STATS_TX_XGMII_CHAR", 0x05A50, 1}, 1088 {"TXMAC_STATS_TX_XGMII_COLUMN1", 0x05A58, 1}, 1089 {"TXMAC_STATS_TX_XGMII_COLUMN2", 0x05A60, 1}, 1090 {"TXMAC_STATS_TX_XGMII_BEHAV_COLUMN2", 0x05A68, 1}, 1091 {"SHAREDIO_STATUS", 0x05B00, 1}, 1092 {"CRDT_STATUS1_VPLANE%d", 0x05B08, 17}, 1093 {"CRDT_STATUS2_VPLANE%d", 0x05B90, 17}, 1094 {"CRDT_STATUS3_VPLANE%d", 0x05C18, 17}, 1095 {"CRDT_STATUS4_VPLANE%d", 0x05CA0, 17}, 1096 {"CRDT_STATUS5", 0x05D28, 1}, 1097 {"CRDT_STATUS6", 0x05D30, 1}, 1098 {"CRDT_STATUS7", 0x05D38, 1}, 1099 {"CRDT_STATUS8", 0x05D40, 1}, 1100 {"SRPCIM_TO_MRPCIM_VPLANE_RMSG_%d", 0x05D48, 17}, 1101 {"PCIE_LANE_CFG1", 0x06000, 1}, 1102 {"PCIE_LANE_CFG2", 0x06008, 1}, 1103 {"PCICFG_NO_TO_FUNC_CFG_%d", 0x06010, 25}, 1104 {"RESOURCE_TO_VPLANE_CFG_%d", 0x060D8, 17}, 1105 {"PCICFG_NO_TO_VPLANE_CFG_%d", 0x06160, 25}, 1106 {"GENERAL_CFG", 0x06228, 1}, 1107 {"START_BIST", 0x06230, 1}, 1108 {"BIST_CFG", 0x06238, 1}, 1109 {"PCI_LINK_CONTROL", 0x06240, 1}, 1110 {"SHOW_SRIOV_CAP", 0x06248, 1}, 1111 {"LINK_RST_WAIT_CNT", 0x06250, 1}, 1112 {"PCIE_BASED_CRDT_CFG1", 0x06258, 1}, 1113 {"PCIE_BASED_CRDT_CFG2", 0x06260, 1}, 1114 {"SHAREDIO_ABS_BASED_CRDT_CFG1_VPLANE%d", 0x06268, 17}, 1115 {"SHAREDIO_ABS_BASED_CRDT_CFG2_VPLANE%d", 0x062F0, 17}, 1116 {"ARBITER_CFG", 0x06378, 1}, 1117 {"SERDES_CFG1", 0x06380, 1}, 1118 {"SERDES_CFG2", 0x06388, 1}, 1119 {"SERDES_CFG3", 0x06390, 1}, 1120 {"VHLABEL_TO_VPLANE_CFG_%d", 0x06398, 17}, 1121 {"MRPCIM_TO_SRPCIM_VPLANE_WMSG_%d", 0x06420, 17}, 1122 {"MRPCIM_TO_SRPCIM_VPLANE_WMSG_TRIG_%d", 0x064A8, 17}, 1123 {"DEBUG_STATS%d", 0x06530, 3}, 1124 {"DEBUG_STATS3_VPLANE%d", 0x06548, 17}, 1125 {"DEBUG_STATS4_VPLANE%d", 0x065D0, 17}, 1126 {"RC_RXDMEM_END_OFST_%d", 0x06B00, 16}, 1127 {"MRPCIM_GENERAL_INT_STATUS", 0x07000, 1}, 1128 {"MRPCIM_GENERAL_INT_MASK", 0x07008, 1}, 1129 {"MRPCIM_PPIF_INT_STATUS", 0x07010, 1}, 1130 {"MRPCIM_PPIF_INT_MASK", 0x07018, 1}, 1131 {"INI_ERRORS_REG", 0x07028, 1}, 1132 {"INI_ERRORS_MASK", 0x07030, 1}, 1133 {"INI_ERRORS_ALARM", 0x07038, 1}, 1134 {"DMA_ERRORS_REG", 0x07040, 1}, 1135 {"DMA_ERRORS_MASK", 0x07048, 1}, 1136 {"DMA_ERRORS_ALARM", 0x07050, 1}, 1137 {"TGT_ERRORS_REG", 0x07058, 1}, 1138 {"TGT_ERRORS_MASK", 0x07060, 1}, 1139 {"TGT_ERRORS_ALARM", 0x07068, 1}, 1140 {"CONFIG_ERRORS_REG", 0x07070, 1}, 1141 {"CONFIG_ERRORS_MASK", 0x07078, 1}, 1142 {"CONFIG_ERRORS_ALARM", 0x07080, 1}, 1143 {"CRDT_ERRORS_REG", 0x07090, 1}, 1144 {"CRDT_ERRORS_MASK", 0x07098, 1}, 1145 {"CRDT_ERRORS_ALARM", 0x070A0, 1}, 1146 {"MRPCIM_GENERAL_ERRORS_REG", 0x070B0, 1}, 1147 {"MRPCIM_GENERAL_ERRORS_MASK", 0x070B8, 1}, 1148 {"MRPCIM_GENERAL_ERRORS_ALARM", 0x070C0, 1}, 1149 {"PLL_ERRORS_REG", 0x070D0, 1}, 1150 {"PLL_ERRORS_MASK", 0x070D8, 1}, 1151 {"PLL_ERRORS_ALARM", 0x070E0, 1}, 1152 {"SRPCIM_TO_MRPCIM_ALARM_REG", 0x070E8, 1}, 1153 {"SRPCIM_TO_MRPCIM_ALARM_MASK", 0x070F0, 1}, 1154 {"SRPCIM_TO_MRPCIM_ALARM_ALARM", 0x070F8, 1}, 1155 {"VPATH_TO_MRPCIM_ALARM_REG", 0x07100, 1}, 1156 {"VPATH_TO_MRPCIM_ALARM_MASK", 0x07108, 1}, 1157 {"VPATH_TO_MRPCIM_ALARM_ALARM", 0x07110, 1}, 1158 {"CRDT_ERRORS_VPLANE_REG_%d", 0x07128, 17}, 1159 {"CRDT_ERRORS_VPLANE_MASK_%d", 0x07130, 17}, 1160 {"CRDT_ERRORS_VPLANE_ALARM_%d", 0x07138, 17}, 1161 {"MRPCIM_RST_IN_PROG", 0x072F0, 1}, 1162 {"MRPCIM_REG_MODIFIED", 0x072F8, 1}, 1163 {"SPLIT_TABLE_STATUS1", 0x07300, 1}, 1164 {"SPLIT_TABLE_STATUS2", 0x07308, 1}, 1165 {"SPLIT_TABLE_STATUS3", 0x07310, 1}, 1166 {"MRPCIM_GENERAL_STATUS1", 0x07318, 1}, 1167 {"MRPCIM_GENERAL_STATUS2", 0x07320, 1}, 1168 {"MRPCIM_GENERAL_STATUS3", 0x07328, 1}, 1169 {"TEST_STATUS", 0x07338, 1}, 1170 {"KDFCCTL_DBG_STATUS", 0x07348, 1}, 1171 {"MSIX_ADDR", 0x07350, 1}, 1172 {"MSIX_TABLE", 0x07358, 1}, 1173 {"MSIX_CTL", 0x07360, 1}, 1174 {"MSIX_ACCESS_TABLE", 0x07368, 1}, 1175 {"WRITE_ARB_PENDING", 0x07378, 1}, 1176 {"READ_ARB_PENDING", 0x07380, 1}, 1177 {"DMAIF_DMADBL_PENDING", 0x07388, 1}, 1178 {"WRCRDTARB_STATUS0_VPLANE%d", 0x07390, 17}, 1179 {"WRCRDTARB_STATUS1_VPLANE%d", 0x07418, 17}, 1180 {"MRPCIM_GENERAL_CFG1", 0x07500, 1}, 1181 {"MRPCIM_GENERAL_CFG2", 0x07508, 1}, 1182 {"MRPCIM_GENERAL_CFG3", 0x07510, 1}, 1183 {"MRPCIM_STATS_START_HOST_ADDR", 0x07518, 1}, 1184 {"ASIC_MODE", 0x07520, 1}, 1185 {"DIS_FW_PIPELINE_WR", 0x07528, 1}, 1186 {"INI_TIMEOUT_VAL", 0x07530, 1}, 1187 {"PIC_ARBITER_CFG", 0x07538, 1}, 1188 {"READ_ARBITER", 0x07540, 1}, 1189 {"WRITE_ARBITER", 0x07548, 1}, 1190 {"ADAPTER_CONTROL", 0x07550, 1}, 1191 {"PROGRAM_CFG0", 0x07558, 1}, 1192 {"PROGRAM_CFG1", 0x07560, 1}, 1193 {"DBLGEN_WRR_CFG%d", 0x07568, 21}, 1194 {"DEBUG_CFG1", 0x07608, 1}, 1195 {"TEST_CFG1%d", 0x07900, 3}, 1196 {"WRCRDTARB_CFG%d", 0x07918, 3}, 1197 {"TEST_WRCRDTARB_CFG%d", 0x07930, 4}, 1198 {"RDCRDTARB_CFG%d", 0x07950, 3}, 1199 {"TEST_RDCRDTARB_CFG%d", 0x07968, 4}, 1200 {"PIC_DEBUG_CONTROL", 0x07988, 1}, 1201 {"SPI_CONTROL_3_REG", 0x079D8, 1}, 1202 {"CLOCK_CFG0", 0x079E0, 1}, 1203 {"STATS_BP_CTRL", 0x079E8, 1}, 1204 {"KDFCDMA_BP_CTRL", 0x079F0, 1}, 1205 {"INTCTL_BP_CTRL", 0x079F8, 1}, 1206 {"VECTOR_SRPCIM_ALARM_MAP_%d", 0x07A00, 9}, 1207 {"VPLANE_RDCRDTARB_CFG0_%d", 0x07B10, 17}, 1208 {"MRPCIM_SPI_CONTROL", 0x07BA0, 1}, 1209 {"MRPCIM_SPI_DATA", 0x07BA8, 1}, 1210 {"MRPCIM_SPI_WRITE_PROTECT", 0x07BB0, 1}, 1211 {"CHIP_FULL_RESET", 0x07BE0, 1}, 1212 {"BF_SW_RESET", 0x07BE8, 1}, 1213 {"SW_RESET_STATUS", 0x07BF0, 1}, 1214 {"RIC_TIMEOUT", 0x07C28, 1}, 1215 {"MRPCIM_PCI_CONFIG_ACCESS_CFG1", 0x07C30, 1}, 1216 {"MRPCIM_PCI_CONFIG_ACCESS_CFG2", 0x07C38, 1}, 1217 {"MRPCIM_PCI_CONFIG_ACCESS_STATUS", 0x07C40, 1}, 1218 {"RDCRDTARB_STATUS0_VPLANE%d", 0x07CA8, 17}, 1219 {"MRPCIM_DEBUG_STATS0", 0x07D30, 1}, 1220 {"MRPCIM_DEBUG_STATS1_VPLANE%d", 0x07D38, 17}, 1221 {"MRPCIM_DEBUG_STATS2_VPLANE%d", 0x07DC0, 17}, 1222 {"MRPCIM_DEBUG_STATS3_VPLANE%d", 0x07E48, 17}, 1223 {"MRPCIM_DEBUG_STATS4", 0x07ED0, 1}, 1224 {"GENSTATS_COUNT01", 0x07ED8, 1}, 1225 {"GENSTATS_COUNT23", 0x07EE0, 1}, 1226 {"GENSTATS_COUNT4", 0x07EE8, 1}, 1227 {"GENSTATS_COUNT5", 0x07EF0, 1}, 1228 {"MRPCIM_MMIO_CFG1", 0x07EF8, 1}, 1229 {"MRPCIM_MMIO_CFG2", 0x07F00, 1}, 1230 {"GENSTATS_CFG_%d", 0x07F08, 6}, 1231 {"GENSTAT_64BIT_CFG", 0x07F38, 1}, 1232 {"PLL_SLIP_COUNTERS", 0x07F40, 1}, 1233 {"GCMG3_INT_STATUS", 0x08000, 1}, 1234 {"GCMG3_INT_MASK", 0x08008, 1}, 1235 {"GSTC_ERR0_REG", 0x08010, 1}, 1236 {"GSTC_ERR0_MASK", 0x08018, 1}, 1237 {"GSTC_ERR0_ALARM", 0x08020, 1}, 1238 {"GSTC_ERR1_REG", 0x08028, 1}, 1239 {"GSTC_ERR1_MASK", 0x08030, 1}, 1240 {"GSTC_ERR1_ALARM", 0x08038, 1}, 1241 {"GH2L_ERR0_REG", 0x08040, 1}, 1242 {"GH2L_ERR0_MASK", 0x08048, 1}, 1243 {"GH2L_ERR0_ALARM", 0x08050, 1}, 1244 {"GHSQ_ERR_REG", 0x08058, 1}, 1245 {"GHSQ_ERR_MASK", 0x08060, 1}, 1246 {"GHSQ_ERR_ALARM", 0x08068, 1}, 1247 {"GHSQ_ERR2_REG", 0x08070, 1}, 1248 {"GHSQ_ERR2_MASK", 0x08078, 1}, 1249 {"GHSQ_ERR2_ALARM", 0x08080, 1}, 1250 {"GHSQ_ERR3_REG", 0x08088, 1}, 1251 {"GHSQ_ERR3_MASK", 0x08090, 1}, 1252 {"GHSQ_ERR3_ALARM", 0x08098, 1}, 1253 {"GH2L_SMERR0_REG", 0x080A0, 1}, 1254 {"GH2L_SMERR0_MASK", 0x080A8, 1}, 1255 {"GH2L_SMERR0_ALARM", 0x080B0, 1}, 1256 {"HCC_ALARM_REG", 0x080B8, 1}, 1257 {"HCC_ALARM_MASK", 0x080C0, 1}, 1258 {"HCC_ALARM_ALARM", 0x080C8, 1}, 1259 {"GSTC_CFG%d", 0x080D0, 3}, 1260 {"STC_ARB_CFG%d", 0x080E8, 4}, 1261 {"STC_JHASH_CFG", 0x08108, 1}, 1262 {"STC_SMI_ARB_CFG%d", 0x08110, 2}, 1263 {"STC_CAA_ARB_CFG0%d", 0x08120, 2}, 1264 {"STC_ECI_ARB_CFG0%d", 0x08130, 2}, 1265 {"STC_ECI_CFG0", 0x08140, 1}, 1266 {"STC_PRM_CFG0", 0x08148, 1}, 1267 {"H2L_MISC_CFG", 0x08150, 1}, 1268 {"HSQ_CFG_%d", 0x08158, 17}, 1269 {"USDC_VPBP_CFG", 0x081E0, 1}, 1270 {"KDFC_VPBP_CFG", 0x081E8, 1}, 1271 {"TXPE_VPBP_CFG", 0x081F0, 1}, 1272 {"ONE_VPBP_CFG", 0x081F8, 1}, 1273 {"HOPARB_WRR_CTRL_%d", 0x08200, 20}, 1274 {"HOPARB_WRR_CMP_%d", 0x082A0, 3}, 1275 {"HOP_BCK_STATS0", 0x082E8, 1}, 1276 {"PCMG3_INT_STATUS", 0x08400, 1}, 1277 {"PCMG3_INT_MASK", 0x08408, 1}, 1278 {"DAM_ERR_REG", 0x08410, 1}, 1279 {"DAM_ERR_MASK", 0x08418, 1}, 1280 {"DAM_ERR_ALARM", 0x08420, 1}, 1281 {"PSTC_ERR_REG", 0x08428, 1}, 1282 {"PSTC_ERR_MASK", 0x08430, 1}, 1283 {"PSTC_ERR_ALARM", 0x08438, 1}, 1284 {"PH2L_ERR0_REG", 0x08440, 1}, 1285 {"PH2L_ERR0_MASK", 0x08448, 1}, 1286 {"PH2L_ERR0_ALARM", 0x08450, 1}, 1287 {"DAM_BYPASS_QUEUE_%d", 0x08458, 3}, 1288 {"DAM_ECC_CTRL", 0x08470, 1}, 1289 {"PH2L_CFG0", 0x08478, 1}, 1290 {"PSTC_CFG0", 0x08480, 1}, 1291 {"NETERION_MEMBIST_CONTROL", 0x08510, 1}, 1292 {"NETERION_MEMBIST_ERRORS", 0x08518, 1}, 1293 {"RR_CQM_CACHE_RTL_TOP_0", 0x08520, 1}, 1294 {"RR_CQM_CACHE_RTL_TOP_1", 0x08528, 1}, 1295 {"RR_SQM_CACHE_RTL_TOP_0", 0x08530, 1}, 1296 {"RR_SQM_CACHE_RTL_TOP_1", 0x08538, 1}, 1297 {"RF_SQM_LPRPEDAT_RTL_TOP_0", 0x08540, 1}, 1298 {"RF_SQM_LPRPEDAT_RTL_TOP_1", 0x08548, 1}, 1299 {"RR_SQM_DMAWQERSP_RTL_TOP_0", 0x08550, 1}, 1300 {"RR_SQM_DMAWQERSP_RTL_TOP_1", 0x08558, 1}, 1301 {"RF_CQM_DMACQERSP_RTL_TOP", 0x08560, 1}, 1302 {"RF_SQM_RPEREQDAT_RTL_TOP_0", 0x08568, 1}, 1303 {"RF_SQM_RPEREQDAT_RTL_TOP_1", 0x08570, 1}, 1304 {"RF_SSCC_SSR_RTL_TOP_0_0", 0x08578, 1}, 1305 {"RF_SSCC_SSR_RTL_TOP_1_0", 0x08580, 1}, 1306 {"RF_SSCC_SSR_RTL_TOP_0_1", 0x08588, 1}, 1307 {"RF_SSCC_SSR_RTL_TOP_1_1", 0x08590, 1}, 1308 {"RF_SSC_CM_RESP_RTL_TOP_1_SSC0", 0x08598, 1}, 1309 {"RF_SSC_CM_RESP_RTL_TOP_0_SSC1", 0x085A0, 1}, 1310 {"RF_SSC_CM_RESP_RTL_TOP_1_SSCL", 0x085A8, 1}, 1311 {"RF_SSC_CM_RESP_RTL_TOP_0_SSC0", 0x085B0, 1}, 1312 {"RF_SSC_CM_RESP_RTL_TOP_1_SSC1", 0x085B8, 1}, 1313 {"RF_SSC_CM_RESP_RTL_TOP_0_SSCL", 0x085C0, 1}, 1314 {"RF_SSC_SSR_RESP_RTL_TOP_SSC0", 0x085C8, 1}, 1315 {"RF_SSC_SSR_RESP_RTL_TOP_SSC1", 0x085D0, 1}, 1316 {"RF_SSC_SSR_RESP_RTL_TOP_SSCL", 0x085D8, 1}, 1317 {"RF_SSC_TSR_RESP_RTL_TOP_1_SSC0", 0x085E0, 1}, 1318 {"RF_SSC_TSR_RESP_RTL_TOP_2_SSC0", 0x085E8, 1}, 1319 {"RF_SSC_TSR_RESP_RTL_TOP_2_SSC1", 0x085F0, 1}, 1320 {"RF_SSC_TSR_RESP_RTL_TOP_0_SSCL", 0x085F8, 1}, 1321 {"RF_SSC_TSR_RESP_RTL_TOP_0_SSC0", 0x08600, 1}, 1322 {"RF_SSC_TSR_RESP_RTL_TOP_0_SSC1", 0x08608, 1}, 1323 {" RF_SSC_TSR_RESP_RTL_TOP_1_SSC1", 0x08610, 1}, 1324 {"RF_SSC_TSR_RESP_RTL_TOP_1_SSCL", 0x08618, 1}, 1325 {"RF_SSC_TSR_RESP_RTL_TOP_2_SSCL", 0x08620, 1}, 1326 {"RF_SSC_STATE_RTL_TOP_1_SSC0", 0x08628, 1}, 1327 {"RF_SSC_STATE_RTL_TOP_2_SSC0", 0x08630, 1}, 1328 {"RF_SSC_STATE_RTL_TOP_1_SSC1", 0x08638, 1}, 1329 {"RF_SSC_STATE_RTL_TOP_2_SSC1", 0x08640, 1}, 1330 {"RF_SSC_STATE_RTL_TOP_1_SSCL", 0x08648, 1}, 1331 {"RF_SSC_STATE_RTL_TOP_2_SSCL", 0x08650, 1}, 1332 {"RF_SSC_STATE_RTL_TOP_0_SSC0", 0x08658, 1}, 1333 {"RF_SSC_STATE_RTL_TOP_3_SSC0", 0x08660, 1}, 1334 {"RF_SSC_STATE_RTL_TOP_0_SSC1", 0x08668, 1}, 1335 {"RF_SSC_STATE_RTL_TOP_3_SSC1", 0x08670, 1}, 1336 {"RF_SSC_STATE_RTL_TOP_0_SSCL", 0x08678, 1}, 1337 {"RF_SSC_STATE_RTL_TOP_3_SSCL", 0x08680, 1}, 1338 {"RF_SSCC_TSR_RTL_TOP_%d", 0x08688, 3}, 1339 {"RF_UQM_CMCREQ_RTL_TOP", 0x086A0, 1}, 1340 {"RR%d_G3IF_CM_CTRL_RTL_TOP", 0x086A8, 3}, 1341 {"RF_G3IF_CM_RD_RTL_TOP%d", 0x086C0, 3}, 1342 {"RF_CMG_MSG2CMG_RTL_TOP_0_0", 0x086D8, 1}, 1343 {"RF_CMG_MSG2CMG_RTL_TOP_1_0", 0x086E0, 1}, 1344 {"RF_CMG_MSG2CMG_RTL_TOP_0_1", 0x086E8, 1}, 1345 {"RF_CMG_MSG2CMG_RTL_TOP_1_1", 0x086F0, 1}, 1346 {"RF_CP_DMA_RESP_RTL_TOP_0", 0x086F8, 1}, 1347 {"RF_CP_DMA_RESP_RTL_TOP_1", 0x08700, 1}, 1348 {"RF_CP_DMA_RESP_RTL_TOP_2", 0x08708, 1}, 1349 {"RF_CP_QCC2CXP_RTL_TOP", 0x08710, 1}, 1350 {"RF_CP_STC2CP_RTL_TOP", 0x08718, 1}, 1351 {"RF_CP_XT_TRACE_RTL_TOP", 0x08720, 1}, 1352 {"RF_CP_XT_DTAG_RTL_TOP", 0x08728, 1}, 1353 {"RF_CP_XT_ICACHE_RTL_TOP_0_0", 0x08730, 1}, 1354 {"RF_CP_XT_ICACHE_RTL_TOP_1_0", 0x08738, 1}, 1355 {"RF_CP_XT_ICACHE_RTL_TOP_0_1", 0x08740, 1}, 1356 {"RF_CP_XT_ICACHE_RTL_TOP_1_1", 0x08748, 1}, 1357 {"RF_CP_XT_ITAG_RTL_TOP", 0x08750, 1}, 1358 {"RF_CP_XT_DCACHE_RTL_TOP_0_0", 0x08758, 1}, 1359 {"RF_CP_XT_DCACHE_RTL_TOP_1_0", 0x08760, 1}, 1360 {"RF_CP_XT_DCACHE_RTL_TOP_0_1", 0x08768, 1}, 1361 {"RF_CP_XT_DCACHE_RTL_TOP_1_1", 0x08770, 1}, 1362 {"RF_XTMC_BDT_MEM_RTL_TOP_0", 0x08778, 1}, 1363 {"RF_XTMC_BDT_MEM_RTL_TOP_1", 0x08780, 1}, 1364 {"RF_XT_PIF_SRAM_RTL_TOP_SRAM0", 0x08788, 1}, 1365 {"RF_XT_PIF_SRAM_RTL_TOP_SRAM1", 0x08790, 1}, 1366 {"RF_STC_SRCH_MEM_RTL_TOP_0_0", 0x08798, 1}, 1367 {"RF_STC_SRCH_MEM_RTL_TOP_1_0", 0x087A0, 1}, 1368 {"RF_STC_SRCH_MEM_RTL_TOP_0_1", 0x087A8, 1}, 1369 {"RF_STC_SRCH_MEM_RTL_TOP_1_1", 0x087B0, 1}, 1370 {"RF_DAM_WRRESP_RTL_TOP", 0x087B8, 1}, 1371 {"RF_DAM_RDSB_FIFO_RTL_TOP", 0x087C0, 1}, 1372 {"RF_DAM_WRSB_FIFO_RTL_TOP", 0x087C8, 1}, 1373 {"RR_DBF_LADD_0_DBL_RTL_TOP", 0x087D0, 1}, 1374 {"RR_DBF_LADD_1_DBL_RTL_TOP", 0x087D8, 1}, 1375 {"RR_DBF_LADD_2_DBL_RTL_TOP", 0x087E0, 1}, 1376 {"RR_DBF_HADD_0_DBL_RTL_TOP", 0x087E8, 1}, 1377 {"RR_DBF_HADD_1_DBL_RTL_TOP", 0x087F0, 1}, 1378 {"RR_DBF_HADD_2_DBL_RTL_TOP", 0x087F8, 1}, 1379 {"RF_USDC_0_FIFO_RTL_TOP", 0x08800, 1}, 1380 {"RF_USDC_1_FIFO_RTL_TOP", 0x08808, 1}, 1381 {"RF_USDC_0_WA_RTL_TOP", 0x08810, 1}, 1382 {"RF_USDC_1_WA_RTL_TOP", 0x08818, 1}, 1383 {"RF_USDC_0_SA_RTL_TOP", 0x08820, 1}, 1384 {"RF_USDC_1_SA_RTL_TOP", 0x08828, 1}, 1385 {"RF_USDC_0_CA_RTL_TOP", 0x08830, 1}, 1386 {"RF_USDC_1_CA_RTL_TOP", 0x08838, 1}, 1387 {"RF_G3IF_FB_RD1", 0x08840, 1}, 1388 {"RF_G3IF_FB_RD2", 0x08848, 1}, 1389 {"RF_G3IF_FB_CTRL_RTL_TOP1", 0x08850, 1}, 1390 {"RF_G3IF_FB_CTRL_RTL_TOP", 0x08858, 1}, 1391 {"RR_ROCRC_FRMBUF_RTL_TOP_0", 0x08860, 1}, 1392 {"RR_ROCRC_FRMBUF_RTL_TOP_1", 0x08868, 1}, 1393 {"RR_FAU_XFMD_INS_RTL_TOP", 0x08870, 1}, 1394 {"RF_FBMC_XFMD_RTL_TOP_A1", 0x08878, 1}, 1395 {"RF_FBMC_XFMD_RTL_TOP_A2", 0x08880, 1}, 1396 {"RF_FBMC_XFMD_RTL_TOP_A3", 0x08888, 1}, 1397 {"RF_FBMC_XFMD_RTL_TOP_B1", 0x08890, 1}, 1398 {"RF_FBMC_XFMD_RTL_TOP_B2", 0x08898, 1}, 1399 {"RF_FBMC_XFMD_RTL_TOP_B3", 0x088A0, 1}, 1400 {"RR_FAU_MAC2F_W_H_RTL_TOP_PORT0", 0x088A8, 1}, 1401 {"RR_FAU_MAC2F_W_H_RTL_TOP_PORT1", 0x088B0, 1}, 1402 {"RR_FAU_MAC2F_N_H_RTL_TOP_PORT0", 0x088B8, 1}, 1403 {"RR_FAU_MAC2F_N_H_RTL_TOP_PORT1", 0x088C0, 1}, 1404 {"RR_FAU_MAC2F_W_L_RTL_TOP_PORT2", 0x088C8, 1}, 1405 {"RR_FAU_MAC2F_N_L_RTL_TOP_PORT2", 0x088D0, 1}, 1406 {"RF_ORP_FRM_FIFO_RTL_TOP_0", 0x088D8, 1}, 1407 {"RF_ORP_FRM_FIFO_RTL_TOP_1", 0x088E0, 1}, 1408 {"RF_TPA_DA_LKP_RTL_TOP_0_0", 0x088E8, 1}, 1409 {"RF_TPA_DA_LKP_RTL_TOP_1_0", 0x088F0, 1}, 1410 {"RF_TPA_DA_LKP_RTL_TOP_0_1", 0x088F8, 1}, 1411 {"RF_TPA_DA_LKP_RTL_TOP_1_1", 0x08900, 1}, 1412 {"RF_TMAC_TPA2MAC_RTL_TOP_0_0", 0x08908, 1}, 1413 {"RF_TMAC_TPA2MAC_RTL_TOP_1_0", 0x08910, 1}, 1414 {"RF_TMAC_TPA2MAC_RTL_TOP_2_0", 0x08918, 1}, 1415 {"RF_TMAC_TPA2MAC_RTL_TOP_0_1", 0x08920, 1}, 1416 {"RF_TMAC_TPA2MAC_RTL_TOP_1_1", 0x08928, 1}, 1417 {"RF_TMAC_TPA2MAC_RTL_TOP_2_1", 0x08930, 1}, 1418 {"RF_TMAC_TPA2MAC_RTL_TOP_0_2", 0x08938, 1}, 1419 {"RF_TMAC_TPA2MAC_RTL_TOP_1_2", 0x08940, 1}, 1420 {"RF_TMAC_TPA2MAC_RTL_TOP_2_2", 0x08948, 1}, 1421 {"RF_TMAC_TPA2M_DA_RTL_TOP", 0x08950, 1}, 1422 {"RF_TMAC_TPA2M_SB_RTL_TOP", 0x08958, 1}, 1423 {"RF_XT_TRACE_RTL_TOP_MP", 0x08960, 1}, 1424 {"RF_MP_XT_DTAG_RTL_TOP", 0x08968, 1}, 1425 {"RF_MP_XT_ICACHE_RTL_TOP_0_0", 0x08970, 1}, 1426 {"RF_MP_XT_ICACHE_RTL_TOP_1_0", 0x08978, 1}, 1427 {"RF_MP_XT_ICACHE_RTL_TOP_0_1", 0x08980, 1}, 1428 {"RF_MP_XT_ICACHE_RTL_TOP_1_1", 0x08988, 1}, 1429 {"RF_MP_XT_ITAG_RTL_TOP", 0x08990, 1}, 1430 {"RF_MP_XT_DCACHE_RTL_TOP_0_0", 0x08998, 1}, 1431 {"RF_MP_XT_DCACHE_RTL_TOP_1_0", 0x089A0, 1}, 1432 {"RF_MP_XT_DCACHE_RTL_TOP_0_1", 0x089A8, 1}, 1433 {"RF_MP_XT_DCACHE_RTL_TOP_1_1", 0x089B0, 1}, 1434 {"RF_MSG_BWR_PF_RTL_TOP_0", 0x089B8, 1}, 1435 {"RF_MSG_BWR_PF_RTL_TOP_1", 0x089C0, 1}, 1436 {"RF_MSG_UMQ_RTL_TOP_0", 0x089C8, 1}, 1437 {"RF_MSG_UMQ_RTL_TOP_1", 0x089D0, 1}, 1438 {"RF_MSG_DMQ_RTL_TOP_0", 0x089D8, 1}, 1439 {"RF_MSG_DMQ_RTL_TOP_1", 0x089E0, 1}, 1440 {"RF_MSG_DMQ_RTL_TOP_2", 0x089E8, 1}, 1441 {"RF_MSG_DMA_RESP_RTL_TOP_0", 0x089F0, 1}, 1442 {"RF_MSG_DMA_RESP_RTL_TOP_1", 0x089F8, 1}, 1443 {"RF_MSG_DMA_RESP_RTL_TOP_2", 0x08A00, 1}, 1444 {"RF_MSG_CMG2MSG_RTL_TOP_0_0", 0x08A08, 1}, 1445 {"RF_MSG_CMG2MSG_RTL_TOP_1_0", 0x08A10, 1}, 1446 {"RF_MSG_CMG2MSG_RTL_TOP_0_1", 0x08A18, 1}, 1447 {"RF_MSG_CMG2MSG_RTL_TOP_1_1", 0x08A20, 1}, 1448 {"RF_MSG_TXPE2MSG_RTL_TOP", 0x08A28, 1}, 1449 {"RF_MSG_RXPE2MSG_RTL_TOP", 0x08A30, 1}, 1450 {"RF_MSG_RPE2MSG_RTL_TOP", 0x08A38, 1}, 1451 {"RR_TIM_BMAP_RTL_TOP", 0x08A40, 1}, 1452 {"RF_TIM_VBLS_RTL_TOP", 0x08A48, 1}, 1453 {"RF_TIM_BMAP_MSG_RTL_TOP_0_0", 0x08A50, 1}, 1454 {"RF_TIM_BMAP_MSG_RTL_TOP_1_0", 0x08A58, 1}, 1455 {"RF_TIM_BMAP_MSG_RTL_TOP_2_0", 0x08A60, 1}, 1456 {"RF_TIM_BMAP_MSG_RTL_TOP_0_1", 0x08A68, 1}, 1457 {"RF_TIM_BMAP_MSG_RTL_TOP_1_1", 0x08A70, 1}, 1458 {"RF_TIM_BMAP_MSG_RTL_TOP_2_1", 0x08A78, 1}, 1459 {"RF_TIM_BMAP_MSG_RTL_TOP_0_2", 0x08A80, 1}, 1460 {"RF_TIM_BMAP_MSG_RTL_TOP_1_2", 0x08A88, 1}, 1461 {"RF_TIM_BMAP_MSG_RTL_TOP_2_2", 0x08A90, 1}, 1462 {"RF_TIM_BMAP_MSG_RTL_TOP_0_3", 0x08A98, 1}, 1463 {"RF_TIM_BMAP_MSG_RTL_TOP_1_3", 0x08AA0, 1}, 1464 {"RF_TIM_BMAP_MSG_RTL_TOP_2_3", 0x08AA8, 1}, 1465 {"RF_TIM_BMAP_MSG_RTL_TOP_0_4", 0x08AB0, 1}, 1466 {"RF_TIM_BMAP_MSG_RTL_TOP_1_4", 0x08AB8, 1}, 1467 {"RF_TIM_BMAP_MSG_RTL_TOP_2_4", 0x08AC0, 1}, 1468 {"RF_XT_TRACE_RTL_TOP_UP", 0x08AC8, 1}, 1469 {"RF_UP_XT_DTAG_RTL_TOP", 0x08AD0, 1}, 1470 {"RF_UP_XT_ICACHE_RTL_TOP_0_0", 0x08AD8, 1}, 1471 {"RF_UP_XT_ICACHE_RTL_TOP_1_0", 0x08AE0, 1}, 1472 {"RF_UP_XT_ICACHE_RTL_TOP_0_1", 0x08AE8, 1}, 1473 {"RF_UP_XT_ICACHE_RTL_TOP_1_1", 0x08AF0, 1}, 1474 {"RF_UP_XT_ITAG_RTL_TOP", 0x08AF8, 1}, 1475 {"RF_UP_XT_DCACHE_RTL_TOP_0_0", 0x08B00, 1}, 1476 {"RF_UP_XT_DCACHE_RTL_TOP_1_0", 0x08B08, 1}, 1477 {"RF_UP_XT_DCACHE_RTL_TOP_0_1", 0x08B10, 1}, 1478 {"RF_UP_XT_DCACHE_RTL_TOP_1_1", 0x08B18, 1}, 1479 {"RR_RXPE_XT0_IRAM_RTL_TOP_0", 0x08B20, 1}, 1480 {"RR_RXPE_XT0_IRAM_RTL_TOP_1", 0x08B28, 1}, 1481 {"RR_RXPE_XT_DRAM_RTL_TOP_0", 0x08B30, 1}, 1482 {"RR_RXPE_XT_DRAM_RTL_TOP_1", 0x08B38, 1}, 1483 {"RF_RXPE_MSG2RXPE_RTL_TOP_0", 0x08B40, 1}, 1484 {"RF_RXPE_MSG2RXPE_RTL_TOP_1", 0x08B48, 1}, 1485 {"RF_RXPE_XT0_FRM_RTL_TOP", 0x08B50, 1}, 1486 {"RF_RPE_PDM_RCMD_RTL_TOP", 0x08B58, 1}, 1487 {"RF_RPE_RCQ_RTL_TOP", 0x08B60, 1}, 1488 {"RF_RPE_RCO_PBLE_RTL_TOP", 0x08B68, 1}, 1489 {"RR_RXPE_XT1_IRAM_RTL_TOP_0", 0x08B70, 1}, 1490 {"RR_RXPE_XT1_IRAM_RTL_TOP_1", 0x08B78, 1}, 1491 {"RR_RPE_SCCM_RTL_TOP_0", 0x08B80, 1}, 1492 {"RR_RPE_SCCM_RTL_TOP_1", 0x08B88, 1}, 1493 {"RR_PE_PET_TIMER_RTL_TOP_0", 0x08B90, 1}, 1494 {"RR_PE_PET_TIMER_RTL_TOP_1", 0x08B98, 1}, 1495 {"RF_PE_DLM_LWRQ_RTL_TOP_0", 0x08BA0, 1}, 1496 {"RF_PE_DLM_LWRQ_RTL_TOP_1", 0x08BA8, 1}, 1497 {"RF_TXPE_MSG2TXPE_RTL_TOP_%d", 0x08BB0, 2}, 1498 {"RF_PCI_RETRY_BUF_RTL_TOP_%d", 0x08BC0, 6}, 1499 {"RF_PCI_SOT_BUF_RTL_TOP", 0x08BF0, 1}, 1500 {"RF_PCI_RX_PH_RTL_TOP", 0x08BF8, 1}, 1501 {"RF_PCI_RX_NPH_RTL_TOP", 0x08C00, 1}, 1502 {"RF_PCI_RX_PD_RTL_TOP_%d", 0x08C08, 12}, 1503 {"RF_PCI_RX_NPD_RTL_TOP_%d", 0x08C68, 2}, 1504 {"RF_PIC_KDFC_DBL_RTL_TOP_%d", 0x08C78, 5}, 1505 {"RF_PCC_TXDO_RTL_TOP_PCC%d", 0x08CA0, 8}, 1506 {"RR_PCC_ASS_BUF_RTL_TOP_PCC1", 0x08CE0, 1}, 1507 {"RR_PCC_ASS_BUF_RTL_TOP_PCC3", 0x08CE8, 1}, 1508 {"RR_PCC_ASS_BUF_RTL_TOP_PCC5", 0x08CF0, 1}, 1509 {"RR_PCC_ASS_BUF_RTL_TOP_PCC7", 0x08CF8, 1}, 1510 {"RR_PCC_ASS_BUF_RTL_TOP_PCC0", 0x08D00, 1}, 1511 {"RR_PCC_ASS_BUF_RTL_TOP_PCC2", 0x08D08, 1}, 1512 {"RR_PCC_ASS_BUF_RTL_TOP_PCC6", 0x08D10, 1}, 1513 {"RR_PCC_ASS_BUF_RTL_TOP_PCC4", 0x08D18, 1}, 1514 {"RF_ROCRC_CMDQ_BP_RTL_TOP_0_WRAPPER0", 0x08D20, 1}, 1515 {"RF_ROCRC_CMDQ_BP_RTL_TOP_1_WRAPPER0", 0x08D28, 1}, 1516 {"RF_ROCRC_CMDQ_BP_RTL_TOP_2_WRAPPER0", 0x08D30, 1}, 1517 {"RF_ROCRC_CMDQ_BP_RTL_TOP_0_WRAPPER1", 0x08D38, 1}, 1518 {"RF_ROCRC_CMDQ_BP_RTL_TOP_1_WRAPPER1", 0x08D40, 1}, 1519 {"RF_ROCRC_CMDQ_BP_RTL_TOP_2_WRAPPER1", 0x08D48, 1}, 1520 {"RF_ROCRC_CMDQ_BP_RTL_TOP_0_WRAPPER2", 0x08D50, 1}, 1521 {"RF_ROCRC_CMDQ_BP_RTL_TOP_1_WRAPPER2", 0x08D58, 1}, 1522 {"RF_ROCRC_CMDQ_BP_RTL_TOP_2_WRAPPER2", 0x08D60, 1}, 1523 {"RR_ROCRC_RXD_RTL_TOP_RXD%d", 0x08D68, 2}, 1524 {"RF_ROCRC_UMQ_MDQ_RTL_TOP_%d", 0x08D78, 8}, 1525 {"RF_ROCRC_IMMDBUF_RTL_TOP", 0x08DB8, 1}, 1526 {"RF_ROCRC_QCC_BYP_RTL_TOP_%d", 0x08DC0, 2}, 1527 {"RR_RMAC_DA_LKP_RTL_TOP_%d", 0x08DD0, 4}, 1528 {"RR_RMAC_PN_LKP_D_RTL_TOP", 0x08DF0, 1}, 1529 {"RF_RMAC_PN_LKP_S_RTL_TOP_%d", 0x08DF8, 2}, 1530 {"RF_RMAC_RTH_LKP_RTL_TOP_0_0", 0x08E08, 1}, 1531 {"RF_RMAC_RTH_LKP_RTL_TOP_1_0", 0x08E10, 1}, 1532 {"RF_RMAC_RTH_LKP_RTL_TOP_0_1", 0x08E18, 1}, 1533 {"RF_RMAC_RTH_LKP_RTL_TOP_1_1", 0x08E20, 1}, 1534 {"RF_RMAC_DS_LKP_RTL_TOP", 0x08E28, 1}, 1535 {"RF_RMAC_RTS_PART_RTL_TOP_0_RMAC0", 0x08E30, 1}, 1536 {"RF_RMAC_RTS_PART_RTL_TOP_1_RMAC0", 0x08E38, 1}, 1537 {"RF_RMAC_RTS_PART_RTL_TOP_0_RMAC1", 0x08E40, 1}, 1538 {"RF_RMAC_RTS_PART_RTL_TOP_1_RMAC1", 0x08E48, 1}, 1539 {"RF_RMAC_RTS_PART_RTL_TOP_0_RMAC2", 0x08E50, 1}, 1540 {"RF_RMAC_RTS_PART_RTL_TOP_1_RMAC2", 0x08E58, 1}, 1541 {"RF_RMAC_RTH_MASK_RTL_TOP_%d", 0x08E60, 4}, 1542 {"RF_RMAC_VID_LKP_RTL_TOP_1", 0x08E88, 0}, 1543 {"RF_RMAC_VID_LKP_RTL_TOP_2", 0x08E90, 0}, 1544 {"RF_RMAC_VID_LKP_RTL_TOP_3", 0x08E98, 0}, 1545 {"RF_RMAC_VID_LKP_RTL_TOP_4", 0x08EA0, 0}, 1546 {"RF_RMAC_VID_LKP_RTL_TOP_5", 0x08EA8, 0}, 1547 {"RF_RMAC_VID_LKP_RTL_TOP_6", 0x08EB0, 0}, 1548 {"RF_RMAC_VID_LKP_RTL_TOP_7", 0x08EB8, 0}, 1549 {"RF_RMAC_STATS_RTL_TOP_0_STATS_0", 0x08EC0, 1}, 1550 {"RF_RMAC_STATS_RTL_TOP_1_STATS_0", 0x08EC8, 1}, 1551 {"RF_RMAC_STATS_RTL_TOP_0_STATS_1", 0x08ED0, 1}, 1552 {"RF_RMAC_STATS_RTL_TOP_1_STATS_1", 0x08ED8, 1}, 1553 {"RF_RMAC_STATS_RTL_TOP_0_STATS_2", 0x08EE0, 1}, 1554 {"RF_RMAC_STATS_RTL_TOP_1_STATS_2", 0x08EE8, 1}, 1555 {"RF_RMAC_STATS_RTL_TOP_0_STATS_3", 0x08EF0, 1}, 1556 {"RF_RMAC_STATS_RTL_TOP_1_STATS_3", 0x08EF8, 1}, 1557 {"RF_RMAC_STATS_RTL_TOP_0_STATS_4", 0x08F00, 1}, 1558 {"RF_RMAC_STATS_RTL_TOP_1_STATS_4", 0x08F08, 1}, 1559 {"G3IFCMD_FB_INT_STATUS", 0x09000, 1}, 1560 {"G3IFCMD_FB_INT_MASK", 0x09008, 1}, 1561 {"G3IFCMD_FB_ERR_REG", 0x09010, 1}, 1562 {"G3IFCMD_FB_ERR_MASK", 0x09018, 1}, 1563 {"G3IFCMD_FB_ERR_ALARM", 0x09020, 1}, 1564 {"G3IFCMD_FB_DLL_CK0", 0x09028, 1}, 1565 {"G3IFCMD_FB_IO_CTRL", 0x09030, 1}, 1566 {"G3IFCMD_FB_IOCAL", 0x09038, 1}, 1567 {"G3IFCMD_FB_MASTER_DLL_CK", 0x09040, 1}, 1568 {"G3IFCMD_FB_DLL_TRAINING", 0x09048, 1}, 1569 {"G3IFGR01_FB_GROUP0_DLL_RDQS", 0x09110, 1}, 1570 {"G3IFGR01_FB_GROUP0_DLL_RDQS1", 0x09118, 1}, 1571 {"G3IFGR01_FB_GROUP0_DLL_WDQS", 0x09120, 1}, 1572 {"G3IFGR01_FB_GROUP0_DLL_WDQS1", 0x09128, 1}, 1573 {"G3IFGR01_FB_GROUP0_DLL_TRAINING1", 0x09130, 1}, 1574 {"G3IFGR01_FB_GROUP0_DLL_TRAINING2", 0x09138, 1}, 1575 {"G3IFGR01_FB_GROUP0_DLL_TRAINING3", 0x09140, 1}, 1576 {"G3IFGR01_FB_GROUP0_DLL_ACT_TRAINING5", 0x09148, 1}, 1577 {"G3IFGR01_FB_GROUP0_DLL_TRAINING6", 0x09150, 1}, 1578 {"G3IFGR01_FB_GROUP0_DLL_ATRA_OFFSET", 0x09158, 1}, 1579 {"G3IFGR01_FB_GROUP0_DLL_TRA_HOLD", 0x09160, 1}, 1580 {"G3IFGR01_FB_GROUP0_DLL_ATRA_HOLD", 0x09168, 1}, 1581 {"G3IFGR01_FB_GROUP0_DLL_MASTER_CODES", 0x09170, 1}, 1582 {"G3IFGR01_FB_GROUP0_DLL_ATRA_TIMER", 0x09178, 1}, 1583 {"G3IFGR01_FB_GROUP1_DLL_RDQS", 0x09180, 1}, 1584 {"G3IFGR01_FB_GROUP1_DLL_RDQS1", 0x09188, 1}, 1585 {"G3IFGR01_FB_GROUP1_DLL_WDQS", 0x09190, 1}, 1586 {"G3IFGR01_FB_GROUP1_DLL_WDQS1", 0x09198, 1}, 1587 {"G3IFGR01_FB_GROUP1_DLL_TRAINING1", 0x091A0, 1}, 1588 {"G3IFGR01_FB_GROUP1_DLL_TRAINING2", 0x091A8, 1}, 1589 {"G3IFGR01_FB_GROUP1_DLL_TRAINING3", 0x091B0, 1}, 1590 {"G3IFGR01_FB_GROUP1_DLL_ACT_TRAINING5", 0x091B8, 1}, 1591 {"G3IFGR01_FB_GROUP1_DLL_TRAINING6", 0x091C0, 1}, 1592 {"G3IFGR01_FB_GROUP1_DLL_ATRA_OFFSET", 0x091C8, 1}, 1593 {"G3IFGR01_FB_GROUP1_DLL_TRA_HOLD", 0x091D0, 1}, 1594 {"G3IFGR01_FB_GROUP1_DLL_ATRA_HOLD", 0x091D8, 1}, 1595 {"G3IFGR01_FB_GROUP1_DLL_MASTER_CODES", 0x091E0, 1}, 1596 {"G3IFGR01_FB_GROUP1_DLL_ATRA_TIMER", 0x091E8, 1}, 1597 {"G3IFGR23_FB_GROUP2_DLL_RDQS", 0x09210, 1}, 1598 {"G3IFGR23_FB_GROUP2_DLL_RDQS1", 0x09218, 1}, 1599 {"G3IFGR23_FB_GROUP2_DLL_WDQS", 0x09220, 1}, 1600 {"G3IFGR23_FB_GROUP2_DLL_WDQS1", 0x09228, 1}, 1601 {"G3IFGR23_FB_GROUP2_DLL_TRAINING1", 0x09230, 1}, 1602 {"G3IFGR23_FB_GROUP2_DLL_TRAINING2", 0x09238, 1}, 1603 {"G3IFGR23_FB_GROUP2_DLL_TRAINING3", 0x09240, 1}, 1604 {"G3IFGR23_FB_GROUP2_DLL_ACT_TRAINING5", 0x09248, 1}, 1605 {"G3IFGR23_FB_GROUP2_DLL_TRAINING6", 0x09250, 1}, 1606 {"G3IFGR23_FB_GROUP2_DLL_ATRA_OFFSET", 0x09258, 1}, 1607 {"G3IFGR23_FB_GROUP2_DLL_TRA_HOLD", 0x09260, 1}, 1608 {"G3IFGR23_FB_GROUP2_DLL_ATRA_HOLD", 0x09268, 1}, 1609 {"G3IFGR23_FB_GROUP2_DLL_MASTER_CODES", 0x09270, 1}, 1610 {"G3IFGR23_FB_GROUP2_DLL_ATRA_TIMER", 0x09278, 1}, 1611 {"G3IFGR23_FB_GROUP3_DLL_RDQS", 0x09280, 1}, 1612 {"G3IFGR23_FB_GROUP3_DLL_RDQS1", 0x09288, 1}, 1613 {"G3IFGR23_FB_GROUP3_DLL_WDQS", 0x09290, 1}, 1614 {"G3IFGR23_FB_GROUP3_DLL_WDQS1", 0x09298, 1}, 1615 {"G3IFGR23_FB_GROUP3_DLL_TRAINING1", 0x092A0, 1}, 1616 {"G3IFGR23_FB_GROUP3_DLL_TRAINING2", 0x092A8, 1}, 1617 {"G3IFGR23_FB_GROUP3_DLL_TRAINING3", 0x092B0, 1}, 1618 {"G3IFGR23_FB_GROUP3_DLL_ACT_TRAINING5", 0x092B8, 1}, 1619 {"G3IFGR23_FB_GROUP3_DLL_TRAINING6", 0x092C0, 1}, 1620 {"G3IFGR23_FB_GROUP3_DLL_ATRA_OFFSET", 0x092C8, 1}, 1621 {"G3IFGR23_FB_GROUP3_DLL_TRA_HOLD", 0x092D0, 1}, 1622 {"G3IFGR23_FB_GROUP3_DLL_ATRA_HOLD", 0x092D8, 1}, 1623 {"G3IFGR23_FB_GROUP3_DLL_MASTER_CODES", 0x092E0, 1}, 1624 {"G3IFGR23_FB_GROUP3_DLL_ATRA_TIMER", 0x092E8, 1}, 1625 {"G3IFCMD_CMU_INT_STATUS", 0x09400, 1}, 1626 {"G3IFCMD_CMU_INT_MASK", 0x09408, 1}, 1627 {"G3IFCMD_CMU_ERR_REG", 0x09410, 1}, 1628 {"G3IFCMD_CMU_ERR_MASK", 0x09418, 1}, 1629 {"G3IFCMD_CMU_ERR_ALARM", 0x09420, 1}, 1630 {"G3IFCMD_CMU_DLL_CK0", 0x09428, 1}, 1631 {"G3IFCMD_CMU_IO_CTRL", 0x09430, 1}, 1632 {"G3IFCMD_CMU_IOCAL", 0x09438, 1}, 1633 {"G3IFCMD_CMU_MASTER_DLL_CK", 0x09440, 1}, 1634 {"G3IFCMD_CMU_DLL_TRAINING", 0x09448, 1}, 1635 {"G3IFGR01_CMU_GROUP0_DLL_RDQS", 0x09510, 1}, 1636 {"G3IFGR01_CMU_GROUP0_DLL_RDQS1", 0x09518, 1}, 1637 {"G3IFGR01_CMU_GROUP0_DLL_WDQS", 0x09520, 1}, 1638 {"G3IFGR01_CMU_GROUP0_DLL_WDQS1", 0x09528, 1}, 1639 {"G3IFGR01_CMU_GROUP0_DLL_TRAINING1", 0x09530, 1}, 1640 {"G3IFGR01_CMU_GROUP0_DLL_TRAINING2", 0x09538, 1}, 1641 {"G3IFGR01_CMU_GROUP0_DLL_TRAINING3", 0x09540, 1}, 1642 {"G3IFGR01_CMU_GROUP0_DLL_ACT_TRAINING5", 0x09548, 1}, 1643 {"G3IFGR01_CMU_GROUP0_DLL_TRAINING6", 0x09550, 1}, 1644 {"G3IFGR01_CMU_GROUP0_DLL_ATRA_OFFSET", 0x09558, 1}, 1645 {"G3IFGR01_CMU_GROUP0_DLL_TRA_HOLD", 0x09560, 1}, 1646 {"G3IFGR01_CMU_GROUP0_DLL_ATRA_HOLD", 0x09568, 1}, 1647 {"G3IFGR01_CMU_GROUP0_DLL_MASTER_CODES", 0x09570, 1}, 1648 {"G3IFGR01_CMU_GROUP0_DLL_ATRA_TIMER", 0x09578, 1}, 1649 {"G3IFGR01_CMU_GROUP1_DLL_RDQS", 0x09580, 1}, 1650 {"G3IFGR01_CMU_GROUP1_DLL_RDQS1", 0x09588, 1}, 1651 {"G3IFGR01_CMU_GROUP1_DLL_WDQS", 0x09590, 1}, 1652 {"G3IFGR01_CMU_GROUP1_DLL_WDQS1", 0x09598, 1}, 1653 {"G3IFGR01_CMU_GROUP1_DLL_TRAINING1", 0x095A0, 1}, 1654 {"G3IFGR01_CMU_GROUP1_DLL_TRAINING2", 0x095A8, 1}, 1655 {"G3IFGR01_CMU_GROUP1_DLL_TRAINING3", 0x095B0, 1}, 1656 {"G3IFGR01_CMU_GROUP1_DLL_ACT_TRAINING5", 0x095B8, 1}, 1657 {"G3IFGR01_CMU_GROUP1_DLL_TRAINING6", 0x095C0, 1}, 1658 {"G3IFGR01_CMU_GROUP1_DLL_ATRA_OFFSET", 0x095C8, 1}, 1659 {"G3IFGR01_CMU_GROUP1_DLL_TRA_HOLD", 0x095D0, 1}, 1660 {"G3IFGR01_CMU_GROUP1_DLL_ATRA_HOLD", 0x095D8, 1}, 1661 {"G3IFGR01_CMU_GROUP1_DLL_MASTER_CODES", 0x095E0, 1}, 1662 {"G3IFGR01_CMU_GROUP1_DLL_ATRA_TIMER", 0x095E8, 1}, 1663 {"G3IFGR23_CMU_GROUP2_DLL_RDQS", 0x09610, 1}, 1664 {"G3IFGR23_CMU_GROUP2_DLL_RDQS1", 0x09618, 1}, 1665 {"G3IFGR23_CMU_GROUP2_DLL_WDQS", 0x09620, 1}, 1666 {"G3IFGR23_CMU_GROUP2_DLL_WDQS1", 0x09628, 1}, 1667 {"G3IFGR23_CMU_GROUP2_DLL_TRAINING1", 0x09630, 1}, 1668 {"G3IFGR23_CMU_GROUP2_DLL_TRAINING2", 0x09638, 1}, 1669 {"G3IFGR23_CMU_GROUP2_DLL_TRAINING3", 0x09640, 1}, 1670 {"G3IFGR23_CMU_GROUP2_DLL_ACT_TRAINING5", 0x09648, 1}, 1671 {"G3IFGR23_CMU_GROUP2_DLL_TRAINING6", 0x09650, 1}, 1672 {"G3IFGR23_CMU_GROUP2_DLL_ATRA_OFFSET", 0x09658, 1}, 1673 {"G3IFGR23_CMU_GROUP2_DLL_TRA_HOLD", 0x09660, 1}, 1674 {"G3IFGR23_CMU_GROUP2_DLL_ATRA_HOLD", 0x09668, 1}, 1675 {"G3IFGR23_CMU_GROUP2_DLL_MASTER_CODES", 0x09670, 1}, 1676 {"G3IFGR23_CMU_GROUP2_DLL_ATRA_TIMER", 0x09678, 1}, 1677 {"G3IFGR23_CMU_GROUP3_DLL_RDQS", 0x09680, 1}, 1678 {"G3IFGR23_CMU_GROUP3_DLL_RDQS1", 0x09688, 1}, 1679 {"G3IFGR23_CMU_GROUP3_DLL_WDQS", 0x09690, 1}, 1680 {"G3IFGR23_CMU_GROUP3_DLL_WDQS1", 0x09698, 1}, 1681 {"G3IFGR23_CMU_GROUP3_DLL_TRAINING1", 0x096A0, 1}, 1682 {"G3IFGR23_CMU_GROUP3_DLL_TRAINING2", 0x096A8, 1}, 1683 {"G3IFGR23_CMU_GROUP3_DLL_TRAINING3", 0x096B0, 1}, 1684 {"G3IFGR23_CMU_GROUP3_DLL_ACT_TRAINING5", 0x096B8, 1}, 1685 {"G3IFGR23_CMU_GROUP3_DLL_TRAINING6", 0x096C0, 1}, 1686 {"G3IFGR23_CMU_GROUP3_DLL_ATRA_OFFSET", 0x096C8, 1}, 1687 {"G3IFGR23_CMU_GROUP3_DLL_TRA_HOLD", 0x096D0, 1}, 1688 {"G3IFGR23_CMU_GROUP3_DLL_ATRA_HOLD", 0x096D8, 1}, 1689 {"G3IFGR23_CMU_GROUP3_DLL_MASTER_CODES", 0x096E0, 1}, 1690 {"G3IFGR23_CMU_GROUP3_DLL_ATRA_TIMER", 0x096E8, 1}, 1691 {"G3IFCMD_CML_INT_STATUS", 0x09800, 1}, 1692 {"G3IFCMD_CML_INT_MASK", 0x09808, 1}, 1693 {"G3IFCMD_CML_ERR_REG", 0x09810, 1}, 1694 {"G3IFCMD_CML_ERR_MASK", 0x09818, 1}, 1695 {"G3IFCMD_CML_ERR_ALARM", 0x09820, 1}, 1696 {"G3IFCMD_CML_DLL_CK0", 0x09828, 1}, 1697 {"G3IFCMD_CML_IO_CTRL", 0x09830, 1}, 1698 {"G3IFCMD_CML_IOCAL", 0x09838, 1}, 1699 {"G3IFCMD_CML_MASTER_DLL_CK", 0x09840, 1}, 1700 {"G3IFCMD_CML_DLL_TRAINING", 0x09848, 1}, 1701 {"G3IFGR01_CML_GROUP0_DLL_RDQS", 0x09910, 1}, 1702 {"G3IFGR01_CML_GROUP0_DLL_RDQS1", 0x09918, 1}, 1703 {"G3IFGR01_CML_GROUP0_DLL_WDQS", 0x09920, 1}, 1704 {"G3IFGR01_CML_GROUP0_DLL_WDQS1", 0x09928, 1}, 1705 {"G3IFGR01_CML_GROUP0_DLL_TRAINING1", 0x09930, 1}, 1706 {"G3IFGR01_CML_GROUP0_DLL_TRAINING2", 0x09938, 1}, 1707 {"G3IFGR01_CML_GROUP0_DLL_TRAINING3", 0x09940, 1}, 1708 {"G3IFGR01_CML_GROUP0_DLL_ACT_TRAINING5", 0x09948, 1}, 1709 {"G3IFGR01_CML_GROUP0_DLL_TRAINING6", 0x09950, 1}, 1710 {"G3IFGR01_CML_GROUP0_DLL_ATRA_OFFSET", 0x09958, 1}, 1711 {"G3IFGR01_CML_GROUP0_DLL_TRA_HOLD", 0x09960, 1}, 1712 {"G3IFGR01_CML_GROUP0_DLL_ATRA_HOLD", 0x09968, 1}, 1713 {"G3IFGR01_CML_GROUP0_DLL_MASTER_CODES", 0x09970, 1}, 1714 {"G3IFGR01_CML_GROUP0_DLL_ATRA_TIMER", 0x09978, 1}, 1715 {"G3IFGR01_CML_GROUP1_DLL_RDQS", 0x09980, 1}, 1716 {"G3IFGR01_CML_GROUP1_DLL_RDQS1", 0x09988, 1}, 1717 {"G3IFGR01_CML_GROUP1_DLL_WDQS", 0x09990, 1}, 1718 {"G3IFGR01_CML_GROUP1_DLL_WDQS1", 0x09998, 1}, 1719 {"G3IFGR01_CML_GROUP1_DLL_TRAINING1", 0x099A0, 1}, 1720 {"G3IFGR01_CML_GROUP1_DLL_TRAINING2", 0x099A8, 1}, 1721 {"G3IFGR01_CML_GROUP1_DLL_TRAINING3", 0x099B0, 1}, 1722 {"G3IFGR01_CML_GROUP1_DLL_ACT_TRAINING5", 0x099B8, 1}, 1723 {"G3IFGR01_CML_GROUP1_DLL_TRAINING6", 0x099C0, 1}, 1724 {"G3IFGR01_CML_GROUP1_DLL_ATRA_OFFSET", 0x099C8, 1}, 1725 {"G3IFGR01_CML_GROUP1_DLL_TRA_HOLD", 0x099D0, 1}, 1726 {"G3IFGR01_CML_GROUP1_DLL_ATRA_HOLD", 0x099D8, 1}, 1727 {"G3IFGR01_CML_GROUP1_DLL_MASTER_CODES", 0x099E0, 1}, 1728 {"G3IFGR01_CML_GROUP1_DLL_ATRA_TIMER", 0x099E8, 1}, 1729 {"G3IFGR23_CML_GROUP2_DLL_RDQS", 0x09A10, 1}, 1730 {"G3IFGR23_CML_GROUP2_DLL_RDQS1", 0x09A18, 1}, 1731 {"G3IFGR23_CML_GROUP2_DLL_WDQS", 0x09A20, 1}, 1732 {"G3IFGR23_CML_GROUP2_DLL_WDQS1", 0x09A28, 1}, 1733 {"G3IFGR23_CML_GROUP2_DLL_TRAINING1", 0x09A30, 1}, 1734 {"G3IFGR23_CML_GROUP2_DLL_TRAINING2", 0x09A38, 1}, 1735 {"G3IFGR23_CML_GROUP2_DLL_TRAINING3", 0x09A40, 1}, 1736 {"G3IFGR23_CML_GROUP2_DLL_ACT_TRAINING5", 0x09A48, 1}, 1737 {"G3IFGR23_CML_GROUP2_DLL_TRAINING6", 0x09A50, 1}, 1738 {"G3IFGR23_CML_GROUP2_DLL_ATRA_OFFSET", 0x09A58, 1}, 1739 {"G3IFGR23_CML_GROUP2_DLL_TRA_HOLD", 0x09A60, 1}, 1740 {"G3IFGR23_CML_GROUP2_DLL_ATRA_HOLD", 0x09A68, 1}, 1741 {"G3IFGR23_CML_GROUP2_DLL_MASTER_CODES", 0x09A70, 1}, 1742 {"G3IFGR23_CML_GROUP2_DLL_ATRA_TIMER", 0x09A78, 1}, 1743 {"G3IFGR23_CML_GROUP3_DLL_RDQS", 0x09A80, 1}, 1744 {"G3IFGR23_CML_GROUP3_DLL_RDQS1", 0x09A88, 1}, 1745 {"G3IFGR23_CML_GROUP3_DLL_WDQS", 0x09A90, 1}, 1746 {"G3IFGR23_CML_GROUP3_DLL_WDQS1", 0x09A98, 1}, 1747 {"G3IFGR23_CML_GROUP3_DLL_TRAINING1", 0x09AA0, 1}, 1748 {"G3IFGR23_CML_GROUP3_DLL_TRAINING2", 0x09AA8, 1}, 1749 {"G3IFGR23_CML_GROUP3_DLL_TRAINING3", 0x09AB0, 1}, 1750 {"G3IFGR23_CML_GROUP3_DLL_ACT_TRAINING5", 0x09AB8, 1}, 1751 {"G3IFGR23_CML_GROUP3_DLL_TRAINING6", 0x09AC0, 1}, 1752 {"G3IFGR23_CML_GROUP3_DLL_ATRA_OFFSET", 0x09AC8, 1}, 1753 {"G3IFGR23_CML_GROUP3_DLL_TRA_HOLD", 0x09AD0, 1}, 1754 {"G3IFGR23_CML_GROUP3_DLL_ATRA_HOLD", 0x09AD8, 1}, 1755 {"G3IFGR23_CML_GROUP3_DLL_MASTER_CODES", 0x09AE0, 1}, 1756 {"G3IFGR23_CML_GROUP3_DLL_ATRA_TIMER", 0x09AE8, 1}, 1757 {"VPATH_TO_VPLANE_MAP_%d", 0x09B00, 17}, 1758 {"XGXS_CFG_PORT%d", 0x09C30, 2}, 1759 {"XGXS_RXBER_CFG_PORT%d", 0x09C40, 2}, 1760 {"XGXS_RXBER_STATUS_PORT%d", 0x09C50, 2}, 1761 {"XGXS_STATUS_PORT%d", 0x09C60, 2}, 1762 {"XGXS_PMA_RESET_PORT%d", 0x09C70, 2}, 1763 {"XGXS_STATIC_CFG_PORT%d", 0x09C90, 2}, 1764 {"XGXS_SERDES_FW_CFG_PORT%d", 0x09CC0, 2}, 1765 {"XGXS_SERDES_TX_CFG_PORT%d", 0x09CD0, 2}, 1766 {"XGXS_SERDES_RX_CFG_PORT%d", 0x09CE0, 2}, 1767 {"XGXS_SERDES_EXTRA_CFG_PORT%d", 0x09CF0, 2}, 1768 {"XGXS_SERDES_STATUS_PORT%d", 0x09D00, 2}, 1769 {"XGXS_SERDES_CR_ACCESS_PORT%d", 0x09D10, 2}, 1770 {"XGXS_INFO_PORT%d", 0x09D40, 2}, 1771 {"RATEMGMT_CFG_PORT%d", 0x09D50, 2}, 1772 {"RATEMGMT_STATUS_PORT%d", 0x09D60, 2}, 1773 {"RATEMGMT_FIXED_CFG_PORT%d", 0x09D80, 2}, 1774 {"RATEMGMT_ANTP_CFG_PORT%d", 0x09D90, 2}, 1775 {"RATEMGMT_ANBE_CFG_PORT%d", 0x09DA0, 2}, 1776 {"ANBE_CFG_PORT%d", 0x09DB0, 2}, 1777 {"ANBE_MGR_CTRL_PORT%d", 0x09DC0, 2}, 1778 {"ANBE_FW_MSTR_PORT%d", 0x09DE0, 2}, 1779 {"ANBE_HWFSM_GEN_STATUS_PORT%d", 0x09DF0, 2}, 1780 {"ANBE_HWFSM_BP_STATUS_PORT%d", 0x09E00, 2}, 1781 {"ANBE_HWFSM_NP_STATUS_PORT%d", 0x09E10, 2}, 1782 {"ANTP_GEN_CFG_PORT%d", 0x09E30, 2}, 1783 {"ANTP_HWFSM_GEN_STATUS_PORT%d", 0x09E40, 2}, 1784 {"ANTP_HWFSM_BP_STATUS_PORT%d", 0x09E50, 2}, 1785 {"ANTP_HWFSM_XNP_STATUS_PORT%d", 0x09E60, 2}, 1786 {"MDIO_MGR_ACCESS_PORT%d", 0x09E70, 2}, 1787 {"XMAC_VSPORT_CHOICES_VH%d", 0x0A200, 17}, 1788 {"RX_THRESH_CFG_VP%d", 0x0A400, 17}, 1789 {"FAU_ADAPTIVE_LRO_VPATH_ENABLE", 0x0AC00, 1}, 1790 {"FAU_ADAPTIVE_LRO_BASE_SID_VP%d", 0x0AC08, 17}, 1791}; 1792 1793vxge_pci_bar0_t reginfo_srpcim[] = 1794{ 1795 {"TIM_MR2SR_RESOURCE_ASSIGNMENT_VH", 0x00000, 1}, 1796 {"SRPCIM_PCIPIF_INT_STATUS", 0x00100, 1}, 1797 {"SRPCIM_PCIPIF_INT_MASK", 0x00108, 1}, 1798 {"MRPCIM_MSG_REG", 0x00110, 1}, 1799 {"MRPCIM_MSG_MASK", 0x00118, 1}, 1800 {"MRPCIM_MSG_ALARM", 0x00120, 1}, 1801 {"VPATH_MSG_REG", 0x00128, 1}, 1802 {"VPATH_MSG_MASK", 0x00130, 1}, 1803 {"VPATH_MSG_ALARM", 0x00138, 1}, 1804 {"VF_BARGRP_NO", 0x00158, 1}, 1805 {"SRPCIM_TO_MRPCIM_WMSG", 0x00160, 1}, 1806 {"SRPCIM_TO_MRPCIM_WMSG_TRIG", 0x00168, 1}, 1807 {"MRPCIM_TO_SRPCIM_RMSG", 0x00170, 1}, 1808 {"VPATH_TO_SRPCIM_RMSG_SEL", 0x00178, 1}, 1809 {"PATH_TO_SRPCIM_RMSG", 0x00180, 1}, 1810 {"SRPCIM_GENERAL_INT_STATUS", 0x00200, 1}, 1811 {"SRPCIM_GENERAL_INT_MASK", 0x00210, 1}, 1812 {"SRPCIM_PPIF_INT_STATUS", 0x00220, 1}, 1813 {"SRPCIM_PPIF_INT_MASK", 0x00228, 1}, 1814 {"SRPCIM_GEN_ERRORS_REG", 0x00230, 1}, 1815 {"SRPCIM_GEN_ERRORS_MASK", 0x00238, 1}, 1816 {"SRPCIM_GEN_ERRORS_ALARM", 0x00240, 1}, 1817 {"MRPCIM_TO_SRPCIM_ALARM_REG", 0x00248, 1}, 1818 {"VPATH_TO_SRPCIM_ALARM_MASK", 0x00268, 1}, 1819 {"VPATH_TO_SRPCIM_ALARM_ALARM", 0x00270, 1}, 1820 {"PF_SW_RESET", 0x00280, 1}, 1821 {"SRPCIM_GENERAL_CFG1", 0x00288, 1}, 1822 {"SRPCIM_INTERRUPT_CFG1", 0x00290, 1}, 1823 {"SRPCIM_INTERRUPT_CFG2", 0x00298, 1}, 1824 {"SRPCIM_CLEAR_MSIX_MASK", 0x002A8, 1}, 1825 {"SRPCIM_SET_MSIX_MASK", 0x002B0, 1}, 1826 {"SRPCIM_CLR_MSIX_ONE_SHOT", 0x002B8, 1}, 1827 {"SRPCIM_RST_IN_PROG", 0x002C0, 1}, 1828 {"SRPCIM_REG_MODIFIED", 0x002C8, 1}, 1829 {"TGT_PF_ILLEGAL_ACCESS", 0x002D0, 1}, 1830 {"SRPCIM_MSIX_STATUS", 0x002D8, 1}, 1831 {"USDC_VPL", 0x00318, 1}, 1832 {"ONE_CFG_SR_COPY", 0x00600, 1}, 1833 {"SGRP_ALLOCATED", 0x00608, 1}, 1834 {"SGRP_IWARP_LRO_ALLOCATED", 0x00610, 1}, 1835 {"XGMAC_SR_INT_STATUS", 0x00880, 1}, 1836 {"XGMAC_SR_INT_MASK", 0x00888, 1}, 1837 {"ASIC_NTWK_SR_ERR_REG", 0x00890, 1}, 1838 {"ASIC_NTWK_SR_ERR_MASK", 0x00898, 1}, 1839 {"ASIC_NTWK_SR_ERR_ALARM", 0x008A0, 1}, 1840 {"XMAC_VSPORT_CHOICES_SR_CLONE", 0x008C0, 1}, 1841 {"MR_RQA_TOP_PRTY_FOR_VH", 0x00900, 1}, 1842 {"UMQ_VH_DATA_LIST_EMPTY", 0x00908, 1}, 1843 {"WDE_CFG", 0x00910, 1} 1844}; 1845 1846vxge_stats_driver_info_t driverInfo[] = 1847{ 1848 /* ISR statistics */ 1849 {"isr_msix", 0}, 1850 1851 /* Tx statistics */ 1852 {"tx_xmit", 0}, 1853 {"tx_posted", 0}, 1854 {"tx_compl", 0}, 1855 {"tx_tso", 0}, 1856 {"tx_tcode", 0}, 1857 {"tx_low_dtr_cnt", 0}, 1858 {"tx_reserve_failed", 0}, 1859 {"tx_no_dma_setup", 0}, 1860 {"tx_max_frags", 0}, 1861 {"tx_again", 0}, 1862 1863 /* Rx statistics */ 1864 {"rx_compl", 0}, 1865 {"rx_tcode", 0}, 1866 {"rx_no_buf", 0}, 1867 {"rx_map_fail", 0}, 1868 {"rx_lro_queued", 0}, 1869 {"rx_lro_flushed", 0} 1870}; 1871 1872#endif /* _VXGE_LOG_H_ */ 1873