gic_v3_fdt.c revision 305136
1/*-
2 * Copyright (c) 2015 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * This software was developed by Semihalf under
6 * the sponsorship of the FreeBSD Foundation.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: stable/11/sys/arm64/arm64/gic_v3_fdt.c 305136 2016-08-31 17:36:43Z andrew $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bitstring.h>
36#include <sys/bus.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/rman.h>
40
41#include <machine/intr.h>
42#include <machine/resource.h>
43
44#include <dev/ofw/openfirm.h>
45#include <dev/ofw/ofw_bus.h>
46#include <dev/ofw/ofw_bus_subr.h>
47
48#include "gic_v3_reg.h"
49#include "gic_v3_var.h"
50
51/*
52 * FDT glue.
53 */
54static int gic_v3_fdt_probe(device_t);
55static int gic_v3_fdt_attach(device_t);
56
57static struct resource *gic_v3_ofw_bus_alloc_res(device_t, device_t, int, int *,
58    rman_res_t, rman_res_t, rman_res_t, u_int);
59static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t);
60
61static device_method_t gic_v3_fdt_methods[] = {
62	/* Device interface */
63	DEVMETHOD(device_probe,		gic_v3_fdt_probe),
64	DEVMETHOD(device_attach,	gic_v3_fdt_attach),
65
66	/* Bus interface */
67	DEVMETHOD(bus_alloc_resource,		gic_v3_ofw_bus_alloc_res),
68	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
69
70	/* ofw_bus interface */
71	DEVMETHOD(ofw_bus_get_devinfo,	gic_v3_ofw_get_devinfo),
72	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
73	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
74	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
75	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
76	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
77
78	/* End */
79	DEVMETHOD_END
80};
81
82DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods,
83    sizeof(struct gic_v3_softc), gic_v3_driver);
84
85static devclass_t gic_v3_fdt_devclass;
86
87EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, gic_v3_fdt_devclass,
88    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
89EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, gic_v3_fdt_devclass,
90    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
91
92/*
93 * Helper functions declarations.
94 */
95static int gic_v3_ofw_bus_attach(device_t);
96
97/*
98 * Device interface.
99 */
100static int
101gic_v3_fdt_probe(device_t dev)
102{
103
104	if (!ofw_bus_status_okay(dev))
105		return (ENXIO);
106
107	if (!ofw_bus_is_compatible(dev, "arm,gic-v3"))
108		return (ENXIO);
109
110	device_set_desc(dev, GIC_V3_DEVSTR);
111	return (BUS_PROBE_DEFAULT);
112}
113
114static int
115gic_v3_fdt_attach(device_t dev)
116{
117	struct gic_v3_softc *sc;
118	pcell_t redist_regions;
119	intptr_t xref;
120	int err;
121
122	sc = device_get_softc(dev);
123	sc->dev = dev;
124
125	/*
126	 * Recover number of the Re-Distributor regions.
127	 */
128	if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
129	    &redist_regions, sizeof(redist_regions)) <= 0)
130		sc->gic_redists.nregions = 1;
131	else
132		sc->gic_redists.nregions = redist_regions;
133
134	err = gic_v3_attach(dev);
135	if (err != 0)
136		goto error;
137
138	xref = OF_xref_from_node(ofw_bus_get_node(dev));
139	sc->gic_pic = intr_pic_register(dev, xref);
140	if (sc->gic_pic == NULL) {
141		device_printf(dev, "could not register PIC\n");
142		err = ENXIO;
143		goto error;
144	}
145
146	if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc,
147	    GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
148		err = ENXIO;
149		goto error;
150	}
151
152	/*
153	 * Try to register ITS to this GIC.
154	 * GIC will act as a bus in that case.
155	 * Failure here will not affect main GIC functionality.
156	 */
157	if (gic_v3_ofw_bus_attach(dev) != 0) {
158		if (bootverbose) {
159			device_printf(dev,
160			    "Failed to attach ITS to this GIC\n");
161		}
162	}
163
164	if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0)
165		sc->gic_nchildren = 0;
166
167	return (err);
168
169error:
170	if (bootverbose) {
171		device_printf(dev,
172		    "Failed to attach. Error %d\n", err);
173	}
174	/* Failure so free resources */
175	gic_v3_detach(dev);
176
177	return (err);
178}
179
180/* OFW bus interface */
181struct gic_v3_ofw_devinfo {
182	struct ofw_bus_devinfo	di_dinfo;
183	struct resource_list	di_rl;
184};
185
186static const struct ofw_bus_devinfo *
187gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child)
188{
189	struct gic_v3_ofw_devinfo *di;
190
191	di = device_get_ivars(child);
192	return (&di->di_dinfo);
193}
194
195static struct resource *
196gic_v3_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
197    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
198{
199	struct gic_v3_ofw_devinfo *di;
200	struct resource_list_entry *rle;
201	int ranges_len;
202
203	if (RMAN_IS_DEFAULT_RANGE(start, end)) {
204		if ((di = device_get_ivars(child)) == NULL)
205			return (NULL);
206		if (type != SYS_RES_MEMORY)
207			return (NULL);
208
209		/* Find defaults for this rid */
210		rle = resource_list_find(&di->di_rl, type, *rid);
211		if (rle == NULL)
212			return (NULL);
213
214		start = rle->start;
215		end = rle->end;
216		count = rle->count;
217	}
218	/*
219	 * XXX: No ranges remap!
220	 *	Absolute address is expected.
221	 */
222	if (ofw_bus_has_prop(bus, "ranges")) {
223		ranges_len = OF_getproplen(ofw_bus_get_node(bus), "ranges");
224		if (ranges_len != 0) {
225			if (bootverbose) {
226				device_printf(child,
227				    "Ranges remap not supported\n");
228			}
229			return (NULL);
230		}
231	}
232	return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
233	    count, flags));
234}
235
236/* Helper functions */
237
238/*
239 * Bus capability support for GICv3.
240 * Collects and configures device informations and finally
241 * adds ITS device as a child of GICv3 in Newbus hierarchy.
242 */
243static int
244gic_v3_ofw_bus_attach(device_t dev)
245{
246	struct gic_v3_ofw_devinfo *di;
247	device_t child;
248	phandle_t parent, node;
249	pcell_t addr_cells, size_cells;
250
251	parent = ofw_bus_get_node(dev);
252	if (parent > 0) {
253		addr_cells = 2;
254		OF_getencprop(parent, "#address-cells", &addr_cells,
255		    sizeof(addr_cells));
256		size_cells = 2;
257		OF_getencprop(parent, "#size-cells", &size_cells,
258		    sizeof(size_cells));
259		/* Iterate through all GIC subordinates */
260		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
261			/* Allocate and populate devinfo. */
262			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
263			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
264				if (bootverbose) {
265					device_printf(dev,
266					    "Could not set up devinfo for ITS\n");
267				}
268				free(di, M_GIC_V3);
269				continue;
270			}
271
272			/* Initialize and populate resource list. */
273			resource_list_init(&di->di_rl);
274			ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
275			    &di->di_rl);
276
277			/* Should not have any interrupts, so don't add any */
278
279			/* Add newbus device for this FDT node */
280			child = device_add_child(dev, NULL, -1);
281			if (!child) {
282				if (bootverbose) {
283					device_printf(dev,
284					    "Could not add child: %s\n",
285					    di->di_dinfo.obd_name);
286				}
287				resource_list_free(&di->di_rl);
288				ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
289				free(di, M_GIC_V3);
290				continue;
291			}
292
293			device_set_ivars(child, di);
294		}
295	}
296
297	return (bus_generic_attach(dev));
298}
299