if_vgevar.h revision 330897
1168404Spjd/*- 2168404Spjd * SPDX-License-Identifier: BSD-4-Clause 3168404Spjd * 4168404Spjd * Copyright (c) 2004 5168404Spjd * Bill Paul <wpaul@windriver.com>. All rights reserved. 6168404Spjd * 7168404Spjd * Redistribution and use in source and binary forms, with or without 8168404Spjd * modification, are permitted provided that the following conditions 9168404Spjd * are met: 10168404Spjd * 1. Redistributions of source code must retain the above copyright 11168404Spjd * notice, this list of conditions and the following disclaimer. 12168404Spjd * 2. Redistributions in binary form must reproduce the above copyright 13168404Spjd * notice, this list of conditions and the following disclaimer in the 14168404Spjd * documentation and/or other materials provided with the distribution. 15168404Spjd * 3. All advertising materials mentioning features or use of this software 16168404Spjd * must display the following acknowledgement: 17168404Spjd * This product includes software developed by Bill Paul. 18168404Spjd * 4. Neither the name of the author nor the names of any co-contributors 19168404Spjd * may be used to endorse or promote products derived from this software 20168404Spjd * without specific prior written permission. 21168404Spjd * 22219089Spjd * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23321553Smav * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24251478Sdelphij * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25286575Smav * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26296519Smav * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27168404Spjd * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28168404Spjd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29219089Spjd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30219089Spjd * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31168404Spjd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32168404Spjd * THE POSSIBILITY OF SUCH DAMAGE. 33168404Spjd * 34168404Spjd * $FreeBSD: stable/11/sys/dev/vge/if_vgevar.h 330897 2018-03-14 03:19:51Z eadler $ 35168404Spjd */ 36168404Spjd 37168404Spjd#define VGE_JUMBO_MTU 9000 38168404Spjd 39168404Spjd#define VGE_TX_DESC_CNT 256 40168404Spjd#define VGE_RX_DESC_CNT 252 /* Must be a multiple of 4!! */ 41219089Spjd#define VGE_TX_RING_ALIGN 64 42339109Smav#define VGE_RX_RING_ALIGN 64 43168404Spjd#define VGE_MAXTXSEGS 6 44168404Spjd#define VGE_RX_BUF_ALIGN sizeof(uint64_t) 45168404Spjd 46168404Spjd/* 47168404Spjd * VIA Velocity allows 64bit DMA addressing but high 16bits 48219089Spjd * of the DMA address should be the same for Tx/Rx buffers. 49219089Spjd * Because this condition can't be guaranteed vge(4) limit 50248571Smm * DMA address space to 48bits. 51168404Spjd */ 52168404Spjd#if (BUS_SPACE_MAXADDR < 0xFFFFFFFFFF) 53168404Spjd#define VGE_BUF_DMA_MAXADDR BUS_SPACE_MAXADDR 54209962Smm#else 55209962Smm#define VGE_BUF_DMA_MAXADDR 0xFFFFFFFFFFFF 56209962Smm#endif 57219089Spjd 58219089Spjd#define VGE_RX_LIST_SZ (VGE_RX_DESC_CNT * sizeof(struct vge_rx_desc)) 59219089Spjd#define VGE_TX_LIST_SZ (VGE_TX_DESC_CNT * sizeof(struct vge_tx_desc)) 60209962Smm#define VGE_TX_DESC_INC(x) ((x) = ((x) + 1) % VGE_TX_DESC_CNT) 61209962Smm#define VGE_TX_DESC_DEC(x) \ 62168404Spjd ((x) = (((x) + VGE_TX_DESC_CNT - 1) % VGE_TX_DESC_CNT)) 63168404Spjd#define VGE_RX_DESC_INC(x) ((x) = ((x) + 1) % VGE_RX_DESC_CNT) 64168404Spjd#define VGE_ADDR_LO(y) ((uint64_t) (y) & 0xFFFFFFFF) 65168404Spjd#define VGE_ADDR_HI(y) ((uint64_t) (y) >> 32) 66209962Smm#define VGE_BUFLEN(y) ((y) & 0x3FFF) 67209962Smm#define VGE_RXBYTES(x) (((x) & VGE_RDSTS_BUFSIZ) >> 16) 68209962Smm#define VGE_MIN_FRAMELEN 60 69209962Smm 70209962Smm#define VGE_INT_HOLDOFF_TICK 20 71168404Spjd#define VGE_INT_HOLDOFF_USEC(x) ((x) / VGE_INT_HOLDOFF_TICK) 72168404Spjd#define VGE_INT_HOLDOFF_MIN 0 73339109Smav#define VGE_INT_HOLDOFF_MAX (255 * VGE_INT_HOLDOFF_TICK) 74168404Spjd#define VGE_INT_HOLDOFF_DEFAULT 150 75168404Spjd 76168404Spjd#define VGE_RX_COAL_PKT_MIN 1 77168404Spjd#define VGE_RX_COAL_PKT_MAX VGE_RX_DESC_CNT 78168404Spjd#define VGE_RX_COAL_PKT_DEFAULT 64 79168404Spjd 80219089Spjd#define VGE_TX_COAL_PKT_MIN 1 81286575Smav#define VGE_TX_COAL_PKT_MAX VGE_TX_DESC_CNT 82286575Smav#define VGE_TX_COAL_PKT_DEFAULT 128 83286575Smav 84286575Smavstruct vge_type { 85219089Spjd uint16_t vge_vid; 86219089Spjd uint16_t vge_did; 87219089Spjd char *vge_name; 88219089Spjd}; 89168404Spjd 90168404Spjdstruct vge_txdesc { 91286575Smav struct mbuf *tx_m; 92286575Smav bus_dmamap_t tx_dmamap; 93219089Spjd struct vge_tx_desc *tx_desc; 94266771Sdelphij struct vge_txdesc *txd_prev; 95266771Sdelphij}; 96219089Spjd 97266771Sdelphijstruct vge_rxdesc { 98266771Sdelphij struct mbuf *rx_m; 99266771Sdelphij bus_dmamap_t rx_dmamap; 100266771Sdelphij struct vge_rx_desc *rx_desc; 101266771Sdelphij struct vge_rxdesc *rxd_prev; 102266771Sdelphij}; 103266771Sdelphij 104274337Sdelphijstruct vge_chain_data{ 105339109Smav bus_dma_tag_t vge_ring_tag; 106339109Smav bus_dma_tag_t vge_buffer_tag; 107339109Smav bus_dma_tag_t vge_tx_tag; 108339109Smav struct vge_txdesc vge_txdesc[VGE_TX_DESC_CNT]; 109339109Smav bus_dma_tag_t vge_rx_tag; 110339109Smav struct vge_rxdesc vge_rxdesc[VGE_RX_DESC_CNT]; 111339109Smav bus_dma_tag_t vge_tx_ring_tag; 112339109Smav bus_dmamap_t vge_tx_ring_map; 113339109Smav bus_dma_tag_t vge_rx_ring_tag; 114339109Smav bus_dmamap_t vge_rx_ring_map; 115219089Spjd bus_dmamap_t vge_rx_sparemap; 116308082Smav 117308082Smav int vge_tx_prodidx; 118308082Smav int vge_tx_considx; 119308082Smav int vge_tx_cnt; 120308082Smav int vge_rx_prodidx; 121308082Smav int vge_rx_commit; 122168404Spjd 123168404Spjd struct mbuf *vge_head; 124185029Spjd struct mbuf *vge_tail; 125321553Smav}; 126209962Smm 127321531Smav#define VGE_CHAIN_RESET(_sc) \ 128321531Smavdo { \ 129168404Spjd if ((_sc)->vge_cdata.vge_head != NULL) { \ 130168404Spjd m_freem((_sc)->vge_cdata.vge_head); \ 131168404Spjd (_sc)->vge_cdata.vge_head = NULL; \ 132168404Spjd (_sc)->vge_cdata.vge_tail = NULL; \ 133168404Spjd } \ 134168404Spjd} while (0); 135168404Spjd 136321553Smavstruct vge_ring_data { 137168404Spjd struct vge_tx_desc *vge_tx_ring; 138168404Spjd bus_addr_t vge_tx_ring_paddr; 139185029Spjd struct vge_rx_desc *vge_rx_ring; 140321553Smav bus_addr_t vge_rx_ring_paddr; 141321553Smav}; 142321553Smav 143185029Spjdstruct vge_hw_stats { 144185029Spjd uint32_t rx_frames; 145185029Spjd uint32_t rx_good_frames; 146219089Spjd uint32_t rx_fifo_oflows; 147219089Spjd uint32_t rx_runts; 148219089Spjd uint32_t rx_runts_errs; 149219089Spjd uint32_t rx_pkts_64; 150168404Spjd uint32_t rx_pkts_65_127; 151209962Smm uint32_t rx_pkts_128_255; 152219089Spjd uint32_t rx_pkts_256_511; 153219089Spjd uint32_t rx_pkts_512_1023; 154219089Spjd uint32_t rx_pkts_1024_1518; 155168404Spjd uint32_t rx_pkts_1519_max; 156185029Spjd uint32_t rx_pkts_1519_max_errs; 157185029Spjd uint32_t rx_jumbos; 158185029Spjd uint32_t rx_crcerrs; 159185029Spjd uint32_t rx_pause_frames; 160258634Savg uint32_t rx_alignerrs; 161251478Sdelphij uint32_t rx_nobufs; 162168404Spjd uint32_t rx_symerrs; 163219089Spjd uint32_t rx_lenerrs; 164219089Spjd 165219089Spjd uint32_t tx_good_frames; 166286686Smav uint32_t tx_pkts_64; 167286686Smav uint32_t tx_pkts_65_127; 168331611Savg uint32_t tx_pkts_128_255; 169331611Savg uint32_t tx_pkts_256_511; 170219089Spjd uint32_t tx_pkts_512_1023; 171219089Spjd uint32_t tx_pkts_1024_1518; 172219089Spjd uint32_t tx_jumbos; 173219089Spjd uint32_t tx_colls; 174168404Spjd uint32_t tx_pause; 175168404Spjd uint32_t tx_sqeerrs; 176168404Spjd uint32_t tx_latecolls; 177168404Spjd}; 178168404Spjd 179248571Smmstruct vge_softc { 180248571Smm struct ifnet *vge_ifp; /* interface info */ 181248571Smm device_t vge_dev; 182219089Spjd struct resource *vge_res; 183248571Smm struct resource *vge_irq; 184219089Spjd void *vge_intrhand; 185168404Spjd device_t vge_miibus; 186168404Spjd int vge_if_flags; 187219089Spjd int vge_phyaddr; 188219089Spjd int vge_flags; 189219089Spjd#define VGE_FLAG_PCIE 0x0001 190168404Spjd#define VGE_FLAG_MSI 0x0002 191168404Spjd#define VGE_FLAG_PMCAP 0x0004 192219089Spjd#define VGE_FLAG_JUMBO 0x0008 193219089Spjd#define VGE_FLAG_SUSPENDED 0x4000 194219089Spjd#define VGE_FLAG_LINK 0x8000 195219089Spjd int vge_expcap; 196219089Spjd int vge_pmcap; 197209962Smm int vge_camidx; 198209962Smm int vge_int_holdoff; 199248571Smm int vge_rx_coal_pkt; 200168404Spjd int vge_tx_coal_pkt; 201286575Smav struct mtx vge_mtx; 202321547Smav struct callout vge_watchdog; 203286575Smav int vge_timer; 204219089Spjd 205219089Spjd struct vge_chain_data vge_cdata; 206219089Spjd struct vge_ring_data vge_rdata; 207168404Spjd struct vge_hw_stats vge_stats; 208168404Spjd}; 209168404Spjd 210168404Spjd#define VGE_LOCK(_sc) mtx_lock(&(_sc)->vge_mtx) 211168404Spjd#define VGE_UNLOCK(_sc) mtx_unlock(&(_sc)->vge_mtx) 212#define VGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vge_mtx, MA_OWNED) 213 214/* 215 * register space access macros 216 */ 217#define CSR_WRITE_STREAM_4(sc, reg, val) \ 218 bus_write_stream_4(sc->vge_res, reg, val) 219#define CSR_WRITE_4(sc, reg, val) \ 220 bus_write_4(sc->vge_res, reg, val) 221#define CSR_WRITE_2(sc, reg, val) \ 222 bus_write_2(sc->vge_res, reg, val) 223#define CSR_WRITE_1(sc, reg, val) \ 224 bus_write_1(sc->vge_res, reg, val) 225 226#define CSR_READ_4(sc, reg) \ 227 bus_read_4(sc->vge_res, reg) 228#define CSR_READ_2(sc, reg) \ 229 bus_read_2(sc->vge_res, reg) 230#define CSR_READ_1(sc, reg) \ 231 bus_read_1(sc->vge_res, reg) 232 233#define CSR_SETBIT_1(sc, reg, x) \ 234 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x)) 235#define CSR_SETBIT_2(sc, reg, x) \ 236 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x)) 237#define CSR_SETBIT_4(sc, reg, x) \ 238 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x)) 239 240#define CSR_CLRBIT_1(sc, reg, x) \ 241 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x)) 242#define CSR_CLRBIT_2(sc, reg, x) \ 243 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x)) 244#define CSR_CLRBIT_4(sc, reg, x) \ 245 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x)) 246 247#define VGE_RXCHUNK 4 248#define VGE_TIMEOUT 10000 249 250