sati_write_and_verify.c revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
3 *
4 * This file is provided under a dual BSD/GPLv2 license.  When using or
5 * redistributing this file, you may do so under either license.
6*
7* GPL LICENSE SUMMARY
8*
9* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
10*
11* This program is free software; you can redistribute it and/or modify
12* it under the terms of version 2 of the GNU General Public License as
13* published by the Free Software Foundation.
14*
15* This program is distributed in the hope that it will be useful, but
16* WITHOUT ANY WARRANTY; without even the implied warranty of
17* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18* General Public License for more details.
19*
20* You should have received a copy of the GNU General Public License
21* along with this program; if not, write to the Free Software
22* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23* The full GNU General Public License is included in this distribution
24* in the file called LICENSE.GPL.
25*
26* BSD LICENSE
27*
28* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
29* All rights reserved.
30*
31* Redistribution and use in source and binary forms, with or without
32* modification, are permitted provided that the following conditions
33* are met:
34*
35*   * Redistributions of source code must retain the above copyright
36*     notice, this list of conditions and the following disclaimer.
37*   * Redistributions in binary form must reproduce the above copyright
38*     notice, this list of conditions and the following disclaimer in
39*     the documentation and/or other materials provided with the
40*     distribution.
41*
42* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53 */
54
55#include <sys/cdefs.h>
56__FBSDID("$FreeBSD: stable/11/sys/dev/isci/scil/sati_write_and_verify.c 330897 2018-03-14 03:19:51Z eadler $");
57
58/**
59* @file
60* @brief This file contains the method implementations to translate
61*        SCSI Write and Verify command based of the SAT spec.
62*/
63
64#if !defined(DISABLE_SATI_WRITE_AND_VERIFY)
65
66#include <dev/isci/scil/sati_write_and_verify.h>
67#include <dev/isci/scil/sati_write.h>
68#include <dev/isci/scil/sati_verify.h>
69#include <dev/isci/scil/sati_callbacks.h>
70#include <dev/isci/scil/sati_util.h>
71
72#include <dev/isci/scil/intel_ata.h>
73#include <dev/isci/scil/intel_scsi.h>
74
75/**
76* @brief This function translates a SCSI Write and Verify 10 command
77*        into both ATA write and ATA read verify commands. This
78*        happens by passing the SCSI IO, ATA IO, and Sequence pointers
79*        to both the sati_write_10_translate_command and the
80*        sati_verify_10_translate_command.
81*
82* @return Indicate if the command translation succeeded.
83* @retval SCI_SUCCESS This is returned if the command translation was
84*         successful.
85* @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
86*         a problem with the translation of write long.
87* @retval SATI_FAILURE is returned if there the sequence is out of
88*         state for a sati_write_and_verify_10 translation.
89*
90*/
91SATI_STATUS sati_write_and_verify_10_translate_command(
92   SATI_TRANSLATOR_SEQUENCE_T * sequence,
93   void                       * scsi_io,
94   void                       * ata_io
95)
96{
97   SATI_STATUS status;
98
99   if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
100   {
101      status = sati_write_10_translate_command(sequence, scsi_io, ata_io);
102      sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
103      sequence->is_translate_response_required = TRUE;
104   }
105   else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
106   {
107      status = sati_verify_10_translate_command(sequence, scsi_io, ata_io);
108      sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
109   }
110   else
111   {
112      //SATI sequence is in the wrong state
113      return SATI_FAILURE;
114   }
115
116   sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
117   return status;
118}
119
120/**
121* @brief This function translates a SCSI Write and Verify 12 command
122*        into both ATA write and ATA read verify commands. This
123*        happens by passing the SCSI IO, ATA IO, and Sequence pointers
124*        to both the sati_write_12_translate_command and the
125*        sati_verify_12_translate_command.
126*
127* @return Indicate if the command translation succeeded.
128* @retval SCI_SUCCESS This is returned if the command translation was
129*         successful.
130* @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
131*         a problem with the translation of write long.
132* @retval SATI_FAILURE is returned if there the sequence is out of
133*         state for a sati_write_and_verify_12 translation.
134*
135*/
136SATI_STATUS sati_write_and_verify_12_translate_command(
137   SATI_TRANSLATOR_SEQUENCE_T * sequence,
138   void                       * scsi_io,
139   void                       * ata_io
140)
141{
142   SATI_STATUS status;
143
144   if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
145   {
146      status = sati_write_12_translate_command(sequence, scsi_io, ata_io);
147      sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
148      sequence->is_translate_response_required = TRUE;
149   }
150   else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
151   {
152      status = sati_verify_12_translate_command(sequence, scsi_io, ata_io);
153      sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
154   }
155   else
156   {
157      //SATI sequence is in the wrong state
158      return SATI_FAILURE;
159   }
160
161   sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
162   return status;
163}
164
165/**
166* @brief This function translates a SCSI Write and Verify 16 command
167*        into both ATA write and ATA read verify commands. This
168*        happens by passing the SCSI IO, ATA IO, and Sequence pointers
169*        to both the sati_write_16_translate_command and the
170*        sati_verify_16_translate_command.
171*
172* @return Indicate if the command translation succeeded.
173* @retval SCI_SUCCESS This is returned if the command translation was
174*         successful.
175* @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
176*         a problem with the translation of write long.
177* @retval SATI_FAILURE is returned if there the sequence is out of
178*         state for a sati_write_and_verify_16 translation.
179*
180*/
181SATI_STATUS sati_write_and_verify_16_translate_command(
182   SATI_TRANSLATOR_SEQUENCE_T * sequence,
183   void                       * scsi_io,
184   void                       * ata_io
185)
186{
187   SATI_STATUS status;
188
189   if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
190   {
191      status = sati_write_16_translate_command(sequence, scsi_io, ata_io);
192      sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
193      sequence->is_translate_response_required = TRUE;
194   }
195   else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
196   {
197      status = sati_verify_16_translate_command(sequence, scsi_io, ata_io);
198      sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
199   }
200   else
201   {
202      //SATI sequence is in the wrong state
203      return SATI_FAILURE;
204   }
205
206   sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
207   return status;
208}
209
210/**
211* @brief This function is the response to a sati_write_and_verify
212         translation. Since no response translation is required
213         this function will only check the sequence state and return
214         status.
215*
216* @return Indicate if the command response translation succeeded.
217* @retval SCI_COMPLETE This is returned if the command translation
218          is successful and requires no more work.
219* @retval SATI_SEQUENCE_INCOMPLETE This is returned if the command
220          translation has finished sending the ATA Write command but
221          still needs to complete the Verify portion.
222* @retval SATI_FAILURE is returned if there the sequence is out of
223*         state for a sati_write_and_verify translation.
224*
225*/
226SATI_STATUS sati_write_and_verify_translate_response(
227   SATI_TRANSLATOR_SEQUENCE_T * sequence,
228   void                       * scsi_io,
229   void                       * ata_io
230)
231{
232   if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
233   {
234      return SATI_SEQUENCE_INCOMPLETE;
235   }
236   else if(sequence->state == SATI_SEQUENCE_STATE_AWAIT_RESPONSE)
237   {
238      sequence->state = SATI_SEQUENCE_STATE_FINAL;
239      return SATI_COMPLETE;
240   }
241
242   return SATI_FAILURE;
243}
244
245#endif //!defined(DISABLE_SATI_WRITE_AND_VERIFY)
246