if_tsec.h revision 330897
1185377Ssam/*- 2185377Ssam * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3185377Ssam * 4185377Ssam * Copyright (C) 2006-2007 Semihalf, Piotr Kruszynski 5185377Ssam * All rights reserved. 6185377Ssam * 7185377Ssam * Redistribution and use in source and binary forms, with or without 8185377Ssam * modification, are permitted provided that the following conditions 9185377Ssam * are met: 10185377Ssam * 1. Redistributions of source code must retain the above copyright 11185377Ssam * notice, this list of conditions and the following disclaimer. 12185377Ssam * 2. Redistributions in binary form must reproduce the above copyright 13185377Ssam * notice, this list of conditions and the following disclaimer in the 14185377Ssam * documentation and/or other materials provided with the distribution. 15185377Ssam * 16185377Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17188968Ssam * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18185377Ssam * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 19185377Ssam * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20185377Ssam * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 21185377Ssam * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 22188968Ssam * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 23185377Ssam * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 24185377Ssam * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25185377Ssam * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26185377Ssam * 27185377Ssam * $FreeBSD: stable/11/sys/dev/tsec/if_tsec.h 330897 2018-03-14 03:19:51Z eadler $ 28185377Ssam */ 29185377Ssam 30185377Ssam#ifndef _IF_TSEC_H 31185377Ssam#define _IF_TSEC_H 32185377Ssam 33185377Ssam#include <dev/ofw/openfirm.h> 34185377Ssam 35185377Ssam#define TSEC_RX_NUM_DESC 256 36185377Ssam#define TSEC_TX_NUM_DESC 256 37185377Ssam 38185377Ssam/* Interrupt Coalescing types */ 39185377Ssam#define TSEC_IC_RX 0 40185377Ssam#define TSEC_IC_TX 1 41185377Ssam 42185377Ssam/* eTSEC ID */ 43185377Ssam#define TSEC_ETSEC_ID 0x0124 44185377Ssam 45185377Ssam/* Frame sizes */ 46185377Ssam#define TSEC_MIN_FRAME_SIZE 64 47185377Ssam#define TSEC_MAX_FRAME_SIZE 9600 48185377Ssam 49185377Ssamstruct tsec_softc { 50185377Ssam /* XXX MII bus requires that struct ifnet is first!!! */ 51185377Ssam struct ifnet *tsec_ifp; 52185377Ssam 53185377Ssam struct mtx transmit_lock; /* transmitter lock */ 54185377Ssam struct mtx receive_lock; /* receiver lock */ 55185377Ssam 56185377Ssam phandle_t node; 57185377Ssam device_t dev; 58185377Ssam device_t tsec_miibus; 59185377Ssam struct mii_data *tsec_mii; /* MII media control */ 60185377Ssam int tsec_link; 61185377Ssam 62185377Ssam bus_dma_tag_t tsec_tx_dtag; /* TX descriptors tag */ 63185377Ssam bus_dmamap_t tsec_tx_dmap; /* TX descriptors map */ 64185377Ssam struct tsec_desc *tsec_tx_vaddr;/* vadress of TX descriptors */ 65185377Ssam uint32_t tsec_tx_raddr; /* real address of TX descriptors */ 66185377Ssam 67185377Ssam bus_dma_tag_t tsec_rx_dtag; /* RX descriptors tag */ 68185377Ssam bus_dmamap_t tsec_rx_dmap; /* RX descriptors map */ 69185377Ssam struct tsec_desc *tsec_rx_vaddr; /* vadress of RX descriptors */ 70185377Ssam uint32_t tsec_rx_raddr; /* real address of RX descriptors */ 71185377Ssam 72185377Ssam bus_dma_tag_t tsec_tx_mtag; /* TX mbufs tag */ 73185377Ssam bus_dma_tag_t tsec_rx_mtag; /* TX mbufs tag */ 74185377Ssam 75185377Ssam struct rx_data_type { 76185377Ssam bus_dmamap_t map; /* mbuf map */ 77185377Ssam struct mbuf *mbuf; 78185377Ssam uint32_t paddr; /* DMA address of buffer */ 79185377Ssam } rx_data[TSEC_RX_NUM_DESC]; 80185377Ssam 81185377Ssam uint32_t tx_cur_desc_cnt; 82185377Ssam uint32_t tx_dirty_desc_cnt; 83185377Ssam uint32_t rx_cur_desc_cnt; 84185377Ssam 85185377Ssam struct resource *sc_rres; /* register resource */ 86185377Ssam int sc_rrid; /* register rid */ 87185377Ssam struct { 88185377Ssam bus_space_tag_t bst; 89185377Ssam bus_space_handle_t bsh; 90185377Ssam } sc_bas; 91185377Ssam 92185377Ssam struct resource *sc_transmit_ires; 93185377Ssam void *sc_transmit_ihand; 94185377Ssam int sc_transmit_irid; 95185377Ssam struct resource *sc_receive_ires; 96185377Ssam void *sc_receive_ihand; 97185377Ssam int sc_receive_irid; 98185377Ssam struct resource *sc_error_ires; 99185377Ssam void *sc_error_ihand; 100185377Ssam int sc_error_irid; 101185377Ssam 102185377Ssam int tsec_if_flags; 103185377Ssam int is_etsec; 104185377Ssam 105185377Ssam /* Watchdog and MII tick related */ 106185377Ssam struct callout tsec_callout; 107185377Ssam int tsec_watchdog; 108185377Ssam 109185377Ssam /* TX maps */ 110185377Ssam bus_dmamap_t tx_map_data[TSEC_TX_NUM_DESC]; 111185377Ssam 112185377Ssam /* unused TX maps data */ 113185377Ssam uint32_t tx_map_unused_get_cnt; 114185377Ssam uint32_t tx_map_unused_put_cnt; 115185377Ssam bus_dmamap_t *tx_map_unused_data[TSEC_TX_NUM_DESC]; 116185377Ssam 117185377Ssam /* used TX maps data */ 118185377Ssam uint32_t tx_map_used_get_cnt; 119185377Ssam uint32_t tx_map_used_put_cnt; 120185377Ssam bus_dmamap_t *tx_map_used_data[TSEC_TX_NUM_DESC]; 121185377Ssam 122185377Ssam /* mbufs in TX queue */ 123185377Ssam uint32_t tx_mbuf_used_get_cnt; 124185377Ssam uint32_t tx_mbuf_used_put_cnt; 125185377Ssam struct mbuf *tx_mbuf_used_data[TSEC_TX_NUM_DESC]; 126185377Ssam 127185377Ssam /* interrupt coalescing */ 128185377Ssam struct mtx ic_lock; 129185377Ssam uint32_t rx_ic_time; /* RW, valid values 0..65535 */ 130185377Ssam uint32_t rx_ic_count; /* RW, valid values 0..255 */ 131185377Ssam uint32_t tx_ic_time; 132185377Ssam uint32_t tx_ic_count; 133185377Ssam 134185377Ssam /* currently received frame */ 135185377Ssam struct mbuf *frame; 136185377Ssam 137185377Ssam int phyaddr; 138185377Ssam bus_space_tag_t phy_bst; 139185377Ssam bus_space_handle_t phy_bsh; 140185377Ssam int phy_regoff; 141185377Ssam}; 142185377Ssam 143185377Ssam/* interface to get/put generic objects */ 144185377Ssam#define TSEC_CNT_INIT(cnt, wrap) ((cnt) = ((wrap) - 1)) 145185377Ssam 146185377Ssam#define TSEC_INC(count, wrap) (count = ((count) + 1) & ((wrap) - 1)) 147185377Ssam 148185377Ssam#define TSEC_GET_GENERIC(hand, tab, count, wrap) \ 149185377Ssam ((hand)->tab[TSEC_INC((hand)->count, wrap)]) 150185377Ssam 151185377Ssam#define TSEC_PUT_GENERIC(hand, tab, count, wrap, val) \ 152185377Ssam ((hand)->tab[TSEC_INC((hand)->count, wrap)] = val) 153185377Ssam 154185377Ssam#define TSEC_BACK_GENERIC(sc, count, wrap) do { \ 155185377Ssam if ((sc)->count > 0) \ 156185377Ssam (sc)->count--; \ 157185377Ssam else \ 158185377Ssam (sc)->count = (wrap) - 1; \ 159185377Ssam} while (0) 160185377Ssam 161185377Ssam/* TX maps interface */ 162185377Ssam#define TSEC_TX_MAP_CNT_INIT(sc) do { \ 163185377Ssam TSEC_CNT_INIT((sc)->tx_map_unused_get_cnt, TSEC_TX_NUM_DESC); \ 164185377Ssam TSEC_CNT_INIT((sc)->tx_map_unused_put_cnt, TSEC_TX_NUM_DESC); \ 165185377Ssam TSEC_CNT_INIT((sc)->tx_map_used_get_cnt, TSEC_TX_NUM_DESC); \ 166185377Ssam TSEC_CNT_INIT((sc)->tx_map_used_put_cnt, TSEC_TX_NUM_DESC); \ 167185377Ssam} while (0) 168185377Ssam 169185377Ssam/* interface to get/put unused TX maps */ 170185377Ssam#define TSEC_ALLOC_TX_MAP(sc) \ 171185377Ssam TSEC_GET_GENERIC(sc, tx_map_unused_data, tx_map_unused_get_cnt, \ 172185377Ssam TSEC_TX_NUM_DESC) 173185377Ssam 174185377Ssam#define TSEC_FREE_TX_MAP(sc, val) \ 175185377Ssam TSEC_PUT_GENERIC(sc, tx_map_unused_data, tx_map_unused_put_cnt, \ 176185377Ssam TSEC_TX_NUM_DESC, val) 177185377Ssam 178185377Ssam/* interface to get/put used TX maps */ 179185377Ssam#define TSEC_GET_TX_MAP(sc) \ 180185377Ssam TSEC_GET_GENERIC(sc, tx_map_used_data, tx_map_used_get_cnt, \ 181185377Ssam TSEC_TX_NUM_DESC) 182185377Ssam 183185377Ssam#define TSEC_PUT_TX_MAP(sc, val) \ 184185377Ssam TSEC_PUT_GENERIC(sc, tx_map_used_data, tx_map_used_put_cnt, \ 185185377Ssam TSEC_TX_NUM_DESC, val) 186185377Ssam 187185377Ssam/* interface to get/put TX mbufs in send queue */ 188185377Ssam#define TSEC_TX_MBUF_CNT_INIT(sc) do { \ 189185377Ssam TSEC_CNT_INIT((sc)->tx_mbuf_used_get_cnt, TSEC_TX_NUM_DESC); \ 190185377Ssam TSEC_CNT_INIT((sc)->tx_mbuf_used_put_cnt, TSEC_TX_NUM_DESC); \ 191185377Ssam} while (0) 192185377Ssam 193185377Ssam#define TSEC_GET_TX_MBUF(sc) \ 194185377Ssam TSEC_GET_GENERIC(sc, tx_mbuf_used_data, tx_mbuf_used_get_cnt, \ 195185377Ssam TSEC_TX_NUM_DESC) 196185377Ssam 197185377Ssam#define TSEC_PUT_TX_MBUF(sc, val) \ 198185377Ssam TSEC_PUT_GENERIC(sc, tx_mbuf_used_data, tx_mbuf_used_put_cnt, \ 199185377Ssam TSEC_TX_NUM_DESC, val) 200185377Ssam 201185377Ssam#define TSEC_EMPTYQ_TX_MBUF(sc) \ 202185377Ssam ((sc)->tx_mbuf_used_get_cnt == (sc)->tx_mbuf_used_put_cnt) 203185377Ssam 204185377Ssam/* interface for manage tx tsec_desc */ 205185377Ssam#define TSEC_TX_DESC_CNT_INIT(sc) do { \ 206185377Ssam TSEC_CNT_INIT((sc)->tx_cur_desc_cnt, TSEC_TX_NUM_DESC); \ 207185377Ssam TSEC_CNT_INIT((sc)->tx_dirty_desc_cnt, TSEC_TX_NUM_DESC); \ 208185377Ssam} while (0) 209185377Ssam 210185377Ssam#define TSEC_GET_CUR_TX_DESC(sc) \ 211185377Ssam &TSEC_GET_GENERIC(sc, tsec_tx_vaddr, tx_cur_desc_cnt, \ 212185377Ssam TSEC_TX_NUM_DESC) 213185377Ssam 214185377Ssam#define TSEC_GET_DIRTY_TX_DESC(sc) \ 215185377Ssam &TSEC_GET_GENERIC(sc, tsec_tx_vaddr, tx_dirty_desc_cnt, \ 216185377Ssam TSEC_TX_NUM_DESC) 217185377Ssam 218185377Ssam#define TSEC_BACK_DIRTY_TX_DESC(sc) \ 219185377Ssam TSEC_BACK_GENERIC(sc, tx_dirty_desc_cnt, TSEC_TX_NUM_DESC) 220185377Ssam 221185377Ssam#define TSEC_CUR_DIFF_DIRTY_TX_DESC(sc) \ 222185377Ssam ((sc)->tx_cur_desc_cnt != (sc)->tx_dirty_desc_cnt) 223185377Ssam 224185377Ssam#define TSEC_FREE_TX_DESC(sc) \ 225185377Ssam (((sc)->tx_cur_desc_cnt < (sc)->tx_dirty_desc_cnt) ? \ 226185377Ssam ((sc)->tx_dirty_desc_cnt - (sc)->tx_cur_desc_cnt - 1) \ 227185377Ssam : \ 228185377Ssam (TSEC_TX_NUM_DESC - (sc)->tx_cur_desc_cnt \ 229185377Ssam + (sc)->tx_dirty_desc_cnt - 1)) 230185377Ssam 231185377Ssam/* interface for manage rx tsec_desc */ 232185377Ssam#define TSEC_RX_DESC_CNT_INIT(sc) do { \ 233185377Ssam TSEC_CNT_INIT((sc)->rx_cur_desc_cnt, TSEC_RX_NUM_DESC); \ 234185377Ssam} while (0) 235185377Ssam 236185377Ssam#define TSEC_GET_CUR_RX_DESC(sc) \ 237185377Ssam &TSEC_GET_GENERIC(sc, tsec_rx_vaddr, rx_cur_desc_cnt, \ 238185377Ssam TSEC_RX_NUM_DESC) 239185377Ssam 240185377Ssam#define TSEC_BACK_CUR_RX_DESC(sc) \ 241185377Ssam TSEC_BACK_GENERIC(sc, rx_cur_desc_cnt, TSEC_RX_NUM_DESC) 242185377Ssam 243185377Ssam#define TSEC_GET_CUR_RX_DESC_CNT(sc) \ 244185377Ssam ((sc)->rx_cur_desc_cnt) 245185377Ssam 246185377Ssam/* init all counters (for init only!) */ 247185377Ssam#define TSEC_TX_RX_COUNTERS_INIT(sc) do { \ 248185377Ssam TSEC_TX_MAP_CNT_INIT(sc); \ 249185377Ssam TSEC_TX_MBUF_CNT_INIT(sc); \ 250185377Ssam TSEC_TX_DESC_CNT_INIT(sc); \ 251185377Ssam TSEC_RX_DESC_CNT_INIT(sc); \ 252185377Ssam} while (0) 253185377Ssam 254185377Ssam/* read/write bus functions */ 255185377Ssam#define TSEC_READ(sc, reg) \ 256185377Ssam bus_space_read_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg)) 257185377Ssam#define TSEC_WRITE(sc, reg, val) \ 258185377Ssam bus_space_write_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg), (val)) 259185377Ssam 260185377Ssamextern struct mtx tsec_phy_mtx; 261185377Ssam#define TSEC_PHY_LOCK(sc) mtx_lock(&tsec_phy_mtx) 262185377Ssam#define TSEC_PHY_UNLOCK(sc) mtx_unlock(&tsec_phy_mtx) 263185377Ssam#define TSEC_PHY_READ(sc, reg) \ 264185377Ssam bus_space_read_4((sc)->phy_bst, (sc)->phy_bsh, \ 265185377Ssam (reg) + (sc)->phy_regoff) 266185377Ssam#define TSEC_PHY_WRITE(sc, reg, val) \ 267185377Ssam bus_space_write_4((sc)->phy_bst, (sc)->phy_bsh, \ 268185377Ssam (reg) + (sc)->phy_regoff, (val)) 269185377Ssam 270185377Ssam/* Lock for transmitter */ 271185377Ssam#define TSEC_TRANSMIT_LOCK(sc) do { \ 272185377Ssam mtx_assert(&(sc)->receive_lock, MA_NOTOWNED); \ 273185377Ssam mtx_lock(&(sc)->transmit_lock); \ 274185377Ssam} while (0) 275185377Ssam 276185377Ssam#define TSEC_TRANSMIT_UNLOCK(sc) mtx_unlock(&(sc)->transmit_lock) 277185377Ssam#define TSEC_TRANSMIT_LOCK_ASSERT(sc) mtx_assert(&(sc)->transmit_lock, MA_OWNED) 278185377Ssam 279185377Ssam/* Lock for receiver */ 280185377Ssam#define TSEC_RECEIVE_LOCK(sc) do { \ 281185377Ssam mtx_assert(&(sc)->transmit_lock, MA_NOTOWNED); \ 282185377Ssam mtx_lock(&(sc)->receive_lock); \ 283185377Ssam} while (0) 284185377Ssam 285185377Ssam#define TSEC_RECEIVE_UNLOCK(sc) mtx_unlock(&(sc)->receive_lock) 286185377Ssam#define TSEC_RECEIVE_LOCK_ASSERT(sc) mtx_assert(&(sc)->receive_lock, MA_OWNED) 287185377Ssam 288185377Ssam/* Lock for interrupts coalescing */ 289185377Ssam#define TSEC_IC_LOCK(sc) do { \ 290185377Ssam mtx_assert(&(sc)->ic_lock, MA_NOTOWNED); \ 291185377Ssam mtx_lock(&(sc)->ic_lock); \ 292185377Ssam} while (0) 293185377Ssam 294185377Ssam#define TSEC_IC_UNLOCK(sc) mtx_unlock(&(sc)->ic_lock) 295185377Ssam#define TSEC_IC_LOCK_ASSERT(sc) mtx_assert(&(sc)->ic_lock, MA_OWNED) 296185377Ssam 297185377Ssam/* Global tsec lock (with all locks) */ 298185377Ssam#define TSEC_GLOBAL_LOCK(sc) do { \ 299185377Ssam if ((mtx_owned(&(sc)->transmit_lock) ? 1 : 0) != \ 300185377Ssam (mtx_owned(&(sc)->receive_lock) ? 1 : 0)) { \ 301185377Ssam panic("tsec deadlock possibility detection!"); \ 302185377Ssam } \ 303185377Ssam mtx_lock(&(sc)->transmit_lock); \ 304185377Ssam mtx_lock(&(sc)->receive_lock); \ 305185377Ssam} while (0) 306185377Ssam 307185377Ssam#define TSEC_GLOBAL_UNLOCK(sc) do { \ 308185377Ssam TSEC_RECEIVE_UNLOCK(sc); \ 309185377Ssam TSEC_TRANSMIT_UNLOCK(sc); \ 310185377Ssam} while (0) 311185377Ssam 312185377Ssam#define TSEC_GLOBAL_LOCK_ASSERT(sc) do { \ 313185377Ssam TSEC_TRANSMIT_LOCK_ASSERT(sc); \ 314185377Ssam TSEC_RECEIVE_LOCK_ASSERT(sc); \ 315185377Ssam} while (0) 316185377Ssam 317185377Ssam/* From global to {transmit,receive} */ 318185377Ssam#define TSEC_GLOBAL_TO_TRANSMIT_LOCK(sc) do { \ 319185377Ssam mtx_unlock(&(sc)->receive_lock);\ 320185377Ssam} while (0) 321185377Ssam 322185377Ssam#define TSEC_GLOBAL_TO_RECEIVE_LOCK(sc) do { \ 323185377Ssam mtx_unlock(&(sc)->transmit_lock);\ 324185377Ssam} while (0) 325185377Ssam 326185377Ssamstruct tsec_desc { 327185377Ssam volatile uint16_t flags; /* descriptor flags */ 328185377Ssam volatile uint16_t length; /* buffer length */ 329185377Ssam volatile uint32_t bufptr; /* buffer pointer */ 330185377Ssam}; 331185377Ssam 332185377Ssam#define TSEC_READ_RETRY 10000 333185377Ssam#define TSEC_READ_DELAY 100 334185377Ssam 335185377Ssam/* Structures and defines for TCP/IP Off-load */ 336185377Ssamstruct tsec_tx_fcb { 337185377Ssam volatile uint16_t flags; 338185377Ssam volatile uint8_t l4_offset; 339185377Ssam volatile uint8_t l3_offset; 340185377Ssam volatile uint16_t ph_chsum; 341185377Ssam volatile uint16_t vlan; 342185377Ssam}; 343185377Ssam 344185377Ssamstruct tsec_rx_fcb { 345185377Ssam volatile uint16_t flags; 346185377Ssam volatile uint8_t rq_index; 347185377Ssam volatile uint8_t protocol; 348185377Ssam volatile uint16_t unused; 349185377Ssam volatile uint16_t vlan; 350185377Ssam}; 351185377Ssam 352185377Ssam#define TSEC_CHECKSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 353185377Ssam 354185377Ssam#define TSEC_TX_FCB_IP4 TSEC_TX_FCB_L3_IS_IP 355185377Ssam#define TSEC_TX_FCB_IP6 (TSEC_TX_FCB_L3_IS_IP | TSEC_TX_FCB_L3_IS_IP6) 356185377Ssam 357185377Ssam#define TSEC_TX_FCB_TCP TSEC_TX_FCB_L4_IS_TCP_UDP 358185377Ssam#define TSEC_TX_FCB_UDP (TSEC_TX_FCB_L4_IS_TCP_UDP | TSEC_TX_FCB_L4_IS_UDP) 359185377Ssam 360185377Ssam#define TSEC_RX_FCB_IP_CSUM_CHECKED(flags) \ 361185377Ssam ((flags & (TSEC_RX_FCB_IP_FOUND | TSEC_RX_FCB_IP6_FOUND | \ 362185377Ssam TSEC_RX_FCB_IP_CSUM | TSEC_RX_FCB_PARSE_ERROR)) \ 363185377Ssam == (TSEC_RX_FCB_IP_FOUND | TSEC_RX_FCB_IP_CSUM)) 364185377Ssam 365185377Ssam#define TSEC_RX_FCB_TCP_UDP_CSUM_CHECKED(flags) \ 366185377Ssam ((flags & (TSEC_RX_FCB_TCP_UDP_FOUND | TSEC_RX_FCB_TCP_UDP_CSUM \ 367185377Ssam | TSEC_RX_FCB_PARSE_ERROR)) \ 368185377Ssam == (TSEC_RX_FCB_TCP_UDP_FOUND | TSEC_RX_FCB_TCP_UDP_CSUM)) 369185377Ssam 370185377Ssam/* Prototypes */ 371185377Ssamextern devclass_t tsec_devclass; 372185377Ssam 373185377Ssamint tsec_attach(struct tsec_softc *sc); 374185377Ssamint tsec_detach(struct tsec_softc *sc); 375185377Ssam 376185377Ssamvoid tsec_error_intr(void *arg); 377185377Ssamvoid tsec_receive_intr(void *arg); 378185377Ssamvoid tsec_transmit_intr(void *arg); 379185377Ssam 380185377Ssamint tsec_miibus_readreg(device_t dev, int phy, int reg); 381185377Ssamint tsec_miibus_writereg(device_t dev, int phy, int reg, int value); 382185377Ssamvoid tsec_miibus_statchg(device_t dev); 383185377Ssamint tsec_resume(device_t dev); /* XXX */ 384185377Ssamint tsec_shutdown(device_t dev); 385185377Ssamint tsec_suspend(device_t dev); /* XXX */ 386185377Ssam 387185377Ssamvoid tsec_get_hwaddr(struct tsec_softc *sc, uint8_t *addr); 388185377Ssam 389185377Ssam#endif /* _IF_TSEC_H */ 390185377Ssam