338637 |
13-Sep-2018 |
marius |
MFC: r333647, r338275, r338280, r338513
- If present, take advantage of the R/W cache of eMMC revision 1.5 and later devices. These caches work akin to the ones found in HDDs/SSDs that ada(4)/da(4) also enable if existent, but likewise increase the likelihood of data loss in case of a sudden power outage etc. On the other hand, write performance is up to twice as high for e. g. 1 GiB files depending on the actual chip and transfer mode employed. For maximum data integrity, the usage of eMMC caches can be disabled via the hw.mmcsd.cache tunable. - Get rid of the NOP mmcsd_open(). - Obtain the bus mode (MMC or SD) from the directly superordinated bus rather than reaching up to the bridge and use the cached mode in mmcsd_delete(), too. - Use le32dec(9) for decoding EXT_CSD values where it makes sense. [1] - Locally cache some instance variable values in mmc_discover_cards() in order to improve the code readability a bit.
Obtained from: NetBSD [1] |
338476 |
05-Sep-2018 |
marius |
MFC: r338304
The read accessors generated by __BUS_ACCESSOR() have the problem that they don't check the result of BUS_READ_IVAR(9) and silently return stack garbage on failure in case a bus doesn't implement a particular instance variable for example. With MMC bridges not providing MMCBR_IVAR_RETUNE_REQ, yet, this in turn can cause mmc(4) to get into a state in which re-tuning seems to be necessary but is inappropriate, causing mmc_wait_for_request() to fail. Thus, don't use __BUS_ACCESSOR() for mmcbr_get_retune_req() and instead provide a version of the latter which returns retune_req_none if reading MMCBR_IVAR_RETUNE_REQ fails. |
331036 |
15-Mar-2018 |
marius |
MFC: r327355, r327926
- Don't allow userland to switch partitions; it's next to impossible to recover from that, especially when something goes wrong. - When userland changes EXT_CSD, update the kernel copy before using relevant EXT_CSD bits in mmcsd_switch_part(). |
322388 |
11-Aug-2017 |
marius |
MFC: r322209
- If available, use TRIM instead of ERASE for implementing BIO_DELETE. This also involves adding a quirk table as TRIM is broken for some Kingston eMMC devices, though. Compared to ERASE (declared "legacy" in the eMMC specification v5.1), TRIM has the advantage of operating on write sectors rather than on erase sectors, which typically are of a much larger size. Thus, employing TRIM, we don't need to fiddle with coalescing BIO_DELETE requests that are also of (write) sector units into erase sectors, which might not even add up in all cases. - For some SanDisk iNAND devices, the CMD38 argument, e. g. ERASE, TRIM etc., has to be specified via EXT_CSD[113], which now is also handled via a quirk. - My initial understanding was that for eMMC partitions, the granularity should be used as erase sector size, e. g. 128 KB for boot partitions. However, rereading the relevant parts of the eMMC specification v5.1, this isn't actually correct. So drop the code which used partition granularities for delmaxsize and stripesize. For the most part, this change is a NOP, though, because a) for ERASE, mmcsd_delete() used the erase sector size unconditionally for all partitions anyway and b) g_disk_limit() doesn't actually take the stripesize into account. - Take some more advantage of mmcsd_errmsg() in mmcsd(4) for making error codes human readable. |
322119 |
06-Aug-2017 |
marius |
MFC: r319350, r321385, r321490, r321588, r321948
o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2.
o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4).
On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318494 in stable/11).
However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards.
Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices.
o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic.
o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working.
o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1]
o Fix missing variable initialization in mmc_switch_status(). [2]
o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3]
o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4].
o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5]
o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9).
o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void.
o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI.
o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4).
o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead.
o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver.
o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses).
Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
318494 |
18-May-2017 |
marius |
MFC: r315598
o Add support for eMMC DDR bus speed mode up to 52 MHz to sdhci(4) and mmc(4). Given that support for DDR52 is not denoted by SDHCI capability registers, availability of that timing is indicated by a new quirk SDHCI_QUIRK_MMC_DDR52 and only enabled for Intel SDHCI controllers so far.
Compared to 50 MHz at SDR high speed typically yielding ~45 MB/s read throughput with the eMMC chips tested, read performance goes up to ~80 MB/s at DDR52.
As a side-effect, this change also fixes communication with some eMMC devices at SDR high speed mode due to the signaling voltage and UHS bits in the SDHCI controller no longer being left in an inappropriate state.
o In sdhci(4), add two tunables hw.sdhci.quirk_clear as well as hw.sdhci.quirk_set, which (when hooked up in the front-end) allow to set/clear sdhci(4) quirks for debugging and testing purposes. However, especially for SDHCI controllers on the PCI bus which have no specific support code so far and, thus, are picked up as generic SDHCI controllers, hw.sdhci.quirk_set allows for setting the necessary quirks (if required).
o In mmc(4), check and handle the return values of some more function calls instead of assuming that everything went right. In case failures actually are not problematic, indicate that by casting the return value to void. |
318197 |
11-May-2017 |
marius |
MFC: r312939, r313250, r314811 (partial), r314887 (partial), r315760, r315845, 315430, r317981, r315466
o Fix some overly long lines, whitespace and other bugs according to style(9) as well as spelling etc. in mmc(4), mmcsd(4) and sdhci(4).
o In the mmc(4) bridges and sdhci(4) (bus) front-ends: - Remove redundant assignments of the default bus_generic_print_child device method, - use DEVMETHOD_END, - use NULL instead of 0 for pointers.
o Trim/adjust includes.
o Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges as kernel drivers and their dependency onto mmc(4).
o Add support for eMMC "partitions". Besides the user data area, i. e. the default partition, eMMC v4.41 and later devices can additionally provide up to: 1 enhanced user data area partition 2 boot partitions 1 RPMB (Replay Protected Memory Block) partition 4 general purpose partitions (optionally with a enhanced or extended attribute)
Besides simply subdividing eMMC devices, some Intel NUCs having UEFI code in the boot partitions etc., another use case for the partition support is the activation of pseudo-SLC mode, which manufacturers of eMMC chips typically associate with the enhanced user data area and/ or the enhanced attribute of general purpose partitions.
CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.
o Now that properly issuing CMD6 is crucial (so data isn't written to the wrong partition for example), make a step into the direction of correctly handling the timeout for these commands in the MMC layer. Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as recommended by relevant specifications.
o Add an IOCTL interface to mmcsd(4); this is sufficiently compatible with Linux so that the GNU mmc-utils can be ported to and used with FreeBSD (note that due to the remaining deficiencies outlined above SANITIZE operations issued by/with `mmc` currently most likely will fail). These latter have been added to ports as sysutils/mmc-utils. Among others, the `mmc` tool of mmc-utils allows for partitioning eMMC devices (tested working).
o For devices following the eMMC specification v4.41 or later, year 0 is 2013 rather than 1997; so correct this for assembling the device ID string properly.
o Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at least for some of the above a matching pair is required.
o In the ACPI front-end of sdhci(4) describe the Intel eMMC and SDXC controllers as such in order to match the PCI one. Additionally, in the entry for the 80860F14 SDXC controller remove the eMMC-only SDHCI_QUIRK_INTEL_POWER_UP_RESET. |
312399 |
18-Jan-2017 |
marius |
MFC: r310309, r310340-310341, r311664, r311793-r311794
o sdhci/mmc: Minor whitespace cleanups
o Add Braswell PCI IDs for Intel Cherryview
o mmc: Accept even lower voltage for Cherryview
And HP x2 210, per DragonFlyBSD 240bd9cd58f8259c12c14a8006837e698.
o In mmcsd_task(), bio_resid was not being set to 0 on a successful read or write, resulting in random short-read and short-write returns for requests. Fixing this fixes nominal block I/O via mmcsd(4).
Obtained from: DragonFlyBSD (fd4b97583be1a1e57234713c25f6e81bc0411cb0)
o Add support for Intel Apollo Lake and Bay Trail eMMC PCI controllers.
o Flesh out the support for Intel Braswell eMMC controllers further.
o In sdhci_init_slot(), use the right capability field for determining the announced bus width based on MMC_CAP_*_BIT_DATA. |
295707 |
17-Feb-2016 |
imp |
Create an API to reset a struct bio (g_reset_bio). This is mandatory for all struct bio you get back from g_{new,alloc}_bio. Temporary bios that you create on the stack or elsewhere should use this before first use of the bio, and between uses of the bio. At the moment, it is nothing more than a wrapper around bzero, but that may change in the future. The wrapper also removes one place where we encode the size of struct bio in the KBI.
|
287371 |
01-Sep-2015 |
andrew |
Add support for the DesignWare MMC hardware in the HiSilicon hi6220. This SoC is used in the HiKey board from 96boards.
Currently on the SD card is working on the HiKey, as such devices 0 and 2 will need to be disabled, for example by adding the following to loader.conf:
hint.hisi_dwmmc.0.disabled=1 hint.hisi_dwmmc.2.disabled=1
Relnotes: yes (Hikey board booting) Sponsored by: ABT Systems Ltd
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287367 |
01-Sep-2015 |
andrew |
Finish allowing the dwmmc driver to be subclassed, move the softc to a new header, along with the hwtype enum, device attach prototype, and driver_t.
Sponsored by: ABT Systems Ltd
|
283128 |
19-May-2015 |
imp |
Re-select the SD card before getting the SD status. On a couple Atmel boards, this prevents some error messages during enumeration and also gives us the correct erase block size. They appear to be harmless elsewhere.
# Note: we treat too many commands as 'can't fail' if they don't work # after a couple of retries. We need to fix that, but not today...
|
276106 |
23-Dec-2014 |
imp |
Always select the card before we do the 4.x specific stuff and deselect it after setting the block size. This is a similar bug that was fixed elsewhere, but not here. This makes sure that we leave the card deselected at the end of the loop, and we don't send any commands to the card without it selected.
Reviewed by: ian@
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275951 |
20-Dec-2014 |
ian |
Log mmc and sd command failures. Reporting of routine expected errors, such as timeouts while probing a bus or testing for a feature, is squelched. Also, error reporting is limited to 5 events per second, because when an sdcard goes bad on a low-end embedded board, flooding the console at high speed isn't helpful.
Original logging code contributed by Michal Meloun, but then I fancied it up with squelching and ppsratecheck.
|
275905 |
18-Dec-2014 |
imp |
Don't deselect the card too soon. To set the block size or switch the function parameters, the card has to be in transfer state. If it is in the idle state, the commands are ignored. This caused us not to set the proper parameters that we later assume to be present, leading to downstream failures of the card / interface as our state machine mismatches the card's.
Submitted by: Svatopluk Kraus <onwahe at gmail.com>, Michal Meloun <meloun at miracle.cz>
|
273180 |
16-Oct-2014 |
imp |
fwsectors and fwheads used to be somehwat arbitrary. However, they are used to align partitions in gpart. We also try to align partitions by stripe size when creating new media. Align these two concepts by making fwsectors the same as the stripe size. Select a sensible number of heads so we wind up with about 20 cylinders. This number was selected to keep the rounding effects to a few percent while keeping the number of cylinder groups low.
Sadly, it is not possible to make these numbers match the numbers used by SD card readers. There apperas to be much variation between brands so there's no one universal number. These numbers are also not aligned to the stripe size, so some performance problems may still be present when SD cards are created this way.
Also, these numbers will differ from the far less common SD to ATA adapters, which present a different, but more uniform, set of numbers that also happened to match the old defaults.
Nothing should change for current users. Any suboptimal performance caused by misalignment will still be there. gpart will honor the partitions that aren't on proper boudnaries, but editing the partition tables may result in different alignments being used than before when editing things natively.
Ideally, there'd be some way to override these values in the disk subsystem by the user for the USB adapter use case where all "native" notions of geometry disappear. This does not implement that.
|
269341 |
31-Jul-2014 |
ian |
Export an mmc or sd card's serial number from the mmc layer as an ivar. In the mmcsd layer use this value to populate disk->d_ident. Also set disk->d_descr to the full set of card identification info (includes vendor, model, manufacturing date, etc).
|
254559 |
20-Aug-2013 |
ian |
Make the standard sdhci(4) driver work for the TI OMAP family SoCs. The MMCHS hardware is pretty much a standard SDHCI v2.0 controller with a couple quirks, which are now supported by sdhci(4) as of r254507.
This should work for all TI SoCs that use the MMCHS hardware, but it has only been tested on AM335x right now, so this enables it on those platforms but leaves the existing ti_mmchs driver in place for other OMAP variants until they can be tested.
This initial incarnation lacks DMA support (coming soon). Even without it this improves performance pretty noticibly over the ti_mmchs driver, primarily because it now does multiblock IO.
|
254431 |
16-Aug-2013 |
ian |
Handle command retries for commands originating at the mmc layer, and ensure that all such commands have a non-zero retry count except for those that are expected to fail (for example, because they are used to probe for feature support).
While it is possible to pass a retry count down to the hardware driver in the command request structure, no hardware driver currently implements any retry logic. The hardware doesn't know much about the context of a single request, so it makes more sense to handle retries at a layer that does.
This adds retry loops to the mmc_wait_for_cmd() and mmc_wait_for_app_cmd() functions. These functions are the gateway from other code within mmc.c to the hardware. App commands are a sequence of two commands and a retry has to rerun both of them in order, so it needs its own retry loop.
Retry looping is specifically NOT implemented in mmc_wait_for_request() because it is the gateway for children on the bus, and they have to implement their own retry logic depending on what makes sense for them.
|
250709 |
16-May-2013 |
imp |
When reporting the user readable size, round up. Several SD cards not only use SI units, but also are a couple of percent short. If you need to know the exact size, diskinfo will return exact results.
|
234524 |
21-Apr-2012 |
marius |
o Fixes: - When switching to 4-bit operation, send a SET_CLR_CARD_DETECT command to disconnect the card-detect pull-up resistor from the DAT3 line before sending the SET_BUS_WIDTH command. - Add the missing "reserved" zero entry to the mantissa table used to decode various CSD fields. This was causing SD cards to report that they could run at 30 MHz instead of the maximum 25 MHz mandated in the spec. o Enhancements: - At the MMC layer, format various info from the CID into a string that uniquely identifies the card instance (manufacturer number, serial number, product name and revision, etc). Export it as an instance variable. - At the MMCSD layer, display the formatted card ID string, and also report the clock speed of the hardware (not the card's max speed), and the number of bits and number of blocks per transfer. It comes out like this now: mmcsd0: 968MB <SD SD01G 8.0 SN 276886905 MFG 08/2008 by 3 SD> at mmc0 22.5MHz/4bit/128-block o Use DEVMETHOD_END. o Use NULL instead of 0 for pointers.
PR: 156496 Submitted by: Ian Lepore MFC after: 1 week
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196037 |
02-Aug-2009 |
attilio |
Make the newbus subsystem Giant free by adding the new newbus sxlock. The newbus lock is responsible for protecting newbus internIal structures, device states and devclass flags. It is necessary to hold it when all such datas are accessed. For the other operations, softc locking should ensure enough protection to avoid races.
Newbus lock is automatically held when virtual operations on the device and bus are invoked when loading the driver or when the suspend/resume take place. For other 'spourious' operations trying to access/modify the newbus topology, newbus lock needs to be automatically acquired and dropped.
For the moment Giant is also acquired in some key point (modules subsystem) in order to avoid problems before the 8.0 release as module handlers could make assumptions about it. This Giant locking should go just after the release happens.
Please keep in mind that the public interface can be expanded in order to provide more support, if there are really necessities at some point and also some bugs could arise as long as the patch needs a bit of further testing.
Bump __FreeBSD_version in order to reflect the newbus lock introduction.
Reviewed by: ed, hps, jhb, imp, mav, scottl No answer by: ariff, thompsa, yongari Tested by: pho, G. Trematerra <giovanni dot trematerra at gmail dot com>, Brandon Gooch <jamesbrandongooch at gmail dot com> Sponsored by: Yahoo! Incorporated Approved by: re (ksmith)
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187551 |
21-Jan-2009 |
imp |
Default to normal bus timing mode on SD cards. In practice, most cards people have today support high speed mode, so the timing field would be initialized to bus_timing_hs, but there are some slow cards...
|
185721 |
06-Dec-2008 |
mav |
Implement suspend/resume for mmc and mmcsd drivers. Now it is possible to suspend/resume with inserted and active card.
To reinitialize card on resume and to detect card change while suspended, implement bus rescan routines. It can also be used by controllers without card presence detection signals or with multiple cards per slot support.
While there, cleanup msleep() usage. We have no any rights to exit without "request done" signal from driver as it could lead to modify after free.
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170002 |
26-May-2007 |
imp |
A careful reading of the disclaimer that is required to download the SD Simplified specification, as well as other SD and SDIO implemenations I've examined, suggest this disclaimer may be required. It is unclear to me exactly what the license would be for, or why it might be required. Err on the side of caution and include this disclaimer so anybody deploying this code can judge for themselves. I have no further unformation about the details.
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163516 |
20-Oct-2006 |
imp |
Preliminary MMC stack. This stack supports SD 1.0 cards only, but should be easily adapted to SD 2.0 (aka SDHC), SDIO, MMC and MMCplus cards. At the present time, there's only one bridge driver for the ARM9 based Atmel AT91RM9200.
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