mmc.c revision 318494
1/*- 2 * Copyright (c) 2006 Bernd Walter. All rights reserved. 3 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * Portions of this software may have been developed with reference to 27 * the SD Simplified Specification. The following disclaimer may apply: 28 * 29 * The following conditions apply to the release of the simplified 30 * specification ("Simplified Specification") by the SD Card Association and 31 * the SD Group. The Simplified Specification is a subset of the complete SD 32 * Specification which is owned by the SD Card Association and the SD 33 * Group. This Simplified Specification is provided on a non-confidential 34 * basis subject to the disclaimers below. Any implementation of the 35 * Simplified Specification may require a license from the SD Card 36 * Association, SD Group, SD-3C LLC or other third parties. 37 * 38 * Disclaimers: 39 * 40 * The information contained in the Simplified Specification is presented only 41 * as a standard specification for SD Cards and SD Host/Ancillary products and 42 * is provided "AS-IS" without any representations or warranties of any 43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44 * Card Association for any damages, any infringements of patents or other 45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 46 * parties, which may result from its use. No license is granted by 47 * implication, estoppel or otherwise under any patent or other rights of the 48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50 * or the SD Card Association to disclose or distribute any technical 51 * information, know-how or other confidential information to any third party. 52 */ 53 54#include <sys/cdefs.h> 55__FBSDID("$FreeBSD: stable/11/sys/dev/mmc/mmc.c 318494 2017-05-18 20:46:20Z marius $"); 56 57#include <sys/param.h> 58#include <sys/systm.h> 59#include <sys/kernel.h> 60#include <sys/malloc.h> 61#include <sys/lock.h> 62#include <sys/module.h> 63#include <sys/mutex.h> 64#include <sys/bus.h> 65#include <sys/endian.h> 66#include <sys/sysctl.h> 67#include <sys/time.h> 68 69#include <dev/mmc/bridge.h> 70#include <dev/mmc/mmc_private.h> 71#include <dev/mmc/mmc_subr.h> 72#include <dev/mmc/mmcreg.h> 73#include <dev/mmc/mmcbrvar.h> 74#include <dev/mmc/mmcvar.h> 75 76#include "mmcbr_if.h" 77#include "mmcbus_if.h" 78 79CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY); 80 81/* 82 * Per-card data 83 */ 84struct mmc_ivars { 85 uint32_t raw_cid[4]; /* Raw bits of the CID */ 86 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 87 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 88 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */ 89 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 90 uint16_t rca; 91 enum mmc_card_mode mode; 92 struct mmc_cid cid; /* cid decoded */ 93 struct mmc_csd csd; /* csd decoded */ 94 struct mmc_scr scr; /* scr decoded */ 95 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 96 u_char read_only; /* True when the device is read-only */ 97 u_char bus_width; /* Bus width to use */ 98 u_char high_cap; /* High Capacity card (block addressed) */ 99 uint32_t sec_count; /* Card capacity in 512byte blocks */ 100 uint32_t timings; /* Mask of bus timings supported */ 101 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 102 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 103 uint32_t tran_speed; /* Max speed in normal mode */ 104 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 105 uint32_t erase_sector; /* Card native erase sector size */ 106 uint32_t cmd6_time; /* Generic switch timeout [us] */ 107 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 108 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 109}; 110 111#define CMD_RETRIES 3 112 113static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver"); 114 115static int mmc_debug; 116SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0, 117 "Debug level"); 118 119/* bus entry points */ 120static int mmc_acquire_bus(device_t busdev, device_t dev); 121static int mmc_attach(device_t dev); 122static int mmc_child_location_str(device_t dev, device_t child, char *buf, 123 size_t buflen); 124static int mmc_detach(device_t dev); 125static int mmc_probe(device_t dev); 126static int mmc_read_ivar(device_t bus, device_t child, int which, 127 uintptr_t *result); 128static int mmc_release_bus(device_t busdev, device_t dev); 129static int mmc_resume(device_t dev); 130static int mmc_suspend(device_t dev); 131static int mmc_wait_for_request(device_t brdev, device_t reqdev, 132 struct mmc_request *req); 133static int mmc_write_ivar(device_t bus, device_t child, int which, 134 uintptr_t value); 135 136#define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 137#define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 138#define MMC_LOCK_INIT(_sc) \ 139 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \ 140 "mmc", MTX_DEF) 141#define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 142#define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED); 143#define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED); 144 145static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid); 146static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 147static void mmc_app_decode_sd_status(uint32_t *raw_sd_status, 148 struct mmc_sd_status *sd_status); 149static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, 150 uint32_t *rawsdstatus); 151static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, 152 uint32_t *rawscr); 153static int mmc_calculate_clock(struct mmc_softc *sc); 154static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, 155 bool is_4_41p); 156static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid); 157static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd); 158static void mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd); 159static void mmc_delayed_attach(void *xsc); 160static int mmc_delete_cards(struct mmc_softc *sc); 161static void mmc_discover_cards(struct mmc_softc *sc); 162static void mmc_format_card_id_string(struct mmc_ivars *ivar); 163static void mmc_go_discovery(struct mmc_softc *sc); 164static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, 165 int size); 166static int mmc_highest_voltage(uint32_t ocr); 167static void mmc_idle_cards(struct mmc_softc *sc); 168static void mmc_ms_delay(int ms); 169static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); 170static void mmc_power_down(struct mmc_softc *sc); 171static void mmc_power_up(struct mmc_softc *sc); 172static void mmc_rescan_cards(struct mmc_softc *sc); 173static void mmc_scan(struct mmc_softc *sc); 174static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, 175 uint8_t value, uint8_t *res); 176static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 177static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr); 178static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, 179 uint32_t *rocr); 180static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd); 181static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs); 182static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, 183 uint32_t *rocr); 184static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp); 185static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len); 186static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar); 187static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar); 188static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp); 189static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 190 enum mmc_bus_timing timing); 191static int mmc_test_bus_width(struct mmc_softc *sc); 192static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar, 193 enum mmc_bus_timing timing); 194static const char *mmc_timing_to_string(enum mmc_bus_timing timing); 195static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 196 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 197static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req); 198static void mmc_wakeup(struct mmc_request *req); 199 200static void 201mmc_ms_delay(int ms) 202{ 203 204 DELAY(1000 * ms); /* XXX BAD */ 205} 206 207static int 208mmc_probe(device_t dev) 209{ 210 211 device_set_desc(dev, "MMC/SD bus"); 212 return (0); 213} 214 215static int 216mmc_attach(device_t dev) 217{ 218 struct mmc_softc *sc; 219 220 sc = device_get_softc(dev); 221 sc->dev = dev; 222 MMC_LOCK_INIT(sc); 223 224 /* We'll probe and attach our children later, but before / mount */ 225 sc->config_intrhook.ich_func = mmc_delayed_attach; 226 sc->config_intrhook.ich_arg = sc; 227 if (config_intrhook_establish(&sc->config_intrhook) != 0) 228 device_printf(dev, "config_intrhook_establish failed\n"); 229 return (0); 230} 231 232static int 233mmc_detach(device_t dev) 234{ 235 struct mmc_softc *sc = device_get_softc(dev); 236 int err; 237 238 if ((err = mmc_delete_cards(sc)) != 0) 239 return (err); 240 mmc_power_down(sc); 241 MMC_LOCK_DESTROY(sc); 242 243 return (0); 244} 245 246static int 247mmc_suspend(device_t dev) 248{ 249 struct mmc_softc *sc = device_get_softc(dev); 250 int err; 251 252 err = bus_generic_suspend(dev); 253 if (err) 254 return (err); 255 mmc_power_down(sc); 256 return (0); 257} 258 259static int 260mmc_resume(device_t dev) 261{ 262 struct mmc_softc *sc = device_get_softc(dev); 263 264 mmc_scan(sc); 265 return (bus_generic_resume(dev)); 266} 267 268static int 269mmc_acquire_bus(device_t busdev, device_t dev) 270{ 271 struct mmc_softc *sc; 272 struct mmc_ivars *ivar; 273 int err, rca; 274 enum mmc_bus_timing timing; 275 276 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 277 if (err) 278 return (err); 279 sc = device_get_softc(busdev); 280 MMC_LOCK(sc); 281 if (sc->owner) 282 panic("mmc: host bridge didn't serialize us."); 283 sc->owner = dev; 284 MMC_UNLOCK(sc); 285 286 if (busdev != dev) { 287 /* 288 * Keep track of the last rca that we've selected. If 289 * we're asked to do it again, don't. We never 290 * unselect unless the bus code itself wants the mmc 291 * bus, and constantly reselecting causes problems. 292 */ 293 ivar = device_get_ivars(dev); 294 rca = ivar->rca; 295 if (sc->last_rca != rca) { 296 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 297 device_printf(sc->dev, "Card at relative " 298 "address %d failed to select.\n", rca); 299 return (ENXIO); 300 } 301 sc->last_rca = rca; 302 timing = mmcbr_get_timing(busdev); 303 /* Prepare bus width for the new card. */ 304 if (bootverbose || mmc_debug) { 305 device_printf(busdev, 306 "setting bus width to %d bits %s timing\n", 307 (ivar->bus_width == bus_width_4) ? 4 : 308 (ivar->bus_width == bus_width_8) ? 8 : 1, 309 mmc_timing_to_string(timing)); 310 } 311 if (mmc_set_card_bus_width(sc, ivar) != MMC_ERR_NONE) { 312 device_printf(sc->dev, "Card at relative " 313 "address %d failed to set bus width.\n", 314 rca); 315 return (ENXIO); 316 } 317 if (isset(&ivar->vccq_120, timing)) 318 mmcbr_set_vccq(busdev, vccq_120); 319 else if (isset(&ivar->vccq_180, timing)) 320 mmcbr_set_vccq(busdev, vccq_180); 321 else 322 mmcbr_set_vccq(busdev, vccq_330); 323 if (mmcbr_switch_vccq(busdev) != 0) { 324 device_printf(sc->dev, "Failed to set VCCQ " 325 "for card at relative address %d.\n", rca); 326 return (ENXIO); 327 } 328 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) { 329 device_printf(sc->dev, "Card at relative " 330 "address %d failed to set power class.\n", 331 rca); 332 return (ENXIO); 333 } 334 mmcbr_set_bus_width(busdev, ivar->bus_width); 335 mmcbr_update_ios(busdev); 336 } 337 } else { 338 /* 339 * If there's a card selected, stand down. 340 */ 341 if (sc->last_rca != 0) { 342 mmc_select_card(sc, 0); 343 sc->last_rca = 0; 344 } 345 } 346 347 return (0); 348} 349 350static int 351mmc_release_bus(device_t busdev, device_t dev) 352{ 353 struct mmc_softc *sc; 354 int err; 355 356 sc = device_get_softc(busdev); 357 358 MMC_LOCK(sc); 359 if (!sc->owner) 360 panic("mmc: releasing unowned bus."); 361 if (sc->owner != dev) 362 panic("mmc: you don't own the bus. game over."); 363 MMC_UNLOCK(sc); 364 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 365 if (err) 366 return (err); 367 MMC_LOCK(sc); 368 sc->owner = NULL; 369 MMC_UNLOCK(sc); 370 return (0); 371} 372 373static uint32_t 374mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 375{ 376 377 return (ocr & MMC_OCR_VOLTAGE); 378} 379 380static int 381mmc_highest_voltage(uint32_t ocr) 382{ 383 int i; 384 385 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT; 386 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--) 387 if (ocr & (1 << i)) 388 return (i); 389 return (-1); 390} 391 392static void 393mmc_wakeup(struct mmc_request *req) 394{ 395 struct mmc_softc *sc; 396 397 sc = (struct mmc_softc *)req->done_data; 398 MMC_LOCK(sc); 399 req->flags |= MMC_REQ_DONE; 400 MMC_UNLOCK(sc); 401 wakeup(req); 402} 403 404static int 405mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 406{ 407 408 req->done = mmc_wakeup; 409 req->done_data = sc; 410 if (mmc_debug > 1) { 411 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x", 412 req->cmd->opcode, req->cmd->arg, req->cmd->flags); 413 if (req->cmd->data) { 414 printf(" data %d\n", (int)req->cmd->data->len); 415 } else 416 printf("\n"); 417 } 418 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 419 MMC_LOCK(sc); 420 while ((req->flags & MMC_REQ_DONE) == 0) 421 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0); 422 MMC_UNLOCK(sc); 423 if (mmc_debug > 2 || (mmc_debug > 0 && req->cmd->error != MMC_ERR_NONE)) 424 device_printf(sc->dev, "CMD%d RESULT: %d\n", 425 req->cmd->opcode, req->cmd->error); 426 return (0); 427} 428 429static int 430mmc_wait_for_request(device_t brdev, device_t reqdev __unused, 431 struct mmc_request *req) 432{ 433 struct mmc_softc *sc = device_get_softc(brdev); 434 435 return (mmc_wait_for_req(sc, req)); 436} 437 438static int 439mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 440 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 441{ 442 struct mmc_command cmd; 443 int err; 444 445 memset(&cmd, 0, sizeof(cmd)); 446 cmd.opcode = opcode; 447 cmd.arg = arg; 448 cmd.flags = flags; 449 cmd.data = NULL; 450 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries); 451 if (err) 452 return (err); 453 if (resp) { 454 if (flags & MMC_RSP_136) 455 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 456 else 457 *resp = cmd.resp[0]; 458 } 459 return (0); 460} 461 462static void 463mmc_idle_cards(struct mmc_softc *sc) 464{ 465 device_t dev; 466 struct mmc_command cmd; 467 468 dev = sc->dev; 469 mmcbr_set_chip_select(dev, cs_high); 470 mmcbr_update_ios(dev); 471 mmc_ms_delay(1); 472 473 memset(&cmd, 0, sizeof(cmd)); 474 cmd.opcode = MMC_GO_IDLE_STATE; 475 cmd.arg = 0; 476 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 477 cmd.data = NULL; 478 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 479 mmc_ms_delay(1); 480 481 mmcbr_set_chip_select(dev, cs_dontcare); 482 mmcbr_update_ios(dev); 483 mmc_ms_delay(1); 484} 485 486static int 487mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 488{ 489 struct mmc_command cmd; 490 int err = MMC_ERR_NONE, i; 491 492 memset(&cmd, 0, sizeof(cmd)); 493 cmd.opcode = ACMD_SD_SEND_OP_COND; 494 cmd.arg = ocr; 495 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 496 cmd.data = NULL; 497 498 for (i = 0; i < 1000; i++) { 499 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd, 500 CMD_RETRIES); 501 if (err != MMC_ERR_NONE) 502 break; 503 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 504 (ocr & MMC_OCR_VOLTAGE) == 0) 505 break; 506 err = MMC_ERR_TIMEOUT; 507 mmc_ms_delay(10); 508 } 509 if (rocr && err == MMC_ERR_NONE) 510 *rocr = cmd.resp[0]; 511 return (err); 512} 513 514static int 515mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 516{ 517 struct mmc_command cmd; 518 int err = MMC_ERR_NONE, i; 519 520 memset(&cmd, 0, sizeof(cmd)); 521 cmd.opcode = MMC_SEND_OP_COND; 522 cmd.arg = ocr; 523 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 524 cmd.data = NULL; 525 526 for (i = 0; i < 1000; i++) { 527 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 528 if (err != MMC_ERR_NONE) 529 break; 530 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 531 (ocr & MMC_OCR_VOLTAGE) == 0) 532 break; 533 err = MMC_ERR_TIMEOUT; 534 mmc_ms_delay(10); 535 } 536 if (rocr && err == MMC_ERR_NONE) 537 *rocr = cmd.resp[0]; 538 return (err); 539} 540 541static int 542mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 543{ 544 struct mmc_command cmd; 545 int err; 546 547 memset(&cmd, 0, sizeof(cmd)); 548 cmd.opcode = SD_SEND_IF_COND; 549 cmd.arg = (vhs << 8) + 0xAA; 550 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 551 cmd.data = NULL; 552 553 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 554 return (err); 555} 556 557static void 558mmc_power_up(struct mmc_softc *sc) 559{ 560 device_t dev; 561 enum mmc_vccq vccq; 562 563 dev = sc->dev; 564 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 565 mmcbr_set_bus_mode(dev, opendrain); 566 mmcbr_set_chip_select(dev, cs_dontcare); 567 mmcbr_set_bus_width(dev, bus_width_1); 568 mmcbr_set_power_mode(dev, power_up); 569 mmcbr_set_clock(dev, 0); 570 mmcbr_update_ios(dev); 571 for (vccq = vccq_330; ; vccq--) { 572 mmcbr_set_vccq(dev, vccq); 573 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120) 574 break; 575 } 576 mmc_ms_delay(1); 577 578 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 579 mmcbr_set_timing(dev, bus_timing_normal); 580 mmcbr_set_power_mode(dev, power_on); 581 mmcbr_update_ios(dev); 582 mmc_ms_delay(2); 583} 584 585static void 586mmc_power_down(struct mmc_softc *sc) 587{ 588 device_t dev = sc->dev; 589 590 mmcbr_set_bus_mode(dev, opendrain); 591 mmcbr_set_chip_select(dev, cs_dontcare); 592 mmcbr_set_bus_width(dev, bus_width_1); 593 mmcbr_set_power_mode(dev, power_off); 594 mmcbr_set_clock(dev, 0); 595 mmcbr_set_timing(dev, bus_timing_normal); 596 mmcbr_update_ios(dev); 597} 598 599static int 600mmc_select_card(struct mmc_softc *sc, uint16_t rca) 601{ 602 int flags; 603 604 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 605 return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 606 flags, NULL, CMD_RETRIES)); 607} 608 609static int 610mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, 611 uint8_t *res) 612{ 613 int err; 614 struct mmc_command cmd; 615 struct mmc_data data; 616 617 memset(&cmd, 0, sizeof(cmd)); 618 memset(&data, 0, sizeof(data)); 619 memset(res, 0, 64); 620 621 cmd.opcode = SD_SWITCH_FUNC; 622 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 623 cmd.arg = mode << 31; /* 0 - check, 1 - set */ 624 cmd.arg |= 0x00FFFFFF; 625 cmd.arg &= ~(0xF << (grp * 4)); 626 cmd.arg |= value << (grp * 4); 627 cmd.data = &data; 628 629 data.data = res; 630 data.len = 64; 631 data.flags = MMC_DATA_READ; 632 633 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 634 return (err); 635} 636 637static int 638mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar) 639{ 640 struct mmc_command cmd; 641 int err; 642 uint8_t value; 643 644 if (mmcbr_get_mode(sc->dev) == mode_sd) { 645 memset(&cmd, 0, sizeof(cmd)); 646 cmd.opcode = ACMD_SET_CLR_CARD_DETECT; 647 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 648 cmd.arg = SD_CLR_CARD_DETECT; 649 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 650 CMD_RETRIES); 651 if (err != 0) 652 return (err); 653 memset(&cmd, 0, sizeof(cmd)); 654 cmd.opcode = ACMD_SET_BUS_WIDTH; 655 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 656 switch (ivar->bus_width) { 657 case bus_width_1: 658 cmd.arg = SD_BUS_WIDTH_1; 659 break; 660 case bus_width_4: 661 cmd.arg = SD_BUS_WIDTH_4; 662 break; 663 default: 664 return (MMC_ERR_INVALID); 665 } 666 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 667 CMD_RETRIES); 668 } else { 669 switch (ivar->bus_width) { 670 case bus_width_1: 671 value = EXT_CSD_BUS_WIDTH_1; 672 break; 673 case bus_width_4: 674 switch (mmcbr_get_timing(sc->dev)) { 675 case bus_timing_mmc_ddr52: 676 case bus_timing_mmc_hs200: 677 case bus_timing_mmc_hs400: 678 case bus_timing_mmc_hs400es: 679 value = EXT_CSD_BUS_WIDTH_4_DDR; 680 break; 681 default: 682 value = EXT_CSD_BUS_WIDTH_4; 683 break; 684 } 685 break; 686 case bus_width_8: 687 switch (mmcbr_get_timing(sc->dev)) { 688 case bus_timing_mmc_ddr52: 689 case bus_timing_mmc_hs200: 690 case bus_timing_mmc_hs400: 691 case bus_timing_mmc_hs400es: 692 value = EXT_CSD_BUS_WIDTH_8_DDR; 693 break; 694 default: 695 value = EXT_CSD_BUS_WIDTH_8; 696 break; 697 } 698 break; 699 default: 700 return (MMC_ERR_INVALID); 701 } 702 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 703 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value, 704 ivar->cmd6_time, true); 705 } 706 return (err); 707} 708 709static int 710mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) 711{ 712 device_t dev; 713 const uint8_t *ext_csd; 714 uint32_t clock; 715 uint8_t value; 716 717 dev = sc->dev; 718 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4) 719 return (MMC_ERR_NONE); 720 721 value = 0; 722 ext_csd = ivar->raw_ext_csd; 723 clock = mmcbr_get_clock(dev); 724 switch (1 << mmcbr_get_vdd(dev)) { 725 case MMC_OCR_LOW_VOLTAGE: 726 if (clock <= MMC_TYPE_HS_26_MAX) 727 value = ext_csd[EXT_CSD_PWR_CL_26_195]; 728 else if (clock <= MMC_TYPE_HS_52_MAX) { 729 if (mmcbr_get_timing(dev) >= bus_timing_mmc_ddr52 && 730 ivar->bus_width >= bus_width_4) 731 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; 732 else 733 value = ext_csd[EXT_CSD_PWR_CL_52_195]; 734 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) 735 value = ext_csd[EXT_CSD_PWR_CL_200_195]; 736 break; 737 case MMC_OCR_270_280: 738 case MMC_OCR_280_290: 739 case MMC_OCR_290_300: 740 case MMC_OCR_300_310: 741 case MMC_OCR_310_320: 742 case MMC_OCR_320_330: 743 case MMC_OCR_330_340: 744 case MMC_OCR_340_350: 745 case MMC_OCR_350_360: 746 if (clock <= MMC_TYPE_HS_26_MAX) 747 value = ext_csd[EXT_CSD_PWR_CL_26_360]; 748 else if (clock <= MMC_TYPE_HS_52_MAX) { 749 if (mmcbr_get_timing(dev) == bus_timing_mmc_ddr52 && 750 ivar->bus_width >= bus_width_4) 751 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; 752 else 753 value = ext_csd[EXT_CSD_PWR_CL_52_360]; 754 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 755 if (ivar->bus_width == bus_width_8) 756 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; 757 else 758 value = ext_csd[EXT_CSD_PWR_CL_200_360]; 759 } 760 break; 761 default: 762 device_printf(dev, "No power class support for VDD 0x%x\n", 763 1 << mmcbr_get_vdd(dev)); 764 return (MMC_ERR_INVALID); 765 } 766 767 if (ivar->bus_width == bus_width_8) 768 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> 769 EXT_CSD_POWER_CLASS_8BIT_SHIFT; 770 else 771 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >> 772 EXT_CSD_POWER_CLASS_4BIT_SHIFT; 773 774 if (value == 0) 775 return (MMC_ERR_NONE); 776 777 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL, 778 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true)); 779} 780 781static int 782mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 783 enum mmc_bus_timing timing) 784{ 785 u_char switch_res[64]; 786 uint8_t value; 787 int err; 788 789 if (mmcbr_get_mode(sc->dev) == mode_sd) { 790 switch (timing) { 791 case bus_timing_normal: 792 value = SD_SWITCH_NORMAL_MODE; 793 break; 794 case bus_timing_hs: 795 value = SD_SWITCH_HS_MODE; 796 break; 797 default: 798 return (MMC_ERR_INVALID); 799 } 800 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, 801 value, switch_res); 802 if (err != MMC_ERR_NONE) 803 return (err); 804 if ((switch_res[16] & 0xf) != value) 805 return (MMC_ERR_FAILED); 806 mmcbr_set_timing(sc->dev, timing); 807 mmcbr_update_ios(sc->dev); 808 } else { 809 switch (timing) { 810 case bus_timing_normal: 811 value = EXT_CSD_HS_TIMING_BC; 812 break; 813 case bus_timing_hs: 814 case bus_timing_mmc_ddr52: 815 value = EXT_CSD_HS_TIMING_HS; 816 break; 817 default: 818 return (MMC_ERR_INVALID); 819 } 820 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 821 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value, 822 ivar->cmd6_time, false); 823 if (err != MMC_ERR_NONE) 824 return (err); 825 mmcbr_set_timing(sc->dev, timing); 826 mmcbr_update_ios(sc->dev); 827 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca, 828 ivar->cmd6_time); 829 } 830 return (err); 831} 832 833static const uint8_t p8[8] = { 834 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 835}; 836 837static const uint8_t p8ok[8] = { 838 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 839}; 840 841static const uint8_t p4[4] = { 842 0x5A, 0x00, 0x00, 0x00 843}; 844 845static const uint8_t p4ok[4] = { 846 0xA5, 0x00, 0x00, 0x00 847}; 848 849static int 850mmc_test_bus_width(struct mmc_softc *sc) 851{ 852 struct mmc_command cmd; 853 struct mmc_data data; 854 uint8_t buf[8]; 855 int err; 856 857 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 858 mmcbr_set_bus_width(sc->dev, bus_width_8); 859 mmcbr_update_ios(sc->dev); 860 861 sc->squelched++; /* Errors are expected, squelch reporting. */ 862 memset(&cmd, 0, sizeof(cmd)); 863 memset(&data, 0, sizeof(data)); 864 cmd.opcode = MMC_BUSTEST_W; 865 cmd.arg = 0; 866 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 867 cmd.data = &data; 868 869 data.data = __DECONST(void *, p8); 870 data.len = 8; 871 data.flags = MMC_DATA_WRITE; 872 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 873 874 memset(&cmd, 0, sizeof(cmd)); 875 memset(&data, 0, sizeof(data)); 876 cmd.opcode = MMC_BUSTEST_R; 877 cmd.arg = 0; 878 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 879 cmd.data = &data; 880 881 data.data = buf; 882 data.len = 8; 883 data.flags = MMC_DATA_READ; 884 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 885 sc->squelched--; 886 887 mmcbr_set_bus_width(sc->dev, bus_width_1); 888 mmcbr_update_ios(sc->dev); 889 890 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 891 return (bus_width_8); 892 } 893 894 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 895 mmcbr_set_bus_width(sc->dev, bus_width_4); 896 mmcbr_update_ios(sc->dev); 897 898 sc->squelched++; /* Errors are expected, squelch reporting. */ 899 memset(&cmd, 0, sizeof(cmd)); 900 memset(&data, 0, sizeof(data)); 901 cmd.opcode = MMC_BUSTEST_W; 902 cmd.arg = 0; 903 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 904 cmd.data = &data; 905 906 data.data = __DECONST(void *, p4); 907 data.len = 4; 908 data.flags = MMC_DATA_WRITE; 909 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 910 911 memset(&cmd, 0, sizeof(cmd)); 912 memset(&data, 0, sizeof(data)); 913 cmd.opcode = MMC_BUSTEST_R; 914 cmd.arg = 0; 915 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 916 cmd.data = &data; 917 918 data.data = buf; 919 data.len = 4; 920 data.flags = MMC_DATA_READ; 921 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 922 sc->squelched--; 923 924 mmcbr_set_bus_width(sc->dev, bus_width_1); 925 mmcbr_update_ios(sc->dev); 926 927 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 928 return (bus_width_4); 929 } 930 return (bus_width_1); 931} 932 933static uint32_t 934mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 935{ 936 const int i = (bit_len / 32) - (start / 32) - 1; 937 const int shift = start & 31; 938 uint32_t retval = bits[i] >> shift; 939 940 if (size + shift > 32) 941 retval |= bits[i - 1] << (32 - shift); 942 return (retval & ((1llu << size) - 1)); 943} 944 945static void 946mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 947{ 948 int i; 949 950 /* There's no version info, so we take it on faith */ 951 memset(cid, 0, sizeof(*cid)); 952 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 953 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 954 for (i = 0; i < 5; i++) 955 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 956 cid->pnm[5] = 0; 957 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 958 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 959 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 960 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 961} 962 963static void 964mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p) 965{ 966 int i; 967 968 /* There's no version info, so we take it on faith */ 969 memset(cid, 0, sizeof(*cid)); 970 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 971 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 972 for (i = 0; i < 6; i++) 973 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 974 cid->pnm[6] = 0; 975 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 976 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 977 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 978 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4); 979 if (is_4_41p) 980 cid->mdt_year += 2013; 981 else 982 cid->mdt_year += 1997; 983} 984 985static void 986mmc_format_card_id_string(struct mmc_ivars *ivar) 987{ 988 char oidstr[8]; 989 uint8_t c1; 990 uint8_t c2; 991 992 /* 993 * Format a card ID string for use by the mmcsd driver, it's what 994 * appears between the <> in the following: 995 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 996 * 22.5MHz/4bit/128-block 997 * 998 * Also format just the card serial number, which the mmcsd driver will 999 * use as the disk->d_ident string. 1000 * 1001 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 1002 * and our max formatted length is currently 55 bytes if every field 1003 * contains the largest value. 1004 * 1005 * Sometimes the oid is two printable ascii chars; when it's not, 1006 * format it as 0xnnnn instead. 1007 */ 1008 c1 = (ivar->cid.oid >> 8) & 0x0ff; 1009 c2 = ivar->cid.oid & 0x0ff; 1010 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 1011 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 1012 else 1013 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid); 1014 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string), 1015 "%08X", ivar->cid.psn); 1016 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string), 1017 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 1018 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "", 1019 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f, 1020 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year, 1021 ivar->cid.mid, oidstr); 1022} 1023 1024static const int exp[8] = { 1025 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 1026}; 1027 1028static const int mant[16] = { 1029 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 1030}; 1031 1032static const int cur_min[8] = { 1033 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 1034}; 1035 1036static const int cur_max[8] = { 1037 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 1038}; 1039 1040static void 1041mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 1042{ 1043 int v; 1044 int m; 1045 int e; 1046 1047 memset(csd, 0, sizeof(*csd)); 1048 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 1049 if (v == 0) { 1050 m = mmc_get_bits(raw_csd, 128, 115, 4); 1051 e = mmc_get_bits(raw_csd, 128, 112, 3); 1052 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1053 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1054 m = mmc_get_bits(raw_csd, 128, 99, 4); 1055 e = mmc_get_bits(raw_csd, 128, 96, 3); 1056 csd->tran_speed = exp[e] * 10000 * mant[m]; 1057 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1058 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1059 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1060 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1061 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1062 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1063 csd->vdd_r_curr_min = 1064 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1065 csd->vdd_r_curr_max = 1066 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1067 csd->vdd_w_curr_min = 1068 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1069 csd->vdd_w_curr_max = 1070 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1071 m = mmc_get_bits(raw_csd, 128, 62, 12); 1072 e = mmc_get_bits(raw_csd, 128, 47, 3); 1073 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1074 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1075 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1076 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1077 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1078 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1079 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1080 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1081 } else if (v == 1) { 1082 m = mmc_get_bits(raw_csd, 128, 115, 4); 1083 e = mmc_get_bits(raw_csd, 128, 112, 3); 1084 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1085 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1086 m = mmc_get_bits(raw_csd, 128, 99, 4); 1087 e = mmc_get_bits(raw_csd, 128, 96, 3); 1088 csd->tran_speed = exp[e] * 10000 * mant[m]; 1089 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1090 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1091 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1092 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1093 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1094 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1095 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1096 1) * 512 * 1024; 1097 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1098 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1099 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1100 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1101 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1102 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1103 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1104 } else 1105 panic("unknown SD CSD version"); 1106} 1107 1108static void 1109mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 1110{ 1111 int m; 1112 int e; 1113 1114 memset(csd, 0, sizeof(*csd)); 1115 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 1116 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 1117 m = mmc_get_bits(raw_csd, 128, 115, 4); 1118 e = mmc_get_bits(raw_csd, 128, 112, 3); 1119 csd->tacc = exp[e] * mant[m] + 9 / 10; 1120 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1121 m = mmc_get_bits(raw_csd, 128, 99, 4); 1122 e = mmc_get_bits(raw_csd, 128, 96, 3); 1123 csd->tran_speed = exp[e] * 10000 * mant[m]; 1124 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1125 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1126 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1127 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1128 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1129 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1130 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1131 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1132 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1133 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1134 m = mmc_get_bits(raw_csd, 128, 62, 12); 1135 e = mmc_get_bits(raw_csd, 128, 47, 3); 1136 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1137 csd->erase_blk_en = 0; 1138 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 1139 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 1140 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 1141 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1142 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1143 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1144 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1145} 1146 1147static void 1148mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 1149{ 1150 unsigned int scr_struct; 1151 1152 memset(scr, 0, sizeof(*scr)); 1153 1154 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 1155 if (scr_struct != 0) { 1156 printf("Unrecognised SCR structure version %d\n", 1157 scr_struct); 1158 return; 1159 } 1160 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 1161 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 1162} 1163 1164static void 1165mmc_app_decode_sd_status(uint32_t *raw_sd_status, 1166 struct mmc_sd_status *sd_status) 1167{ 1168 1169 memset(sd_status, 0, sizeof(*sd_status)); 1170 1171 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 1172 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 1173 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 1174 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 1175 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 1176 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 1177 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 1178 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 1179 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 1180 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 1181} 1182 1183static int 1184mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 1185{ 1186 struct mmc_command cmd; 1187 int err; 1188 1189 memset(&cmd, 0, sizeof(cmd)); 1190 cmd.opcode = MMC_ALL_SEND_CID; 1191 cmd.arg = 0; 1192 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1193 cmd.data = NULL; 1194 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1195 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 1196 return (err); 1197} 1198 1199static int 1200mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd) 1201{ 1202 struct mmc_command cmd; 1203 int err; 1204 1205 memset(&cmd, 0, sizeof(cmd)); 1206 cmd.opcode = MMC_SEND_CSD; 1207 cmd.arg = rca << 16; 1208 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1209 cmd.data = NULL; 1210 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1211 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t)); 1212 return (err); 1213} 1214 1215static int 1216mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 1217{ 1218 int err; 1219 struct mmc_command cmd; 1220 struct mmc_data data; 1221 1222 memset(&cmd, 0, sizeof(cmd)); 1223 memset(&data, 0, sizeof(data)); 1224 1225 memset(rawscr, 0, 8); 1226 cmd.opcode = ACMD_SEND_SCR; 1227 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1228 cmd.arg = 0; 1229 cmd.data = &data; 1230 1231 data.data = rawscr; 1232 data.len = 8; 1233 data.flags = MMC_DATA_READ; 1234 1235 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1236 rawscr[0] = be32toh(rawscr[0]); 1237 rawscr[1] = be32toh(rawscr[1]); 1238 return (err); 1239} 1240 1241static int 1242mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1243{ 1244 struct mmc_command cmd; 1245 struct mmc_data data; 1246 int err, i; 1247 1248 memset(&cmd, 0, sizeof(cmd)); 1249 memset(&data, 0, sizeof(data)); 1250 1251 memset(rawsdstatus, 0, 64); 1252 cmd.opcode = ACMD_SD_STATUS; 1253 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1254 cmd.arg = 0; 1255 cmd.data = &data; 1256 1257 data.data = rawsdstatus; 1258 data.len = 64; 1259 data.flags = MMC_DATA_READ; 1260 1261 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1262 for (i = 0; i < 16; i++) 1263 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1264 return (err); 1265} 1266 1267static int 1268mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1269{ 1270 struct mmc_command cmd; 1271 int err; 1272 1273 memset(&cmd, 0, sizeof(cmd)); 1274 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1275 cmd.arg = resp << 16; 1276 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1277 cmd.data = NULL; 1278 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1279 return (err); 1280} 1281 1282static int 1283mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1284{ 1285 struct mmc_command cmd; 1286 int err; 1287 1288 memset(&cmd, 0, sizeof(cmd)); 1289 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1290 cmd.arg = 0; 1291 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1292 cmd.data = NULL; 1293 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1294 *resp = cmd.resp[0]; 1295 return (err); 1296} 1297 1298static int 1299mmc_set_blocklen(struct mmc_softc *sc, uint32_t len) 1300{ 1301 struct mmc_command cmd; 1302 int err; 1303 1304 memset(&cmd, 0, sizeof(cmd)); 1305 cmd.opcode = MMC_SET_BLOCKLEN; 1306 cmd.arg = len; 1307 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1308 cmd.data = NULL; 1309 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1310 return (err); 1311} 1312 1313static uint32_t 1314mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing) 1315{ 1316 1317 switch (timing) { 1318 case bus_timing_normal: 1319 return (ivar->tran_speed); 1320 case bus_timing_hs: 1321 return (ivar->hs_tran_speed); 1322 case bus_timing_uhs_sdr12: 1323 return (SD_SDR12_MAX); 1324 case bus_timing_uhs_sdr25: 1325 return (SD_SDR25_MAX); 1326 case bus_timing_uhs_ddr50: 1327 return (SD_DDR50_MAX); 1328 case bus_timing_uhs_sdr50: 1329 return (SD_SDR50_MAX); 1330 case bus_timing_uhs_sdr104: 1331 return (SD_SDR104_MAX); 1332 case bus_timing_mmc_ddr52: 1333 return (MMC_TYPE_DDR52_MAX); 1334 case bus_timing_mmc_hs200: 1335 case bus_timing_mmc_hs400: 1336 case bus_timing_mmc_hs400es: 1337 return (MMC_TYPE_HS200_HS400ES_MAX); 1338 } 1339 return (0); 1340} 1341 1342static const char * 1343mmc_timing_to_string(enum mmc_bus_timing timing) 1344{ 1345 1346 switch (timing) { 1347 case bus_timing_normal: 1348 return ("normal speed"); 1349 case bus_timing_hs: 1350 return ("high speed"); 1351 case bus_timing_uhs_sdr12: 1352 case bus_timing_uhs_sdr25: 1353 case bus_timing_uhs_sdr50: 1354 case bus_timing_uhs_sdr104: 1355 return ("single data rate"); 1356 case bus_timing_uhs_ddr50: 1357 case bus_timing_mmc_ddr52: 1358 return ("dual data rate"); 1359 case bus_timing_mmc_hs200: 1360 return ("HS200"); 1361 case bus_timing_mmc_hs400: 1362 return ("HS400"); 1363 case bus_timing_mmc_hs400es: 1364 return ("HS400 with enhanced strobe"); 1365 } 1366 return (""); 1367} 1368 1369static void 1370mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) 1371{ 1372 enum mmc_bus_timing max_timing, timing; 1373 1374 device_printf(dev, "Card at relative address 0x%04x%s:\n", 1375 ivar->rca, newcard ? " added" : ""); 1376 device_printf(dev, " card: %s\n", ivar->card_id_string); 1377 max_timing = bus_timing_normal; 1378 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) { 1379 if (isset(&ivar->timings, timing)) { 1380 max_timing = timing; 1381 break; 1382 } 1383 } 1384 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n", 1385 (ivar->bus_width == bus_width_1 ? 1 : 1386 (ivar->bus_width == bus_width_4 ? 4 : 8)), 1387 mmc_timing_to_dtr(ivar, timing) / 1000000, 1388 mmc_timing_to_string(timing)); 1389 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n", 1390 ivar->sec_count, ivar->erase_sector, 1391 ivar->read_only ? ", read-only" : ""); 1392} 1393 1394static void 1395mmc_discover_cards(struct mmc_softc *sc) 1396{ 1397 u_char switch_res[64]; 1398 uint32_t raw_cid[4]; 1399 struct mmc_ivars *ivar = NULL; 1400 device_t *devlist; 1401 device_t child; 1402 int devcount, err, host_caps, i, newcard; 1403 uint32_t resp, sec_count, status; 1404 uint16_t rca = 2; 1405 1406 host_caps = mmcbr_get_caps(sc->dev); 1407 if (bootverbose || mmc_debug) 1408 device_printf(sc->dev, "Probing cards\n"); 1409 while (1) { 1410 sc->squelched++; /* Errors are expected, squelch reporting. */ 1411 err = mmc_all_send_cid(sc, raw_cid); 1412 sc->squelched--; 1413 if (err == MMC_ERR_TIMEOUT) 1414 break; 1415 if (err != MMC_ERR_NONE) { 1416 device_printf(sc->dev, "Error reading CID %d\n", err); 1417 break; 1418 } 1419 newcard = 1; 1420 if ((err = device_get_children(sc->dev, &devlist, 1421 &devcount)) != 0) 1422 return; 1423 for (i = 0; i < devcount; i++) { 1424 ivar = device_get_ivars(devlist[i]); 1425 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 1426 0) { 1427 newcard = 0; 1428 break; 1429 } 1430 } 1431 free(devlist, M_TEMP); 1432 if (bootverbose || mmc_debug) { 1433 device_printf(sc->dev, 1434 "%sard detected (CID %08x%08x%08x%08x)\n", 1435 newcard ? "New c" : "C", 1436 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]); 1437 } 1438 if (newcard) { 1439 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1440 M_WAITOK | M_ZERO); 1441 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1442 } 1443 if (mmcbr_get_ro(sc->dev)) 1444 ivar->read_only = 1; 1445 ivar->bus_width = bus_width_1; 1446 setbit(&ivar->timings, bus_timing_normal); 1447 ivar->mode = mmcbr_get_mode(sc->dev); 1448 if (ivar->mode == mode_sd) { 1449 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1450 err = mmc_send_relative_addr(sc, &resp); 1451 if (err != MMC_ERR_NONE) { 1452 device_printf(sc->dev, 1453 "Error getting RCA %d\n", err); 1454 break; 1455 } 1456 ivar->rca = resp >> 16; 1457 /* Get card CSD. */ 1458 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1459 if (err != MMC_ERR_NONE) { 1460 device_printf(sc->dev, 1461 "Error getting CSD %d\n", err); 1462 break; 1463 } 1464 if (bootverbose || mmc_debug) 1465 device_printf(sc->dev, 1466 "%sard detected (CSD %08x%08x%08x%08x)\n", 1467 newcard ? "New c" : "C", ivar->raw_csd[0], 1468 ivar->raw_csd[1], ivar->raw_csd[2], 1469 ivar->raw_csd[3]); 1470 mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1471 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1472 if (ivar->csd.csd_structure > 0) 1473 ivar->high_cap = 1; 1474 ivar->tran_speed = ivar->csd.tran_speed; 1475 ivar->erase_sector = ivar->csd.erase_sector * 1476 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1477 1478 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, 1479 &status); 1480 if (err != MMC_ERR_NONE) { 1481 device_printf(sc->dev, 1482 "Error reading card status %d\n", err); 1483 break; 1484 } 1485 if ((status & R1_CARD_IS_LOCKED) != 0) { 1486 device_printf(sc->dev, 1487 "Card is password protected, skipping.\n"); 1488 break; 1489 } 1490 1491 /* Get card SCR. Card must be selected to fetch it. */ 1492 err = mmc_select_card(sc, ivar->rca); 1493 if (err != MMC_ERR_NONE) { 1494 device_printf(sc->dev, 1495 "Error selecting card %d\n", err); 1496 break; 1497 } 1498 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1499 if (err != MMC_ERR_NONE) { 1500 device_printf(sc->dev, 1501 "Error reading SCR %d\n", err); 1502 break; 1503 } 1504 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1505 /* Get card switch capabilities (command class 10). */ 1506 if ((ivar->scr.sda_vsn >= 1) && 1507 (ivar->csd.ccc & (1 << 10))) { 1508 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK, 1509 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, 1510 switch_res); 1511 if (err == MMC_ERR_NONE && 1512 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) { 1513 setbit(&ivar->timings, bus_timing_hs); 1514 ivar->hs_tran_speed = SD_HS_MAX; 1515 } 1516 } 1517 1518 /* 1519 * We deselect then reselect the card here. Some cards 1520 * become unselected and timeout with the above two 1521 * commands, although the state tables / diagrams in the 1522 * standard suggest they go back to the transfer state. 1523 * Other cards don't become deselected, and if we 1524 * attempt to blindly re-select them, we get timeout 1525 * errors from some controllers. So we deselect then 1526 * reselect to handle all situations. The only thing we 1527 * use from the sd_status is the erase sector size, but 1528 * it is still nice to get that right. 1529 */ 1530 mmc_select_card(sc, 0); 1531 (void)mmc_select_card(sc, ivar->rca); 1532 (void)mmc_app_sd_status(sc, ivar->rca, 1533 ivar->raw_sd_status); 1534 mmc_app_decode_sd_status(ivar->raw_sd_status, 1535 &ivar->sd_status); 1536 if (ivar->sd_status.au_size != 0) { 1537 ivar->erase_sector = 1538 16 << ivar->sd_status.au_size; 1539 } 1540 /* Find max supported bus width. */ 1541 if ((host_caps & MMC_CAP_4_BIT_DATA) && 1542 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1543 ivar->bus_width = bus_width_4; 1544 1545 /* 1546 * Some cards that report maximum I/O block sizes 1547 * greater than 512 require the block length to be 1548 * set to 512, even though that is supposed to be 1549 * the default. Example: 1550 * 1551 * Transcend 2GB SDSC card, CID: 1552 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1553 */ 1554 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1555 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1556 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1557 1558 mmc_format_card_id_string(ivar); 1559 1560 if (bootverbose || mmc_debug) 1561 mmc_log_card(sc->dev, ivar, newcard); 1562 if (newcard) { 1563 /* Add device. */ 1564 child = device_add_child(sc->dev, NULL, -1); 1565 device_set_ivars(child, ivar); 1566 } 1567 mmc_select_card(sc, 0); 1568 return; 1569 } 1570 ivar->rca = rca++; 1571 err = mmc_set_relative_addr(sc, ivar->rca); 1572 if (err != MMC_ERR_NONE) { 1573 device_printf(sc->dev, "Error setting RCA %d\n", err); 1574 break; 1575 } 1576 /* Get card CSD. */ 1577 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1578 if (err != MMC_ERR_NONE) { 1579 device_printf(sc->dev, "Error getting CSD %d\n", err); 1580 break; 1581 } 1582 if (bootverbose || mmc_debug) 1583 device_printf(sc->dev, 1584 "%sard detected (CSD %08x%08x%08x%08x)\n", 1585 newcard ? "New c" : "C", ivar->raw_csd[0], 1586 ivar->raw_csd[1], ivar->raw_csd[2], 1587 ivar->raw_csd[3]); 1588 1589 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1590 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1591 ivar->tran_speed = ivar->csd.tran_speed; 1592 ivar->erase_sector = ivar->csd.erase_sector * 1593 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1594 1595 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status); 1596 if (err != MMC_ERR_NONE) { 1597 device_printf(sc->dev, 1598 "Error reading card status %d\n", err); 1599 break; 1600 } 1601 if ((status & R1_CARD_IS_LOCKED) != 0) { 1602 device_printf(sc->dev, 1603 "Card is password protected, skipping.\n"); 1604 break; 1605 } 1606 1607 err = mmc_select_card(sc, ivar->rca); 1608 if (err != MMC_ERR_NONE) { 1609 device_printf(sc->dev, "Error selecting card %d\n", 1610 err); 1611 break; 1612 } 1613 1614 /* Only MMC >= 4.x devices support EXT_CSD. */ 1615 if (ivar->csd.spec_vers >= 4) { 1616 err = mmc_send_ext_csd(sc->dev, sc->dev, 1617 ivar->raw_ext_csd); 1618 if (err != MMC_ERR_NONE) { 1619 device_printf(sc->dev, 1620 "Error reading EXT_CSD %d\n", err); 1621 break; 1622 } 1623 /* Handle extended capacity from EXT_CSD */ 1624 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] + 1625 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1626 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1627 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1628 if (sec_count != 0) { 1629 ivar->sec_count = sec_count; 1630 ivar->high_cap = 1; 1631 } 1632 /* Get device speeds beyond normal mode. */ 1633 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1634 EXT_CSD_CARD_TYPE_HS_52) != 0) { 1635 setbit(&ivar->timings, bus_timing_hs); 1636 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX; 1637 } else if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1638 EXT_CSD_CARD_TYPE_HS_26) != 0) { 1639 setbit(&ivar->timings, bus_timing_hs); 1640 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX; 1641 } 1642 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1643 EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1644 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1645 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1646 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52); 1647 } 1648 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1649 EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1650 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1651 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1652 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52); 1653 } 1654 /* 1655 * Determine generic switch timeout (provided in 1656 * units of 10 ms), defaulting to 500 ms. 1657 */ 1658 ivar->cmd6_time = 500 * 1000; 1659 if (ivar->csd.spec_vers >= 6) 1660 ivar->cmd6_time = 10 * 1661 ivar->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME]; 1662 /* Find max supported bus width. */ 1663 ivar->bus_width = mmc_test_bus_width(sc); 1664 /* Handle HC erase sector size. */ 1665 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1666 ivar->erase_sector = 1024 * 1667 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1668 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 1669 EXT_CSD_CMD_SET_NORMAL, 1670 EXT_CSD_ERASE_GRP_DEF, 1671 EXT_CSD_ERASE_GRP_DEF_EN, 1672 ivar->cmd6_time, true); 1673 if (err != MMC_ERR_NONE) { 1674 device_printf(sc->dev, 1675 "Error setting erase group %d\n", 1676 err); 1677 break; 1678 } 1679 } 1680 } 1681 1682 /* 1683 * Some cards that report maximum I/O block sizes greater 1684 * than 512 require the block length to be set to 512, even 1685 * though that is supposed to be the default. Example: 1686 * 1687 * Transcend 2GB SDSC card, CID: 1688 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1689 */ 1690 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1691 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1692 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1693 1694 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, 1695 ivar->raw_ext_csd[EXT_CSD_REV] >= 5); 1696 mmc_format_card_id_string(ivar); 1697 1698 if (bootverbose || mmc_debug) 1699 mmc_log_card(sc->dev, ivar, newcard); 1700 if (newcard) { 1701 /* Add device. */ 1702 child = device_add_child(sc->dev, NULL, -1); 1703 device_set_ivars(child, ivar); 1704 } 1705 mmc_select_card(sc, 0); 1706 } 1707} 1708 1709static void 1710mmc_rescan_cards(struct mmc_softc *sc) 1711{ 1712 struct mmc_ivars *ivar; 1713 device_t *devlist; 1714 int err, i, devcount; 1715 1716 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1717 return; 1718 for (i = 0; i < devcount; i++) { 1719 ivar = device_get_ivars(devlist[i]); 1720 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) { 1721 if (bootverbose || mmc_debug) 1722 device_printf(sc->dev, 1723 "Card at relative address %d lost.\n", 1724 ivar->rca); 1725 device_delete_child(sc->dev, devlist[i]); 1726 free(ivar, M_DEVBUF); 1727 } 1728 } 1729 free(devlist, M_TEMP); 1730 mmc_select_card(sc, 0); 1731} 1732 1733static int 1734mmc_delete_cards(struct mmc_softc *sc) 1735{ 1736 struct mmc_ivars *ivar; 1737 device_t *devlist; 1738 int err, i, devcount; 1739 1740 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1741 return (err); 1742 for (i = 0; i < devcount; i++) { 1743 ivar = device_get_ivars(devlist[i]); 1744 if (bootverbose || mmc_debug) 1745 device_printf(sc->dev, 1746 "Card at relative address %d deleted.\n", 1747 ivar->rca); 1748 device_delete_child(sc->dev, devlist[i]); 1749 free(ivar, M_DEVBUF); 1750 } 1751 free(devlist, M_TEMP); 1752 return (0); 1753} 1754 1755static void 1756mmc_go_discovery(struct mmc_softc *sc) 1757{ 1758 uint32_t ocr; 1759 device_t dev; 1760 int err; 1761 1762 dev = sc->dev; 1763 if (mmcbr_get_power_mode(dev) != power_on) { 1764 /* 1765 * First, try SD modes 1766 */ 1767 sc->squelched++; /* Errors are expected, squelch reporting. */ 1768 mmcbr_set_mode(dev, mode_sd); 1769 mmc_power_up(sc); 1770 mmcbr_set_bus_mode(dev, pushpull); 1771 if (bootverbose || mmc_debug) 1772 device_printf(sc->dev, "Probing bus\n"); 1773 mmc_idle_cards(sc); 1774 err = mmc_send_if_cond(sc, 1); 1775 if ((bootverbose || mmc_debug) && err == 0) 1776 device_printf(sc->dev, 1777 "SD 2.0 interface conditions: OK\n"); 1778 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 1779 if (bootverbose || mmc_debug) 1780 device_printf(sc->dev, "SD probe: failed\n"); 1781 /* 1782 * Failed, try MMC 1783 */ 1784 mmcbr_set_mode(dev, mode_mmc); 1785 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 1786 if (bootverbose || mmc_debug) 1787 device_printf(sc->dev, 1788 "MMC probe: failed\n"); 1789 ocr = 0; /* Failed both, powerdown. */ 1790 } else if (bootverbose || mmc_debug) 1791 device_printf(sc->dev, 1792 "MMC probe: OK (OCR: 0x%08x)\n", ocr); 1793 } else if (bootverbose || mmc_debug) 1794 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", 1795 ocr); 1796 sc->squelched--; 1797 1798 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 1799 if (mmcbr_get_ocr(dev) != 0) 1800 mmc_idle_cards(sc); 1801 } else { 1802 mmcbr_set_bus_mode(dev, opendrain); 1803 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 1804 mmcbr_update_ios(dev); 1805 /* XXX recompute vdd based on new cards? */ 1806 } 1807 /* 1808 * Make sure that we have a mutually agreeable voltage to at least 1809 * one card on the bus. 1810 */ 1811 if (bootverbose || mmc_debug) 1812 device_printf(sc->dev, "Current OCR: 0x%08x\n", 1813 mmcbr_get_ocr(dev)); 1814 if (mmcbr_get_ocr(dev) == 0) { 1815 device_printf(sc->dev, "No compatible cards found on bus\n"); 1816 mmc_delete_cards(sc); 1817 mmc_power_down(sc); 1818 return; 1819 } 1820 /* 1821 * Reselect the cards after we've idled them above. 1822 */ 1823 if (mmcbr_get_mode(dev) == mode_sd) { 1824 err = mmc_send_if_cond(sc, 1); 1825 mmc_send_app_op_cond(sc, 1826 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 1827 } else 1828 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); 1829 mmc_discover_cards(sc); 1830 mmc_rescan_cards(sc); 1831 1832 mmcbr_set_bus_mode(dev, pushpull); 1833 mmcbr_update_ios(dev); 1834 mmc_calculate_clock(sc); 1835} 1836 1837static int 1838mmc_calculate_clock(struct mmc_softc *sc) 1839{ 1840 device_t *kids; 1841 struct mmc_ivars *ivar; 1842 int host_caps, i, nkid; 1843 uint32_t dtr, max_dtr; 1844 enum mmc_bus_timing max_timing, timing; 1845 bool changed; 1846 1847 max_dtr = mmcbr_get_f_max(sc->dev); 1848 host_caps = mmcbr_get_caps(sc->dev); 1849 if ((host_caps & MMC_CAP_MMC_DDR52) != 0) 1850 max_timing = bus_timing_mmc_ddr52; 1851 else if ((host_caps & MMC_CAP_HSPEED) != 0) 1852 max_timing = bus_timing_hs; 1853 else 1854 max_timing = bus_timing_normal; 1855 if (device_get_children(sc->dev, &kids, &nkid) != 0) 1856 panic("can't get children"); 1857 do { 1858 changed = false; 1859 for (i = 0; i < nkid; i++) { 1860 ivar = device_get_ivars(kids[i]); 1861 if (isclr(&ivar->timings, max_timing)) { 1862 for (timing = max_timing; timing >= 1863 bus_timing_normal; timing--) { 1864 if (isset(&ivar->timings, timing)) { 1865 max_timing = timing; 1866 break; 1867 } 1868 } 1869 changed = true; 1870 } 1871 dtr = mmc_timing_to_dtr(ivar, max_timing); 1872 if (dtr < max_dtr) { 1873 max_dtr = dtr; 1874 changed = true; 1875 } 1876 } 1877 } while (changed == true); 1878 if (bootverbose || mmc_debug) { 1879 device_printf(sc->dev, 1880 "setting transfer rate to %d.%03dMHz (%s timing)\n", 1881 max_dtr / 1000000, (max_dtr / 1000) % 1000, 1882 mmc_timing_to_string(max_timing)); 1883 } 1884 for (i = 0; i < nkid; i++) { 1885 ivar = device_get_ivars(kids[i]); 1886 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) 1887 continue; 1888 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE || 1889 mmc_set_timing(sc, ivar, max_timing) != MMC_ERR_NONE) 1890 device_printf(sc->dev, "Card at relative address %d " 1891 "failed to set timing.\n", ivar->rca); 1892 } 1893 mmc_select_card(sc, 0); 1894 free(kids, M_TEMP); 1895 mmcbr_set_clock(sc->dev, max_dtr); 1896 mmcbr_update_ios(sc->dev); 1897 return (max_dtr); 1898} 1899 1900static void 1901mmc_scan(struct mmc_softc *sc) 1902{ 1903 device_t dev = sc->dev; 1904 1905 mmc_acquire_bus(dev, dev); 1906 mmc_go_discovery(sc); 1907 mmc_release_bus(dev, dev); 1908 1909 bus_generic_attach(dev); 1910} 1911 1912static int 1913mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 1914{ 1915 struct mmc_ivars *ivar = device_get_ivars(child); 1916 1917 switch (which) { 1918 default: 1919 return (EINVAL); 1920 case MMC_IVAR_SPEC_VERS: 1921 *result = ivar->csd.spec_vers; 1922 break; 1923 case MMC_IVAR_DSR_IMP: 1924 *result = ivar->csd.dsr_imp; 1925 break; 1926 case MMC_IVAR_MEDIA_SIZE: 1927 *result = ivar->sec_count; 1928 break; 1929 case MMC_IVAR_RCA: 1930 *result = ivar->rca; 1931 break; 1932 case MMC_IVAR_SECTOR_SIZE: 1933 *result = MMC_SECTOR_SIZE; 1934 break; 1935 case MMC_IVAR_TRAN_SPEED: 1936 *result = mmcbr_get_clock(bus); 1937 break; 1938 case MMC_IVAR_READ_ONLY: 1939 *result = ivar->read_only; 1940 break; 1941 case MMC_IVAR_HIGH_CAP: 1942 *result = ivar->high_cap; 1943 break; 1944 case MMC_IVAR_CARD_TYPE: 1945 *result = ivar->mode; 1946 break; 1947 case MMC_IVAR_BUS_WIDTH: 1948 *result = ivar->bus_width; 1949 break; 1950 case MMC_IVAR_ERASE_SECTOR: 1951 *result = ivar->erase_sector; 1952 break; 1953 case MMC_IVAR_MAX_DATA: 1954 *result = mmcbr_get_max_data(bus); 1955 break; 1956 case MMC_IVAR_CARD_ID_STRING: 1957 *(char **)result = ivar->card_id_string; 1958 break; 1959 case MMC_IVAR_CARD_SN_STRING: 1960 *(char **)result = ivar->card_sn_string; 1961 break; 1962 } 1963 return (0); 1964} 1965 1966static int 1967mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 1968{ 1969 1970 /* 1971 * None are writable ATM 1972 */ 1973 return (EINVAL); 1974} 1975 1976static void 1977mmc_delayed_attach(void *xsc) 1978{ 1979 struct mmc_softc *sc = xsc; 1980 1981 mmc_scan(sc); 1982 config_intrhook_disestablish(&sc->config_intrhook); 1983} 1984 1985static int 1986mmc_child_location_str(device_t dev, device_t child, char *buf, 1987 size_t buflen) 1988{ 1989 1990 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child)); 1991 return (0); 1992} 1993 1994static device_method_t mmc_methods[] = { 1995 /* device_if */ 1996 DEVMETHOD(device_probe, mmc_probe), 1997 DEVMETHOD(device_attach, mmc_attach), 1998 DEVMETHOD(device_detach, mmc_detach), 1999 DEVMETHOD(device_suspend, mmc_suspend), 2000 DEVMETHOD(device_resume, mmc_resume), 2001 2002 /* Bus interface */ 2003 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 2004 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 2005 DEVMETHOD(bus_child_location_str, mmc_child_location_str), 2006 2007 /* MMC Bus interface */ 2008 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 2009 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 2010 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 2011 2012 DEVMETHOD_END 2013}; 2014 2015driver_t mmc_driver = { 2016 "mmc", 2017 mmc_methods, 2018 sizeof(struct mmc_softc), 2019}; 2020devclass_t mmc_devclass; 2021 2022MODULE_VERSION(mmc, MMC_VERSION); 2023