MFC: r342634 (partial)

o Don't allocate resources for SDMA in sdhci(4) if the controller or the
front-end doesn't support SDMA or the latter implements a platform-
specific transfer method instead. While at it, factor out allocation
and freeing of SDMA resources to sdhci_dma_{alloc,free}() in order to
keep the code more readable when adding support for ADMA variants.

o Base the size of the SDMA bounce buffer on MAXPHYS up to the maximum
of 512 KiB instead of using a fixed 4-KiB-buffer. With the default
MAXPHYS of 128 KiB and depending on the controller and medium, this
reduces the number of SDHCI interrupts by a factor of ~16 to ~32 on
sequential reads while an increase of throughput of up to ~84 % was
seen.

Front-ends for broken controllers that only support an SDMA buffer
boundary of a specific size may set SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY
and supply a size via struct sdhci_slot. According to Linux, only -
unsupported in stable/10 anyway - Qualcomm MSM-type SDHCI controllers
are affected by this, though.

Requested by: Shreyank Amartya (unconditional bump to 512 KiB)

o Introduce a SDHCI_DEPEND macro for specifying the dependency of the
front-end modules on the sdhci(4) one and bump the module version
of sdhci(4) to 2 via an also newly introduced SDHCI_VERSION in order
to ensure that all components are in sync WRT struct sdhci_slot.

o In sdhci(4):
- Make pointers const were applicable, and
- replace a few device_printf(9) calls with slot_printf() for
consistency.

MFC r321686 and r330361:
Add inline functions to convert between sbintime_t and decimal time units.
Use them in some existing code that is vulnerable to roundoff errors.

MFC r333667: followup to r332730/r332752: set kdb_why to "trap" for fatal traps

This change updates arm, arm64 and mips achitectures. Additionally, it
removes redundant checks for kdb_active where it already results in
kdb_reenter() and adds kdb_reenter() calls where they were missing.

Some architectures check the return value of kdb_trap(), but some don't.
I haven't changed any of that.

Some trap handling routines have a return code. I am not sure if I
provided correct ones for returns after kdb_reenter(). kdb_reenter
should never return unless kdb_jmpbufp is NULL for some reason.

MFC: r266470, r273546, r276017, r277932, r279153, r279778, r279780, r278797,
r278861, r280283, r280284, r280294, r280452, r280558, r280571, r281863,
r282049, r282357, r282440, r282441, r282358, r282359, r283550, r283918,
r290171, r290667, r290381, r290533, r290666, r292483, r295659, r297545,
r298305, r298383, r298428, r306489, r306557, r307067, r307068, r307087,
r307088, r307089, r307091, r307092, r307093, r307098, r307115, r307154,
r307240, r307241, r315967, r316476

Unbreak BCM2835/RPI-B support by bringing it in line with stable/11 and
head:

- Optimise reading of pending interrupt registers.

- Fix a bug where some DTS layouts could cause the premature ending of the
search (i.e. without returning any result) and you would end up with a
random MAC address.

- Reduce the diff between head and arm_intrng with the bcm2835 interrupt
controller.

- Allow the retrieving of the reserved pins state.

- Add support to the bcm2835 mailbox driver to work before interrupts are
enabled. This will be needed to enable the power on devices early on in the
boot process.

- Add support for enabling the USB on the Raspberry Pi boards when it hasn't
been done by U-Boot. This allows the USB to work when we load the kernel
directly.

- Call config_intrhook_disestablish on failure of the bcm2835 fb and fbd intr
hooks. With this we can get through the boot even if these functions fail.

- Add the structures needed to get/set the power state. These can be used
when, for example, we boot without U-Boot and wish to enable USB, or to
suspend an unneeded device.

- Add a mask to match only the relative base address of BSC controllers.

- Move the code to set the device power to the bcm2835 mailbox driver so it
can be reused by other drivers.

- Add the SOC_BCM2835 and SOC_BCM2836 options for the arm kernel and add the
former to std.bcm2835.

- Add a helper function to read clock frequencies from videocore and use this
to get the default frequency of the sdhci device.

- Add partial support for the Raspberry Pi 2.

- Remove a debug #error from the bcm2835 sdhci driver.

- Fetch the SDHCI frequency from videocore (our prefered source) and only if
it fails, fetch the clock-frequency from DTB. If both methods fail, use the
hardcoded default.

- Pass the supplied buffer length instead of a fixed size.

- Add the routines to query and setup the framebuffer state using the
BCM2835_MBOX_CHAN_PROP channel. The old channel (BCM2835_MBOX_CHAN_FB)
seems deprecated on recent firmware versions and is causing a freeze on
RPi 2.

- Fix DMA on RPi 2. BCM2836 has a different base address for peripherals.

- Enable DMA for sdhci on RPi 2 (BCM2836).

- Add a missing wakeup when releasing ownership of the SPI hardware.

- Fix framebuffer compatibility with new RPi firmware.

- Refactor bcm2835_cpufreq to use bcm2835_mbox_property API.

- Fix the sc(4) framebuffer driver on RPi 2.

- Fix the vt(4) framebuffer driver on RPi 2.

- Remove unused mutex and softc variables.

- Refactor mailbox property API to make it usable for /dev/vcio driver.

- Replace semaphore-base locking with sleep/wait synchronization.

- Fix infinite loop if response from VideoCore never received.

- Set have_message in interrupt to handle "response before READ" case.

- Serialize access to property channel when using bcm2835_mbox_property.

- Force framebuffer virtual viewport to be the same as physical.

- Use proper type of tag in bcm2835_mbox_fb_init.

- bcm2835_cpufreq: Only attach driver if we correcly match on the machine
compatible string.

- Add dev.fb.X.resync sysctl to resync ARM framebuffer with VideoCore.

- Do not use DMA channels used by GPU.

- Define local-intc for BCM2836 platform (RPI2) and make BCM2835 intc
a child of it.

- Fix build for Pi kernels with syscons enabled.

- Use VM_MEMATTR_WRITE_COMBINING memattr for mmap(2) on framebuffer.

- Make intc driver compatible with upstream DTS.

- Make Rapsberry Pi watchdog driver compatible with upstream DTS.

- Make sure intc is attached before interrupt consumers.

- Make framebuffer driver compatible with upstream DT.

- Add one more heuristic to determine MAC address of the SMSC device.

- Add compatibility strings from upstream DT.

- Fix spelling mistake, BCM2835_PASWORD -> BCM2835_PASSWORD.

Approved by: re (kib)

Apply the other half of merges to sdhci_imx(4) and sdhci_fsl(4) that
somehow stayed local when committing r318198, probably due to the
associated tree conflicts.

While at it, register the dependency of sdhci_fsl(4) on sdhci(4) and
allow the former to be built.

MFC r318353:
Avoid use of contiguous memory allocations in busdma when possible.

This patch improves the boundary checks in busdma to allow more cases
using the regular page based kernel memory allocator. Especially in
the case of having a non-zero boundary in the parent DMA tag. For
example AMD64 based platforms set the PCI DMA tag boundary to
PCI_DMA_BOUNDARY, 4GB, which before this patch caused contiguous
memory allocations to be preferred when allocating more than PAGE_SIZE
bytes. Even if the required alignment was less than PAGE_SIZE bytes.

This patch also fixes the nsegments check for using kmem_alloc_attr()
when the maximum segment size is less than PAGE_SIZE bytes.

Updated some comments describing the code in question.

Differential Revision: https://reviews.freebsd.org/D10645
Reviewed by: kib, jhb, gallatin, scottl
Sponsored by: Mellanox Technologies

MFC: r292180 (partial), r297127 (partial), r311911, r311923, r312939,
r313250, r313712, r314811 (partial), r314887 (partial), r315430,
r317981, r315466

o Move the DRIVER_MODULE() statements that declare mmc(4) to be a child
of the various bridge drivers out of dev/mmc.c and into the bridge
drivers.

o Add ACPI platform support for SDHCI driver.

o Fix some overly long lines, whitespace and other bugs according to
style(9) as well as spelling etc. in mmc(4), mmcsd(4) and sdhci(4).

o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
- Remove redundant assignments of the default bus_generic_print_child
device method,
- use DEVMETHOD_END,
- use NULL instead of 0 for pointers.

o Trim/adjust includes.

o Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges
as kernel drivers and their dependency onto mmc(4).

o Add support for eMMC "partitions". Besides the user data area, i. e.
the default partition, eMMC v4.41 and later devices can additionally
provide up to:
1 enhanced user data area partition
2 boot partitions
1 RPMB (Replay Protected Memory Block) partition
4 general purpose partitions (optionally with a enhanced or extended
attribute)

Besides simply subdividing eMMC devices, some Intel NUCs having UEFI
code in the boot partitions etc., another use case for the partition
support is the activation of pseudo-SLC mode, which manufacturers of
eMMC chips typically associate with the enhanced user data area and/
or the enhanced attribute of general purpose partitions.

CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.

o Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the direction of
correctly handling the timeout for these commands in the MMC layer.
Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
recommended by relevant specifications.

o Add an IOCTL interface to mmcsd(4); this is sufficiently compatible
with Linux so that the GNU mmc-utils can be ported to and used with
FreeBSD (note that due to the remaining deficiencies outlined above
SANITIZE operations issued by/with `mmc` currently most likely will
fail). These latter have been added to ports as sysutils/mmc-utils.
Among others, the `mmc` tool of mmc-utils allows for partitioning
eMMC devices (tested working).

o For devices following the eMMC specification v4.41 or later, year 0
is 2013 rather than 1997; so correct this for assembling the device
ID string properly.

o Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at
least for some of the above a matching pair is required.

MFC 303522,303647,303860,303880,304168-304170,304479,304482,304485,305548,
305549:
Chelsio T4/T5 VF driver.

303522:
Various fixes to the t4/5nex character device.

- Remove null open/close methods.
- Don't set d_flags to 0 explicitly.
- Remove t5_cdevsw as the .d_name member isn't really used and doesn't
warrant a separate cdevsw just for the name.
- Use ENOTTY as the error value for an unknown ioctl request.
- Use make_dev_s() to close race with setting si_drv1.

303647:
Store the offset of the KDOORBELL and GTS registers in the softc.

VF devices use a different register layout than PF devices. Storing
the offset in a value in the softc allows code to be shared between the
PF and VF drivers.

303860:
Reserve an adapter flag IS_VF to mark VF devices vs PF devices.

303880:
Track the base absolute ID of ingress and egress queues.

Use this to map an absolute queue ID to a logical queue ID in interrupt
handlers. For the regular cxgbe/cxl drivers this should be a no-op as
the base absolute ID should be zero. VF devices have a non-zero base
absolute ID and require this change. While here, export the absolute ID
of egress queues via a sysctl.

304168:
Make SGE parameter handling more VF-friendly.

Add fields to hold the SGE control register and free list buffer sizes to
the sge_params structure. Populate these new fields in
t4_init_sge_params() for PF devices and change t4_read_chip_settings() to
pull these values out of the params structure instead of reading
registers directly. This will permit t4_read_chip_settings() to be reused
for VF devices which cannot read SGE registers directly.

While here, move the call to t4_init_sge_params() to
get_params__post_init(). The VF driver will populate the SGE parameters
structure via a different method before calling t4_read_chip_settings().

304169:
Update mailbox writes to work with VF devices.

- Use alternate register locations for the data and control registers for
VFs.
- Do a dummy read to force the writes to the mailbox data registers to
post before the write to the control register on VFs.
- Do not check the PCI-e firmware register for errors on VFs.

304170:
Add support for register dumps on VF devices.

- Add handling of VF register sets to t4_get_regs_len() and t4_get_regs().
- While here, use t4_get_regs_len() in the ioctl handler for regdump
instead of inlining it.

304479:
Add structures for VF-specific adapter parameters.

While here, mark which parameters are PF-specific and which are
VF-specific.

304482:
Adjust t4_port_init() to work with VF devices.

Specifically, the FW_PORT_CMD may or may not work for a VF (the PF
driver can choose whether or not to permit access to this command),
so don't attempt to fetch port information on a VF if permission is
denied by the PF.

304485:
Reorder sysctls so that nodes shared with the VF driver are added first.

This permits a single early return for VF devices in the routines that
add sysctl nodes.

305548:
Don't break out of the m_advance() loop if len drops to zero.

If a packet contains the Ethernet header (14 bytes) in the first mbuf
and the payload (IP + UDP + data) in the second mbuf, then the attempt
to fetch the l3hdr will return a NULL pointer. The first loop iteration
will drop len to zero and exit the loop without setting 'p'. However,
the desired data is at the start of the second mbuf, so the correct
behavior is to loop around and let the conditional set 'p' to m_data of
the next mbuf (and leave offset as 0).

305549:
Chelsio T4/T5 VF driver.

The cxgbev/cxlv driver supports Virtual Function devices for Chelsio
T4 and T4 adapters. The VF devices share most of their code with the
existing PF4 driver (cxgbe/cxl) and as such the VF device driver
currently depends on the PF4 driver.

Similar to the cxgbe/cxl drivers, the VF driver includes a t4vf/t5vf
PCI device driver that attaches to the VF device. It then creates
child cxgbev/cxlv devices representing ports assigned to the VF.
By default, the PF driver assigns a single port to each VF.

t4vf_hw.c contains VF-specific routines from the shared code used to
fetch VF-specific parameters from the firmware.

t4_vf.c contains the VF-specific PCI device driver and includes its
own attach routine.

VF devices are required to use a different firmware request when
transmitting packets (which in turn requires a different CPL message
to encapsulate messages). This alternate firmware request does not
permit chaining multiple packets in a single message, so each packet
results in a firmware request. In addition, the different CPL message
requires more detailed information when enabling hardware checksums,
so parse_pkt() on VF devices must examine L2 and L3 headers for all
packets (not just TSO packets) for VF devices. Finally, L2 checksums
on non-UDP/non-TCP packets do not work reliably (the firmware trashes
the IPv4 fragment field), so IPv4 checksums for such packets are
calculated in software.

Most of the other changes in the non-VF-specific code are to expose
various variables and functions private to the PF driver so that they
can be used by the VF driver.

Note that a limited subset of cxgbetool functions are supported on VF
devices including register dumps, scheduler classes, and clearing of
statistics. In addition, TOE is not supported on VF devices, only for
the PF interfaces.

Sponsored by: Chelsio Communications

MFC r307518:
Fix device delete child function.

When detaching device trees parent devices must be detached prior to
detaching its children. This is because parent devices can have
pointers to the child devices in their softcs which are not
invalidated by device_delete_child(). This can cause use after free
issues and panic().

Device drivers implementing trees, must ensure its detach function
detaches or deletes all its children before returning.

While at it remove now redundant device_detach() calls before
device_delete_child() and device_delete_children(), mostly in
the USB controller drivers.

Tested by: Jan Henrik Sylvester <me@janh.de>
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D8070

MFC r303891, r303892:
sys: replace comma with semicolon when pertinent.

Uses of commas instead of a semicolons can easily go undetected. The comma
can serve as a statement separator but this shouldn't be abused when
statements are meant to be standalone.

MFC r289477:

Fix a strange macro re-definition compile error. If the VM_MAXUSER_ADDRESS
value is defined as a config option the definition is emitted into
opt_global.h which is force-included into everything. In addition, the
symbol is emitted by the genassym mechanism, but that by its nature reduces
the value to a 0xnnnnnnnn number. When compiling a .S file you end up
with two different definitions of the macro (they evaluate to the same
number, but the text is different, upsetting the compiler).

MFC r294032:

Fix the handling of the "PDC write transfer length" erratum for at91. The
problem affects revision 1xx hardware as well as later versions. Also, the
recommended workaround is to set the PDC count register for a 12-byte
transfer when the actual size is less than that, but there is no need to
extend or zero-out the data buffer, because the blklen register contains
the real transfer size and only that many bytes will be transferred.

Also add a sysctl to turn debugging printfs on or off on the fly.

MFC r293830:

Fix the spelling of fueword* to eliminate compile warnings about mismatched
begin/end symbols when the warning level is turned up.

MFC r293053, r293061, r293063, r293064, r293065, r293775, r293792:

Use 64-bit math when finding a block of ram to hold the kernel. This fixes
a problem on 32-bit systems which have ram occupying the end of the physical
address space -- for example, a block of ram at 0x80000000 with a size of
0x80000000 was overflowing 32 bit math and ending up with a calculated size
of zero.

Use 64-bit math when processing the lists of physical and excluded memory
to generate the phys_avail and dump_avail arrays.

Work around problems that happen when there is ram at the end of the
physical address space.

Cast pointer through uintptr_t on the way to uint64_t to squelch a warning.

Reword the comment to better describe what I found while researching the
problem that led to this temporary workaround (and also so I can properly
cite the PR in the commit this time).

Cast using uintfptr_t and eliminate the cast to uint64_t which is uneeded
because rounding down cannot increase the number of bits needed to express
the result.

Go back to using uintptr_t, because code that actually compiles is
infinitely less buggy than code that is theoretically correct in some
alternate universe.

PR: 201614

MFC r293045, r293046:

Make the 'env' directive described in config(5) work on all architectures,
providing compiled-in static environment data that is used instead of any
data passed in from a boot loader.

Previously 'env' worked only on i386 and arm xscale systems, because it
required the MD startup code to examine the global envmode variable and
decide whether to use static_env or an environment obtained from the boot
loader, and set the global kern_envp accordingly. Most startup code wasn't
doing so. Making things even more complex, some mips startup code uses an
alternate scheme that involves calling init_static_kenv() to pass an empty
buffer and its size, then uses a series of kern_setenv() calls to populate
that buffer.

Now all MD startup code calls init_static_kenv(), and that routine provides
a single point where envmode is checked and the decision is made whether to
use the compiled-in static_kenv or the values provided by the MD code.

The routine also continues to serve its original purpose for mips; if a
non-zero buffer size is passed the routine installs the empty buffer ready
to accept kern_setenv() values. Now if the size is zero, the provided buffer
full of existing env data is installed. A NULL pointer can be passed if the
boot loader provides no env data; this allows the static env to be installed
if envmode is set to do so.

Most of the work here is a near-mechanical change to call the init function
instead of directly setting kern_envp. A notable exception is in xen/pv.c;
that code was originally installing a buffer full of preformatted env data
along with its non-zero size (like mips code does), which would have allowed
kern_setenv() calls to wipe out the preformatted data. Now it passes a zero
for the size so that the buffer of data it installs is treated as
non-writeable.

Also, revert accidental change that snuck into r293045.

MFC r290647, r292523, r292891:

ARM: Improve robustness of locore_v6.S and fix errors.
- boot page table is not allocated in data section, so must be
cleared before use
- map only one section (1 MB) for SOCDEV mapping (*)
- DSB must be used for ensuring of finishing TLB operations
- Invalidate BTB when appropriate

Allow armv4/5 kernels to be loaded on any 2MB boundary, like armv6/7.

This eliminates the reliance on PHYSADDR and KERNPHYSADDR compile-time
symbols (except when the rom-copy code is enabled) by using the current
PC and the assumption that the entry-point routine is in the first 1MB
section of the text segment.

Other cleanups done:

- Reduce the initarm() stack size back to 2K. It got increased to
4 * 2K when this file was supporting multicore armv6, but that
support is now in locore-v6.S.

- When building the temporary startup page tables, map the entire
4GB address space as VA=PA before mapping the kernel at its loaded
location. This allows access to boot parameters stored somewhere
in ram by the bootloader, regardless of where that may be.

- When building the page table entry for supporting EARLY_PRINTF, map
the section as uncached unbuffered, since it is presumably device
registers.

Note that this restores the ability to use loader(8)/ubldr on armv4/5
kernels. That was broken in r283035, the point at which ubldr started
loading an arm kernel at any 2MB boundary.

Also note that after this, there is no reason to set KERNVIRTADDR to
anything other than 0xc0000000, and no need for PHYSADDR or KERNPHYSADDR
symbols at all.

Bring some of the recent locore-v4.S improvements into locore-V6...

- Map all 4GB as VA=PA so that args passed in from a bootloader can
be accessed regardless of where they are.
- Figure out the kernel load address by directly masking the PC rather
then by doing pc-relative math on the _start symbol.
- For EARLY_PRINTF support, map device memory as uncacheable (no-op for
ARM_NEW_PMAP because all TEX types resolve to uncacheable).

MFC r277416, r282023, r282024, r282025, r284264:

Remove the SMP code from locore-v4. These will never use the SMP code as
there is no multi-core hardware prior to ARMv6.

Remove the armv6 code from locore-v4.S, it's not needed there.

Fix the style of locore-v4.S and locore-v6.S to help find any common code.

Cleanup a little more:
- Remove whitespace at the end of lines
- Use a tab after instructions, not spaces

Fix the spelling of __ARM_ARCH >= 6 in sys/arm/arm.

MFC r292419, r294237:

Fix the clock divisor calc for imx6 sdcard bus speed.

Quick exit after setting the clock control register.

MFC r291149, r291367:

Update the imx5/imx6 cpu_reset() implementation based on a new understanding
of the SRS (software reset) bit in the watchdog control register. Despite
what the manual seems to imply, this bit DOES trigger an immediate reset, as
opposed to simply flagging the type of reset as software-triggered.

Rename sysctl node hw.imx6 to hw.imx. Move its definition to imx_machdep.c
so that code shared between imx5 and imx6 can work with OIDs under that node.

Add last_reset_status (integer) and last_reset_reason (string) OIDs that
provide info about the last chip reset (power-on, software reset, watchdog
timeout).

MFC r289619:

Follow the advice of the misplaced comment and don't access the map struct
after freeing it. Remove the comment whose uselessness has been revealed.

MFC r293613:

Implement vsyscall hack. Prior to 2.13 glibc uses vsyscall
instead of vdso. An upcoming linux_base-c6 needs it.

MFC r283479:

The kernel sends signals to the processes via ABI specific sv_sendsig method.
Native ABI do not need signal conversion, only emulators may want this. Usually
emulators implements its own sv_sendsig method. For now only ibcs2 emulator does
not have own sv_sendsig implementation and depends on native sendsig() method.
So, remove any extra attempts to convert signal numbers from native sendsig()
methods except from i386 where ibsc2 is living.

MFC r283382:

In preparation for switching linuxulator to the use the native 1:1
threads add a hook for cleaning thread resources before the thread die.

MFC r281828, r289083, r289084, r289091, r289093, r289095, r289097, r289098,
r289104, r289105, r289118: various i2c fixes...

Fix numerous issues in iic(4) and iicbus(4):
--Allow multiple open iic fds by storing addressing state in cdevpriv
--Fix, as much as possible, the baked-in race conditions in the iic
ioctl interface by requesting bus ownership on I2CSTART, releasing it on
I2CSTOP/I2CRSTCARD, and requiring bus ownership by the current cdevpriv
to use the I/O ioctls
--Reduce internal iic buffer size and remove 1K read/write limit by
iteratively calling iicbus_read/iicbus_write
--Eliminate dynamic allocation in I2CWRITE/I2CREAD
--Move handling of I2CRDWR to separate function and improve error handling
--Add new I2CSADDR ioctl to store address in current cdevpriv so that
I2CSTART is not needed for read(2)/write(2) to work
--Redesign iicbus_request_bus() and iicbus_release_bus():
--iicbus_request_bus() no longer falls through if the bus is already
owned by the requesting device. Multiple threads on the same device may
want exclusive access. Also, iicbus_release_bus() was never
device-recursive anyway.
--Previously, if IICBUS_CALLBACK failed in iicbus_release_bus(), but
the following iicbus_poll() call succeeded, IICBUS_CALLBACK would not be
issued again
--Do not hold iicbus mtx during IICBUS_CALLBACK call. There are
several drivers that may sleep in IICBUS_CALLBACK, if IIC_WAIT is passed.
--Do not loop in iicbus_request_bus if IICBUS_CALLBACK returns
EWOULDBLOCK; instead pass that to the caller so that it can retry if so
desired.

Bugfix: Exit the transfer loop if any read or write operation fails. Also,
perform a stop operation on the bus if there was an error, otherwise the
bus will remain hung forever. Consistantly use 'if (error != 0)' style in
the function.

Mostly rewrite the imx i2c driver. This started out as an attempt to fix
one specific problem: the driver didn't check for ACK/NAK after writing a
slave address byte to the bus, and some slaves signal that they are busy
(such as when completing an internal write to flash memory) by sending a
NAK in response to being addressed.

Use IIC_EBUSBSY and IIC_BUSERR status values consistantly across all drivers.
Make it clearer what each one means in the comments that define them.

Add iic2errno(), a helper function to translate IIC_Exxxxx status values to
errno values that are at least vaguely equivelent. Also add a new status
value, IIC_ERESOURCE, to indicate a failure to acquire memory or other
required resources to complete a transaction.

Return only IIC_Exxxx status values from iicbus-layer functions. Most of
these functions are thin wrappers around calling the hardware-layer driver,
but some of them do sanity checks and return an error.

Add a short name, IIC_INTRWAIT, for the common case (IIC_INTR | IIC_WAIT).

Replace a local sx lock that allowed only one client at a time to access
an eeprom device with iicbus_request/release_bus(), which achieves the
same effect and also keeps other i2c slave drivers from clashing on the bus.

MFC of r288447. Only the Marvell driver has been updated as there is no
support for Raspbetty Pi 2 in stable/10.

An IPI must be cleared before it is handled otherwise next IPI could be
missed. In other words, if a new request for an IPI is sent while the
previous request is being handled but the IPI is not cleared yet, the
clearing of the previous IPI request also clears the new one and the
handling is missed.

There are only three MP interrupt controllers in ARM now. Two of them are
fixed by this change, the third one is correct, probably only just by
accident. The fix is minimalistic as new interrupt framework is awaited.

It was debugged on RPi2 where missing IPI handling together with SCHED_ULE
led to situation in which tdq_ipipending was not cleared and so IPI_PREEMPT
was stopped to be sent. Various odditys were found related to slow system
response time like various events timed out, and slow console response.

MFC r288000:
Add support for weak symbols to the kernel linkers.

MFC r283547:

Ensure that all arm kernel configs contain ALT_BREAK_TO_DEBUGGER and not
BREAK_TO_DEBUGGER if they have a serial console (most do). A burst of
serial line noise (such as unplugging a usb serial adapter) can look like
a break and drop a working system into the debugger. The alt break sequence
(<CR>~^B) works fine on both serial and non-serial consoles.

MFC r286942, r286943, r286944: imx watchdog fixes...

Add compatible strings for all the hardware this driver works with.

Also, move the READ/WRITE bus space access macros from the header into the
source file, and rename them to RD2/WR2 to make it clear they're 16-bit
accessors. (READ/WRITE just don't seem like good names to be in a public
header file.)

Make the imx watchdog actually work, by setting WDOG_CR_WDE (enable bit).
Also, follow the rules from watchdog(9) about what values to return in
various situations (especially, don't touch *error when asked to set a
non-zero timeout that isn't achievable on the hardware).

Enable the watchdog driver on imx6, now that it works.

Always compile in PPS capture. Use the same device name used in 11-current.

This is a direct commit to 10-stable because the corresponding changes in 11
are bound up with all the device-tree rework for beaglebone. This somewhat
aligns the features between the two branches, from a user's perspective.

MFC r280451:
Remove from legacy ata(4) driver support for hardware, supported by newer
and more functional drivers ahci(4), siis(4) and mvs(4).

This removes about 3400 lines of code, unused since FreeBSD 9.0 release.

MFC: r281752

Make a comment reflect reality.

Fix two remaining issues with the arm UFS mount issue:

- Add the GEOM_PART_GPT option and enable MSDOSFS in the GUMSTIX
kernel. [1]

- Add GEOM_LABEL to the PANDABOARD kernel, that should have been
included included in r285132. I confused the kernel configuration
used for the WANDBOARD and PANDABOARD, which the former uses the
IMX6 kernel configuration, along with the CUBOX-HUMMINGBOARD.

This is a direct commit to stable/10, as was r285132.

[1] I do not actually have the GUMSTIX board, but I suspect it will
fail to boot in the same way as the others have been.

Approved by: re (kib)
Sponsored by: The FreeBSD Foundation

Add the GEOM_LABEL option to the BEAGLEBONE, GUMSTIX, and RPI-B
kernel configuration files, resolving an issue where the UFS and
MSDOSFS partitions would not mount as set in fstab(5).

This is a direct commit to stable/10, as the GEOM_LABEL option
is handled differently in head for arm/armv6. The WANDBOARD
and PANDABOARD already have this kernel option entry via the IMX6
kernel configuration file, so do not need to be changed.

Approved by: re (kib)
Sponsored by: The FreeBSD Foundation

MFC r279824, r279827, r279825:

Add a dtb module for AM335x systems (just Beaglebone right now).

Remove the static DTB config and instead build modules/dtb/am335x.

Also, remove WITHOUT_MODULES="ahc" which was added long ago to work
around build problems that have long since been fixed correctly.

Revert accidentally commited modules/Makefile file from r279824.

MFC r278338, r278340, r278458, r278519:

Create a module to install the Raspberry Pi dtb files.

Pull in the rpi.dts -> rpi.dtb module (dtb/rpi) and have it install
rpi.dtb in /boot/dtb by default.

Add a module to build the dtb files for all supported imx6 systems.

Remove imx6s-wandboard.dts, there is no such file.

MFC r276480, r276485, r276498, r277225, r277226, r277227, r277230,
r277637, and r283149 (by emaste@).

r276485 is the real change here, the rest deal with the fallout of
mp_ring's reliance on 64b atomics.

Use the incorrectly spelled 'eigth' from struct pkthdr in this branch
instead of MFC'ing r261733, which would have renamed the field of a
public structure in a -STABLE branch.
---

r276480:
Temporarily unplug cxgbe(4) from !amd64 builds.

r276485:
cxgbe(4): major tx rework.

a) Front load as much work as possible in if_transmit, before any driver
lock or software queue has to get involved.

b) Replace buf_ring with a brand new mp_ring (multiproducer ring). This
is specifically for the tx multiqueue model where one of the if_transmit
producer threads becomes the consumer and other producers carry on as
usual. mp_ring is implemented as standalone code and it should be
possible to use it in any driver with tx multiqueue. It also has:
- the ability to enqueue/dequeue multiple items. This might become
significant if packet batching is ever implemented.
- an abdication mechanism to allow a thread to give up writing tx
descriptors and have another if_transmit thread take over. A thread
that's writing tx descriptors can end up doing so for an unbounded
time period if a) there are other if_transmit threads continuously
feeding the sofware queue, and b) the chip keeps up with whatever the
thread is throwing at it.
- accurate statistics about interesting events even when the stats come
at the expense of additional branches/conditional code.

The NIC txq lock is uncontested on the fast path at this point. I've
left it there for synchronization with the control events (interface
up/down, modload/unload).

c) Add support for "type 1" coalescing work request in the normal NIC tx
path. This work request is optimized for frames with a single item in
the DMA gather list. These are very common when forwarding packets.
Note that netmap tx in cxgbe already uses these "type 1" work requests.

d) Do not request automatic cidx updates every 32 descriptors. Instead,
request updates via bits in individual work requests (still every 32
descriptors approximately). Also, request an automatic final update
when the queue idles after activity. This means NIC tx reclaim is still
performed lazily but it will catch up quickly as soon as the queue
idles. This seems to be the best middle ground and I'll probably do
something similar for netmap tx as well.

e) Implement a faster tx path for WRQs (used by TOE tx and control
queues, _not_ by the normal NIC tx). Allow work requests to be written
directly to the hardware descriptor ring if room is available. I will
convert t4_tom and iw_cxgbe modules to this faster style gradually.

r276498:
cxgbe(4): remove buf_ring specific restriction on the txq size.

r277225:
Make cxgbe(4) buildable with the gcc in base.

r277226:
Allow cxgbe(4) to be built on i386. Driver attach will succeed only on
a subset of i386 systems.

r277227:
Plug cxgbe(4) back into !powerpc && !arm builds, instead of building it
on amd64 only.

r277230:
Build cxgbe(4) on powerpc64 too.

r277637:
Make sure the compiler flag to get cxgbe(4) to compile with gcc is used
only when gcc is being used. This is what r277225 should have been.

MFC:

r283014: Disable unmapped I/O: it is broken for unaligned pages
r283126: Fix comments

MFC:

Merge r276846: Add infrastructure to build dtb files from dts files.

MFC r283033, r283062, r283066, r283069:

Do not set preload_addr_relocate for ARM.

Refactor net_getparams() to make it easier to get params from sources other
than bootp and rarp.

Add a routine to obtain netboot parameters from the U-Boot env vars

Enable the NETIF_OPEN_CLOSE_ONCE option for ubldr.

MFC r282516:

Add the code necessary to run the imx6 chip at its lowest clock/power
operating point (396MHz/950mV).

MFC r268838, r277644:

Add support for Toradex Apalis i.MX6 development board.

Add support for imx6 audio transmitting, include drivers for:
o Digital Audio Multiplexer (AUDMUX)
o Smart Direct Memory Access Controller (SDMA)
o Synchronous Serial Interface (SSI)

MFC r282418:

On an icache sync by address/len, round the length up if the operation
spans a cacheline boundary.

MFC r279850:

Remove MODULES_OVERRIDE="" for Marvel-based armv5 systems.

Also add some #NO_UNIVERSE to configs that essentially duplicate DB-88F6XXX.

MFC r279837:

Remove MODULES_OVERRIDE="" and WITHOUT_MODULES="ahc" from armv6 configs.

MFC r276004: Fix the indentation to simplify comparing the ARM config files.

MFC r262409, r267129, r267130, r280709:

Move the declaration for mpentry() into a header file

Fix broken SMP startup on Armada XP after r265694

Avoid using hard-coded SoC's register address in mptramp code for Armada XP

Use pmap_mapdev()/unmapdev() to temporarily map on-chip sram while copying
the startup trampoline code.

MFC r280278, r280402:

Allow to override default kernel virtual address assignment on ARM.

Do not save/restore the TLS pointer on context switch for armv6.

MFC r279816, r279826:

Attach the prcm clock driver early, so it can set the mpcore timer frequency.

Change the name of the dmtimer pps device from /dev/ppsN to /dev/dmtppsN.

MFC r279810, r279811:

Clean data cache before instruction cache in armv7_icache_sync_range().

Add minimum cache line sizes to struct cpuinfo, use them in the new cache
maintenance routines. Also add a routine to invalidate the branch cache.

MFC r278518: Resolve cache line size from CP15 instead of hard-coded 32.

MFC r277098, r279235:

Introduce ofw_bus_reg_to_rl() to replace part of common bus code

Fix endianness on FDT read in ARM GIC

MFC r274249, r274484, r275583:

Avoid panic in ofwbus caused by not released resource list entry

Fix typo in ARM GIC device_printf()

Fix buffer overflow in Marvell PCI/PCIe driver

MFC r276021, r279766:

Reduce the diff in the Ti aintc between head and arm_intrng

Fix spurious interrupts on arm am335x (beaglebone), by doing the EOI in
both the post-filter and post-thread callbacks.

MFC r279723, r279724:

Define new linker set, UART_FDT_CLASS_AND_DEVICE, for registering full
(class and device) FDT UART. Define second one, UART_FDT_CLASS, for UART
class only.

Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.

MFC r277132: Rename Exynos UART driver functions. No functional change.

MFC r266942, r266944:

Do only receive chars if there are some data in the buffer.
This fixes operation on newer Exynos boards.

Rename exynos uart driver filenames.

MFC r279702: Update a comment that had drifted out of date.

MFC r278770, r279114, r279215, r279338, r279543:

Add logic for handling new-style ARM cpu ID info.

Correct a comment which was exactly backwards from reality.

There is no reason to do i+dcache writeback and invalidate when changing
the translation table (this may be left over from armv5 days). It's
especially bad to do so using a cache operation that isn't coherent on
SMP systems.

Add casting to make atomic ops work for pointers. (Apparently nobody has
ever done atomic ops on pointers before now on arm).

Revert incorrect casting.

MFC r282500, r282693:
r282500:
Add initial support for building RPI2 images.

In release.sh, allow overriding buildenv_setup() before
the handoff to arm/release.sh.

Copy arm/RPI-B.conf -> arm/RPI2.conf, set UBOOT_PORT and
the correct KERNEL, and add the buildenv_setup() override
to install the sysutils/u-boot-rpi2 port/package.

Copy tools/arm/crochet-RPI-B.conf -> tools/arm/crochet-RPI2.conf,
and set the correct entries for the RaspberryPi2 board.

r282693:
Merge ^/projects/release-arm-redux into ^/head.

Of note:

- This commit adds native FreeBSD/arm release build support without
requiring out-of-tree utilities.

- Part of this merge removes the WANDBOARD-{SOLO,DUAL,QUAD} kernel
configuration files, for which the IMX6 kernel configuration file
should be used instead.

- The resulting images have a 'freebsd' user (password 'freebsd'),
to allow ssh(1) access when console access is not available (VGA
or serial). The default 'root' user password is set to 'root'.

- The /etc/ttys file for arm images now enable both ttyv0 and ttyu0
by default.

Note: The RPI2 kernel configuration does not yet exist in stable/10,
however the merge conflicts needed to be properly resolved.
Additionally, SRCBRANCH has been set to base/stable/10 in the updated
arm configuration files as part of this commit.

Sponsored by: The FreeBSD Foundation

MFC r282120:
The add_bounce_page() function can be called when loading physical
pages which pass a NULL virtual address. If the BUS_DMA_KEEP_PG_OFFSET
flag is set, use the physical address to compute the page offset
instead. The physical address should always be valid when adding
bounce pages and should contain the same page offset like the virtual
address.

Submitted by: Svatopluk Kraus <onwahe@gmail.com>
Reviewed by: jhb@

Merge r263233 from HEAD to stable/10:

Update kernel inclusions of capability.h to use capsicum.h instead; some
further refinement is required as some device drivers intended to be
portable over FreeBSD versions rely on __FreeBSD_version to decide whether
to include capability.h.

Sponsored by: Google, Inc.

MFC r279312:

Fix a number of -Wcast-qual warnings under sys/arm. No functional
change.

Submitted by: andrew

MFC r279311:

In sys/arm/ti/am335x/am335x_rtc.c, fix a clang 3.6.0 warning about
am33x_rtc_softc::sc_irq_res (which is an array) never being NULL.

Submitted by: andrew

MFC r274670, r274671, r276168:

Moves all the duplicate code to a single function.

Verify for invalid modes and unwanted flags before pass the new flags to
driver.

Make gpio_default_map_gpios() static. No functional changes.

Improves the GPIO API description a little bit.

gpio_pin_max must return the maximum supported pin number and not the total
number of pins on the system.

MFC r273799:

Make the GPIO children attach to the first unit available and not only to
unit 0.

This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.

MFC: r273264, r274409, r278212, r278213:

Add a workaround needed to fix a bug of Arasan Host Controller where it may
lose the contents of consecutive writes (that happens within two SD card
clock cycles).

This fixes the causes of instability during the SD card detection and
identification on Raspberry Pi (which happens at 400 kHz and so was much
more vulnerable to this issue).

Remove the previous workaround which clearly can't provide the same effect.

Remove stale comments about the issues with HS mode.

Remove a previous workaround to limit the minimum sdhci frequency that
isn't needed anymore.

Remove some duplicate calls to bus_release_resource() and destroy the mutex
on error cases.

While here remove unnecessary includes.

MFC r276298, r276303:

Remove the '#undef DEBUG' that should not be committed.

Removes unused and duplicate headers.

Bring the wait limit on mailbox write to a more sane value.

Fix a off-by-one bug on wait time limit.

Remove extra blank line.

MFC r276296, r277207:

Make consistent use of the correct debug macros across the file.

Fix the C -> K temperature conversion for the dev.cpu.0.temperature sysctl.

Remove the unused temperature conversion macros.

MFC r277643:
Remove Giant from /dev/mem and /dev/kmem.

MFC r277743:
Arm: ensure that _tmppt KVA is used exclusively.

MFC r278031: Remove a stale comment.

MFC r277555, r277568:

Enable all sd device clocks on imx6.

Add imx5/6 pinmux driver support for encoded input register configs.

MFC r277523: Add last_fault_code when DEBUG is defined.

MFC r277532, r277533: Add Maxmem global for arm.

MFC r277454, r277460, r277465, r277466, r277467, r277469, r277470, r277471,
r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479,
r277480, r277512, r277516:

Add inline implementations of arm bus_space_read/write_N().

Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.

Use the explicit member initializer style to init the bus_space struct.

Use arm/bus_space-v6.c for all armv6 systems

Consolidate many identical implementations of bus_space to a single
common tag and implementation shared by armv4 and armv6.

Micro-optimize the new arm inline bus_space implementation by grouping all
the data the inline functions access together at the start of the bus_space
struct so that they all fit in a single cache line.

MFC r272103: Move s3c2xx0 into the samsung directory.

MFC r257740, r257739: Switch to using common armv6 bus_space tag.

MFC r277306, r277307, r277346:

Add defines for SDHCI 3.0 controllers.

Add a new SDHCI quirk, SDHCI_QUIRK_DONT_SET_HISPD_BIT.

Save the command-and-flags value into shadow register when it is written.

MFC r277305: Minor cleanups, comment changes.

MFC r277265: Enable the snoop control unit during MP startup

MFC r277037: Enable ALT_BREAK_TO_DEBUGGER for rpi.

MFC r276003:

Start to clean up the armv6 kernel configs by reducing the diff between
them in the first sections and the later FDT support.

MFC r263245, r269233, r267101, r275961: Config style cleanups.

Some of these are effectively record-only merges, because the actual
merge happened during conflict resolution of some prior merge.

MFC r271220:

Create a common i.MX53 config and use it with the two existing i.MX53 boards.

MFC r275962: Clean up style of CUBIEBOARD2 config.

MFC r277028, r277038:

Check for and handle failures of bus_dmamap_load().
Handle dma mappings with more than one segment for rpi sdhci.

MFC r276985:

Store the shadow command/mode register in the softc, not a local static var.

MFC r276803, r276808:

Add accessors for the ARM CP15 performance monitor registers.
Move the inclusion of cpu-v6.h inside the #ifdef _KERNEL block.

MFC r267719:

Remove the incomplete Tegra 2 code, nobody was maintaining it. The AC100
never booted to single user mode. (And now it is blocking the ability
to MFC other changes since it is gone from -current and hasn't kept up
with the other changes).

MFC r266083, r267597:

Give suitably-endowed ARMs a register similar to the x86 TSC register.

MFC r276642, r276644:

Remove commented-out options SMP and APIC_IO from old arm boards that will
never be able to support smp.

Switch all arm kernels with option SMP to use SCHED_ULE instead of 4BSD.

MFC r266647, r270912, r273089:

Reduce the diff between the PandaBoard and BeableBone kernel configs

Resync comments about scbus and pass for life after AHCI joined CAM.

Uncomment general options from the Pandaboard config. These are in other
configs and there is no reason for them not to be here.

MFC r272356, r275639, r276638:

Split syscall handling out to a separate file.

Include sys/kernel.h to pick up the definition of hz in syscall.c

Add a new trap-v6.c which has support for all armv7 exceptions.

MFC r276525, r276596:

Put in a workaround for bug 196407 (arm modules cause crashes & panics).
(Don't allow movw/movt insn in modules.)

Fix alignment directives in arm asm code after clang 3.5 import.

MFC r276519:

Define a WFI macro that expands to the right form of wait-for-interrupt
depending on the architecture.

MFC r276518: Rework vfp code so it will compile on clang 3.4 and 3.5.

MFC r276444, r276445, r276470:

Fix a paste-o in dcache_inv_pou_all().

Change the order of operations for the initial cache setup.

A couple small fixes to make clang 3.5 happy... Move END(sigcode)
and other misplace ENTRY/END macros.

MFC r276394, r276397:

Add armv6 implementations of the startup-time cache maintenence functions.

Create a new locore.S that includes locore-v4 or locore-v6 as needed.

MFC r276395, r276396: Rename locore.S to locore-v4.S and add a new locore-v6.S.

MFC r276247, r276333, r276334, r276335, r276336, r276340, r276350:

Include acle-compat.h directly rather than getting it via sysreg.h.

Add new code to read and parse cpu identification data using the new CPUID
mechanism defined for armv7.

Add new TLB and cache maintainence functions for armv6 and armv7.

Eliminate an unused macro whose name clashes now with a function in the
new cpu-v6.h

Add cache maintenance functions which will be used by startup code to
initially set up the MMU.

Fix a "decl is not a prototype" error noticed by gcc (but not clang).

Update comments (r4 is not used anywhere), use non-profiling entry macros.

Add arm option ARM_NEW_PMAP, to allow us to begin adding the new pmap
code alongside the existing implementation

Add armv6 implementations of cache operations to avoid duplication

MFC r272209, r272300, r276212, r276213:

Add machine/sysreg.h to simplify accessing the system control coprocessor
registers and use it in the ARMv7 CPU functions.

Add macros for asm barrier instructions with arch-specific implementations.

Define only the CP15 register operations that are valid for the architecture.

MFC r276206:

For data and instruction prefetch aborts, call the same handler in the C
code, passing a 0/1 flag that indicates which type of abort it was. This
sets the stage for unifying the handling of page faults in a single routine.

MFC r276196, r276197, r276198, r276202, r276203, r276204:

Change the style of the DO_AST macro to match the others

Remove _PROF_PROLOGUE from the EENTRY() macros.

Stylish changes... put tabs where they need to be in macros, move lines
around so that related things are more grouped together, rewrite comments.

Fix the GLOBAL macro so it works (upper vs lowercase X), use it in _EENTRY.

Create 'L' variants of all the ENTRY macros for file-static/local symbols.

MFC r276191: Display correct value for cache level-of-coherency (needs +1).

MFC r276187, r276190, r271422:

Rename pmap_kenter_temp to pmap_kenter_temporary to be consistent with the
other architectures with this function.

Eliminate unnecessary references to pte.h internals by using the standard
pmap_kenter_temporary() to map pages while dumping.

Cleanup up ARM *frame structures.

MFC r271394, r271398:

Add more register values to armreg.h and remove CPU_CONTROL_32BP_ENABLE
from asm.h as they were already defined in armreg.h.

Unify interrupts bit definition and usage. While here remove PSR_C_bit.

MFC r275779, r275963, r276101, r276161, r276297:

Move ofw_cpu.c to sys/dev/ofw so that it can be used by other
architectures.

Add driver for CPU frequency/voltage control on the Raspberry Pi.

On initialization, do not use bcm_mbox_intr() to read the pending messages.
This fixes the hang that happens on boot while initializing the cpufreq on
Raspberry Pi.

MFC r276047: Add -march=armv7a to the kernel compile for all v7a ARM systems.

MFC r266943, r266950, r267390:

Add support for Exynos 5420 Octa - 8-core (big.LITTLE) ARM machine
Enable SMP for both Exynos5 models we support.

MFC r277958, r278061:

ti_pruss: make sure the mmap'ed memory region is uncacheable.

am335x_clk_pruss_activate(): use the L3F clock.

MFC r278001:
Do not qualify the mcontext_t *mcp argument for set_mcontext(9) as const.

MFC r266969 and r276717:
Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespaces while at it.
- Add support for PAE.

MFC r277042:

Add support to turn off Beaglebone with poweroff(8) or shutdown(8) -p.

To cut off the power we need to start the shutdown sequence by writing
the OFF bit on PMIC.

Once the PMIC is programmed the SoC needs to toggle the PMIC_PWR_ENABLE
pin when it is ready for the PMIC to cut off the power. This is done by
triggering the ALARM2 interrupt on SoC RTC.

The RTC driver only works in power management mode which means it won't
provide any kind of time keeping functionality. It only implements a way
to trigger the ALARM2 interrupt when requested.

MFC r261459, r273045, r273047.

r261459:
Remove trailing tabs causing false grep positives.

r273045:
Sort the files in the am355x directory.

r273047:
Remove the need for files.beaglebone and std.beaglebone by moving the one
option they defined into files.am335x.

MFC r277206:

Catch a few cases where we need to release memory resources on errors.

Place parentheses around variables in macros.

MFC:
Allow timer0 to run at full 24MHz not at 24MHz/16 by setting prescale to 1.

Approved by: stas (mentor)

MFC r276249:

Fix the musb initialization sequence on AM335x.

According to http://e2e.ti.com/support/arm/sitara_arm/f/791/t/210729 the
USB reset pulse has an undocumented duration of 200ns and during this
period the module must not be acessed.

We wait for 100us to take into account for some imprecision of the early
DELAY() loop.

This fixes the eventual 'External Non-Linefetch Abort (S)' that happens at
boot while resetting the musb subsystem.

While here, enable the USB subsystem clock before the first access.

MFC r273606:

Fix cpsw_detach() to not panic when called from cpsw_attach().

For an unkown reason (at moment), sometimes if_cpsw cannot read from PHY
and fails to attach calling cpsw_detach() which end up in a panic.

Fix it by doing the proper check before detach the miibus and also fix the
leak of few variables.

And to actually make it work, ether_ifattach() has to be moved to the end
of cpsw_attach() to avoid a race where calling ether_ifdetach() before
domain_init() (which will only run later on) would make it crash at
INP_INFO_RLOCK() on in_pcbpurgeif0().

Tested on: BBB (am335x)

MFC r273599:

Fix a bug where DMA maps created with bus_dmamap_create() won't increment
the map count and without being able to keep track of the current map
allocation, bus_dma_tag_destroy() will fail to proceed and will return
EBUSY even after all the maps have been correctly destroyed with
bus_dmamap_destroy().

Found while testing the detach method of a NIC.

MFC r276314:

Convert the BSC (i2c) driver to use the new iicbus_get_frequency().

Tested on: Raspberry pi

MFC r273610:

Add an iicbus_reset() method to bcm2835_bsc. While it is generally not
used for kernel devices it is used by i2c(8).

This fix the 'error: Device not configured' when i2c(8) tries to reset the
controller:

# i2c -r
Resetting I2C controller on /dev/iic0: error: Device not configured

For now use conservative settings for default i2c speeds.

MFC r273329, r273337 and r274415

Add another wakeup() after actually set the bus as free.

This fix a race where the threads waiting for the bus would wake up early
and still see bus as busy.

While here, give a better description to wmesg for the two use cases we
have (bus and io waiting).

Fix the mtx_sleep() error checking, catch all errors and not only
EWOULDBLOCK.

Do not print any message at errors. The errors are properly sent to upper
layers which should be able to deal with it, including printing the errors
when they need to.

The error message was quite annoying while scanning the i2c bus.

MFC r273701, r274556
By the time that pmap_init() runs, vm_phys_segs[] has been initialized.
Obtaining the end of memory address from vm_phys_segs[] is a little
easier than obtaining it from phys_avail[].

Enable the use of VM_PHYSSEG_SPARSE on amd64 and i386, making it the
default on i386 PAE. (The use of VM_PHYSSEG_SPARSE on i386 PAE saves
us some precious kernel virtual address space that would have been
wasted on unused vm_page structures.)

MFC r276165, r276166:

Define the old-school arm arch constants we still use internally based on
the somewhat newer constants predefined by the compiler. This will allow
userland apps to use various machine/foo.h headers without CPUTYPE defined.

MFC r276029:

Remove a volatile qualifier on return type that is ignored and results in
a -Wreturn-type warning when compiled with gcc.

MFC r275944, r275946, r275949, r275950:

Add code to set and reset open-drain mode on the bus when requested.

When command and data interrupts have been aggregated together, don't do
the data-completed processing if a command-error interrupt is also asserted.

Add a new sdhci quirk, SDHCI_QUIRK_WAITFOR_RESET_ASSERTED, to work around
TI OMAP controllers which will return the reset-in-progress bit as zero if
you read the status register too fast after setting the reset bit.

MFC r275660: Fix the watchdog timeout calculation to prevent wrap.

MFC r274941: The arm PJ4B cpu is armv7 architecture, not v6.

MFC r274641, r274644, r274822, r276049:

Allow i2c bus speed to be configured via hints, FDT data, and sysctl.

Implement bus speed setting for OMAP4, AM335x, and imx5/6.

Fix the i2c bus speed divisors for TI OMAP4 and AM335x to give the
advertised 100, 400, and 1000 KHz speeds.

PR: 195009

MFC r274412, r274413, r274414: Bugfixes for imx5/6 pinctrl driver.

MFC r274538, r274545, r274596, r274602, r274603, r274604, r274605, r274839:

When doing busdma sync ops for BUSDMA_COHERENT memory, there is no need
for cache maintenance operations, but ensure that all prior writes have
reached memory when doing a PREWRITE sync.

Do not do a cache invalidate on a PREREAD sync that is also a PREWRITE sync.

Do the cache invalidate sequence from the outermost to innermost, required
for correct operation.

Correct the sequence of busdma sync ops involved with PRE/POSTREAD syncs.

When doing a PREREAD sync of an mbuf-type dma buffer, do a writeback of
the first cacheline if the buffer start address is not on a cacheline
boundary.

MFC 275564:

Use the unified syntax when generating assembly for clang. The clang 3.5
integrated assembler only accepts it.

Sponsored by: ABT Systems Ltd

MFC 275378:

Pull in the NetBSD global offset table handling code. Clang 3.5 creates
relocations the linker complains about.

Obtained from: NetBSD

Clean up our ARM assembly:

MFC 275256:

Switch to the ARM unified assembly language as the clang integrated as only
supports it. Binutils supports it when the ".syntax unified" directive
is set.

Sponsored by: ABT Systems Ltd

MFC 275264:

Update _ENTRY to use _EENTRY to reduce the common code.

MFC 275321:

Remove extra labels, ENTRY_NP already provides them.

Sponsored by: ABT Systems Ltd

MFC 275322:

Correctly a few incorrect uses of ENTRY/EENTRY and END/EEND

Sponsored by: ABT Systems Ltd

MFC 275416:

Fix the name of the coprocessor to include the "p" prefix, the clang
integrated assembler expects this.

Sponsored by: ABT Systems Ltd

MFC 275418:

Switch to unified syntax so these can be built with clang 3.5.

Sponsored by: ABT Systems Ltd

MFC 275519:

Add missing END macros to some of the xscale functions.

Sponsored by: ABT Systems Ltd

MFC 275520:

Use the unified syntax in a few more assembly files

Sponsored by: ABT Systems Ltd

MFC 275521:

Set the alignment to 4-bytes after a string as clang 3.5 can switch to
thumb mode if this is incorrect.

Sponsored by: ABT Systems Ltd

MFC 275522:

Place the literal pool after a RET otherwise clang 3.5 tries to put it too
far away from a ldr psuedo instruction. With this clang will place the
literal value here where it's close enough to be loaded.

Sponsored by: ABT Systems Ltd

MFC 275523:

Switch to an armv6k cpu, without this clang 3.5 complains "bx lr" is
unsupported as it needs a newer cpu.

Sponsored by: ABT Systems Ltd

MFC 275524:

Switch to a .cpu directive. These will work when clang 3.5 is imported
where the .arch directive is a nop.

Sponsored by: ABT Systems Ltd

MFC 275207:

We don't use the hypervisor interrupt, make it optional in the device tree.

Submitted by: Julien Grall <julien.grall AT linaro.org>

MFC 275208:

Some device tree configurations place the generic timer under the root
of the tree and not under simplebus. Update the driver to handle this.

Submitted by: Julien Grall <julien.grall AT linaro.org>

MFC r275376:

Allow multiple devices to mmap. It's impossible to prevent this with
checks on the open/close functions.

Merge the fueword(9) and casueword(9). In particular,

MFC r273783:
Add fueword(9) and casueword(9) functions.
MFC note: ia64 is handled like arm, with NO_FUEWORD define.

MFC r273784:
Replace some calls to fuword() by fueword() with proper error checking.

MFC r273785:
Convert kern_umtx.c to use fueword() and casueword().
MFC note: the sys__umtx_lock and sys__umtx_unlock syscalls are not
converted, they are removed from HEAD, and not used. The do_sem2*()
family is not yet merged to stable/10, corresponding chunk will be
merged after do_sem2* are committed.

MFC r273788 (by jkim):
Actually install casuword(9) to fix build.

MFC r273911:
Add type qualifier volatile to the base (userspace) address argument
of fuword(9) and suword(9).

MFC r273703:

Remove the ARM_DEVICE_MULTIPASS option and make its effect be the default.

MFC r273288:

Allow the armv6 kernel to be build with PHYSADDR undefined. The kernel
will now find the virtual to physical mapping for libkvm to use at
runtime. This makes PHYSADDR redundant, however keep it around to give
everyone a chance to update their libkvm.

MFC r273284:

Allow libkvm to get the kernel va to pa delta without the need for
physaddr. This should allow for a kernel where PHYSADDR and KERNPHYSADDR
are both undefined.

For now libkvm will use the old method of reading physaddr and kernaddr
to allow it to work with old kernels. This could be removed in the future
when enough time has passed.

MFC r269956:

From https://sourceware.org/ml/newlib/2014/msg00113.html
By Richard Earnshaw at ARM
>
>GCC has for a number of years provides a set of pre-defined macros for
>use with determining the ISA and features of the target during
>pre-processing. However, the design was always somewhat cumbersome in
>that each new architecture revision created a new define and then
>removed the previous one. This meant that it was necessary to keep
>updating the support code simply to recognise a new architecture being
>added.
>
>The ACLE specification (ARM C Language Extentions)
>(http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.set.swdev/index.html)
>provides a much more suitable interface and GCC has supported this
>since gcc-4.8.
>
>This patch makes use of the ACLE pre-defines to map to the internal
>feature definitions. To support older versions of GCC a compatibility
>header is provided that maps the traditional pre-defines onto the new
>ACLE ones.

Stop using __FreeBSD_ARCH_armv6__ and switch to __ARM_ARCH >= 6 in the
couple of places in tree. clang already implements ACLE. Add a define
that says we implement version 1.1, even though the implementation
isn't quite complete.

MFC r263710, r273377, r273378, r273423 and r273455:

- De-vnet hash sizes and hash masks.
- Fix multiple issues related to arguments passed to SYSCTL macros.

Sponsored by: Mellanox Technologies

MFC: r266336, r270230 and r273263

r266336:
Allow us to compile the Ti iic driver for both OMAP4 and AM335x.

r270230:
Rewrite of ti_i2c based on gonzo's patch, fix the following bugs/problems:

. interrupt storm detected on "intr70:"; throttling interrupt source;

. Added access serialization on iicbus_transfer(), previously there was
no such protection and a new transfer could easily confuse the
controller;

. Add error checkings (i.e. stop the transfer when a error is detected
and do _not_ overwrite the previous error);

. On command done interrupt do not assume that the transfer was finished
sucessfully as we will receive the command done interrupt even after
errors;

. Simplify the FIFO handling;

. Reset the FIFO between the transfers as the FIFO may contain data from
the last (failed) transfer;

. Fix the iicbus speed for AM335x, which in turn will make better use of
the I2C noise filter (set to one internal clock cycle);

. Move the read and write handler to ithread instead of notifying the
requesting thread with wakeup(9);

. Fix the comments based on OMAP4 TRM.

The above changes allows me to read the EDID from my HDMI monitor on BBB
with gonzo's patches to support TDA19988 (which does 128 bytes reads) and
repeatedly scan the iicbus (with a modified i2c(8)) without lock up the bus.

r273263:
Fix the chan address for mtx_sleep() on bus wait. Without this fix the
threads waiting for the bus would never wake.

MFC r273590: Accept documented compatible string for PL310 cache controller/

MFC r273561:

Install a temporary workaround to avoid problems in fdt data with linux's
workaround for an imx6 chip erratum by using gpio1_6 as an interrupt.

MFC r273281:
Style changes as pointed out by stas@.

MFC r273353, r273514:

Attach the imx6 CCM driver during BUS_PASS_CPU.

Unconditionally enable the clocks for all imx6 devices that we have drivers
for, or that are required to run the chip (such as busses).

MFC r273352: Ask for the fastest available clock for the GTP timecounter.

MFC r273283:

Attach this driver during BUS_PASS_BUS and move the cpu init code to a
bus_new_pass() handler so it doesn't happen until BUS_PASS_CPU. This allows
the anatop driver to outbid the generic simplebus driver (which the FDT
data describes as compatible).

MFC r272333: Honor exclusion flags when building the memory lists.

MFC r271906:

Make the ARM MPCore Timer driver work with published standard FDT bindings.

MFC r271595, r271601, r271607, r271630:

Add compat strings for all the flavors of GIC this driver should support.
Also allow the driver to attach to ofwbus as well as simplebus, some FDT
data puts the root interrupt controller on the root bus.

Add a common routine for parsing FDT data describing an ARM GIC interrupt.

Use gic_decode_fdt() rather than a local routine to parse fdt interrupt
properties. Move fdt_pic_table and fdt_fixup_table into imx6_machdep.c,
which means imx6 doesn't need imx_common.c anymore.

The private peripheral interrupts start at offset 16, not 0. Also, use
names rather than inline mystery constants for these offsets.

MFC r271594:

Fix an undefined variable that was accidentally not causing an error.

MFC r271550, r271591:

Replace the imx5 and imx6 iomux drivers with a single common driver that
uses the new fdt_pinctrl interface.

MFC r271310:

Rename new to newval in inline asm code, to avoid clashes with C++ new.

MFC r271097, r271100, r271101, r271102, r271124:

- Add a basic iomux driver for imx6.
- Implement the same public interface in imx51 and imx6 iomux
- The iomux driver is no longer optional, remove it from kernel configs.
- Implement the imx_iomux_get/set_gpr() interface for imx6.
- Stop setting the iomux device status to disabled, now that we have a driver.

MFC r268973, r268977: Rename i.MX I2C driver file, enable it on imx6.

MFC r268834, r268835:

o Enable GPIO device driver for i.MX6.
It was originally written for i.MX5 and compatible with newer chip.
o Extend device tree information
o style(9) fixes
o Rename gpio driver file.

MFC r271055, r271084, r271094:

Add a function to get the frequency of the AHB bus. Another stopgap
function until we have full clock support for imx6.

The imx5x and imx6 chips have an onboard IOMUX device which also contains a
few "general purpose registers" whose values control chip behavior in ways
that have nothing to do with IO pin mux control. Define a simple API that
other soc-specific code can use to read and write the registers, and provide
the imx51 implementation of them.

Fix a typo.

MFC r270955,r270956: make the imx6 octop and anatop drivers early attachers.

MFC r270945:

Rename OF_xref_phandle() to OF_node_from_xref() and add a new function
that provides the inverse translation, OF_xref_from_node().

MFC r270025:

Implement the FDT static pinctl/pinmux spec for Atmel.

MFC r257200, r259121, r261410, r265853:

- Remove #include <machine/frame.h>.
- Add gpio parse routines according to sys/boot/fdt/dts/bindings-gpio.txt.
- Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.
- Rename platform_gpio_init to be SoC specific, and make it static as it's
only called from this file.

This is mostly catching up on some old MFCs that were done before this file
existed in the 10 branch.

MFC r268633, r271046:

Fixes and enhancements for the if_cgem driver...

- miibus fixes as suggested by Yonghyeon Pyun.
- enable VLAN MTU support.
- fix a few WITNESS complaints in cgem_attach().
- have cgem_attach() properly init the ifnet struct before calling
mii_attach() to fix panic when using e1000phy.
- fix ethernet address changing.
- fix transmit queue overflow handling.
- tweak receive queue handling to reduce receive overflows.
- bring out MAC statistic counters to sysctls.
- add e1000phy to config file.
- implement receive hang work-around described in reference guide.
- change device name from if_cgem to cgem to be consistent with other
interfaces.

Fix the Zedboard/Zynq ethernet driver to handle media speed changes so
that it can connect to switches at speeds other than 1gb.

MFC r273261:
Remove an unused mutex.

MFC r273258:
Make the ti_mbox and ti_pruss drivers optional.

MFC r273257:
Add a driver for the TI watchdog.

The TI watchdog timer is present on BeagleBone's. Since 2014, U-Boot
has been booting the BeagleBone with the watchdog enabled. We need
to
disable it on boot to avoid a spurious reset.
The timer isn't exactly precise, but it will do as a watchdog. This
is also a reflection of the watchdog(9) API.

In the future, we could handle interrupts, but the watchdog(9) API
needs to be a bit smarter before that can happen.

MFC r270673:
Announce SCTP support in the kern.features sysctl variables.

MFC r270859:
Enable SCTP support. It runs perfectly fine on a Wandboard quad.

MFC r271204 with manual intervention:
Fix the handling of sysctl variables when used with VIMAGE.
While there do some cleanup of the code.

MFC r271209:
Fix a leak of an address, if the address is scheduled for removal
and the stack is torn down.
Thanks to Peter Bostroem and Jiayang Liu from Google for reporting the
issue.

MFC r271219:
Use SYSCTL_PROC instead of SYSCTL_VNET_PROC.
Suggested by: glebius@

MFC r271221:
Use union sctp_sockstore instead of struct sockaddr_storage. This
eliminates some warnings when building in userland.
Thanks to Patrick Laimbock for reporting this issue.
Remove also some unnecessary casts.
There should be no functional change.

MFC r271228:
Address another warnings reported by Patrick Laimbock when compiling
in userspace. While there, improve consistency.

MFC r271230:
Address warnings generated by the clang analyzer.

Approved by: re (kib)

Disable debugging-related options in all ARM kernel configs for stable-10.
This is a direct commit to stable-10. The following options are disabled
in all arm kernel configs:

DEADLKRES
DIAGNOSTIC
INVARIANTS
INVARIANTS_SUPPORT
WITNESS
WITNESS_SKIPSPIN
Approved by: re(gjb)

MFC r271050: Disable DIAGNOSTIC on low-end ARM platforms.

Approved by: re(gjb)

MFC r270882, r270930:

In ARM asm code, ensure that every ENTRY(foo) has a matching END(foo).
The EABI unwind info requires a .fnend for every .fnstart, and newer
binutils will complain about seeing two .fnstart in a row. This change
allows newer tools to compile our code.

Do not generate unwind info in asm functions if _STANDALONE is defined.
The .fnend op causes the assembler to emit RELOC references to unwind
support functions that don't exist in libstand.

Approved by: re(gjb)

MFC r270065:

Move the imx6 sysctl temperature info to hw.imx6 where all the other
soc-wide info lives. It was under dev.imx6_anatop.0.

Approved by: re(gjb)

MFC r270858, 270879:

Remove duplicated option FDT from individual Wandboard configs, leave
the one in the common IMX6 file that they all include.

Approved by: re(gjb)

MFC r270862, r270878: MMU fixes for kernel startup.

Fix the handling of MMU type in the AP entry code. The ARM_MMU_V6/V7
symbols are always #defined to 0 or 1, so use #if SYM not #if defined(SYM).
Also, it helps if you include the header file that defines the symbols.

The Marvell PJ4B cpu family is armv7, not armv6.

Approved by: re(gjb)

MFC: r270885, r270948

- Nuke unused sdhci_softc.
- Static'ize sdhci_debug local to sdhci.c.
- Const'ify PCI device description strings.
- Nuke redundant resource ID members from sdhci_pci_softc.
- Nuke unused hw.sdhci_pci.debug tunable.
- Add support for using MSI instead of INTx, controllable via the tunable
hw.sdhci.enable_msi (defaulting to on) and tested with a RICOH R5CE823 SD
controller.
- Use NULL instead of 0 for pointers.

Fix a leak of the wired pages when unwiring of the PROT_NONE-mapped
wired region. Rework the handling of unwire to do the it in batch,
both at pmap and object level.

All commits below are by alc.

MFC r268327:
Introduce pmap_unwire().

MFC r268591:
Implement pmap_unwire() for powerpc.

MFC r268776:
Implement pmap_unwire() for arm.

MFC r268806:
pmap_unwire(9) man page.

MFC r269134:
When unwiring a region of an address space, do not assume that the
underlying physical pages are mapped by the pmap. This fixes a leak
of the wired pages on the unwiring of the region mapped with no access
allowed.

MFC r269339:
In the implementation of the new function pmap_unwire(), the call to
MOEA64_PVO_TO_PTE() must be performed before any changes are made to the
PVO. Otherwise, MOEA64_PVO_TO_PTE() will panic.

MFC r269365:
Correct a long-standing problem in moea{,64}_pvo_enter() that was revealed
by the combination of r268591 and r269134: When we attempt to add the
wired attribute to an existing mapping, moea{,64}_pvo_enter() do nothing.
(They only set the wired attribute on newly created mappings.)

MFC r269433:
Handle wiring failures in vm_map_wire() with the new functions
pmap_unwire() and vm_object_unwire().
Retire vm_fault_{un,}wire(), since they are no longer used.

MFC r269438:
Rewrite a loop in vm_map_wire() so that gcc doesn't think that the variable
"rv" is uninitialized.

MFC r269485:
Retire pmap_change_wiring().

Reviewed by: alc

Merge the changes to pmap_enter(9) for sleep-less operation (requested
by flag). The ia64 pmap.c changes are direct commit, since ia64 is
removed on head.

MFC r269368 (by alc):
Retire PVO_EXECUTABLE.

MFC r269728:
Change pmap_enter(9) interface to take flags parameter and superpage
mapping size (currently unused).

MFC r269759 (by alc):
Update the text of a KASSERT() to reflect the changes in r269728.

MFC r269822 (by alc):
Change {_,}pmap_allocpte() so that they look for the flag
PMAP_ENTER_NOSLEEP instead of M_NOWAIT/M_WAITOK when deciding whether
to sleep on page table page allocation.

MFC r270151 (by alc):
Replace KASSERT that no PV list locks are held with a conditional
unlock.

Reviewed by: alc
Approved by: re (gjb)
Sponsored by: The FreeBSD Foundation

vt(4): Colors are indexed against a console palette, not a VGA palette

Rename vt_generate_vga_palette() to vt_generate_cons_palette() and
change it to build a palette where the color index is the same than in
terminal escape codes, not the VGA index. That's what TCHAR_CREATE()
uses and passes to vt(4).

The main differences between both orders are:
o Blue and red are swapped (1 <-> 4)
o Yellow and cyan are swapped (3 <-> 6)

The problem remained unnoticed, because the RGB bit indexes passed to
vt_generate_vga_palette() were reversed. This inversion was cancelled
by the colors inversions in the generated palette. For instance, red
(0xff0000) and blue (0x0000ff) have bytes in opposite order, but were
swapped in the palette. But after changing the value of blue (see last
paragraph), the modified color was in fact the red one.

While here, tune the palette to better match console colors and improve
the readability (especially the dark blue).

This is an MFC of r269783 and r269791.

MFC r267021:

FreeBSD, historically, has always used 8-bit addresses for i2c devices
(7-bit device address << 1), always leaving the room for the read/write
bit.

This commit convert ti_i2c and revert r259127 on bcm2835_bsc to make them
compatible with 8-bit addresses. Previous to this commit an i2c device
would have different addresses depending on the controller it was attached
to (by example, when compared to any iicbb(4) based i2c controller), which
was a pretty annoying behavior.

Also, update the PMIC i2c address on beaglebone* DTS files to match the
new address scheme.

Now the userland utilities need to do the correct slave address shifting
(but it is going to work with any i2c controller on the system).

Discussed with: ian

MFC r267834:

Clarify the expected usage of I2C 7-bit slave addresses on ioctl(2)
interface.

While here add the cross reference to iic(4) on iicbus(4).

CR: D210
Suggested by: jmg

MFC r266923:

Ignore IIC_ENOADDR from iicbus_reset() as it only means we have a
master-only controller.

This fixes the iic bus scan with i2c(8) (on supported controllers).

Tested with gpioiic(4).

MFC r267009:

Remove the unnecessary i2c slave address assignment.

The ti_i2c controller only works in the master mode and the i2c address
passed on iicbus_reset() is used to set the controller slave address when
operating as an i2c slave (which isn't currently supported).

When talking to a slave, the slave address is correctly provided to
ti_i2c_tranfer().

MFC r266960:

Configure the analog input 7 which, on BBB, is connected to the 3V3B rail
through a voltage divisor (R163 and R164 on page 4 of BBB schematic).

Add a note about this on ti_adc(4) man page. The ti_adc(4) man page will
first appear on 10.1-RELEASE.

Suggested by: Sulev-Madis Silber (ketas)
Manual page reviewed by: brueffer (D127)

MFC r266937:

Export two new settings for the AM335x PWM, the clock prescaler (clkdiv)
and the actual PWM frequency.

Enforce the maximum value for the period sysctl.

The frequency systcl now allows the direct setting of the PWM frequency
(it will try to find the better clkdiv and period for a given frequency,
i.e. the ones that will give the better PWM resolution).

This allows the use lower frequencies on the PWM. Without changing the
clock prescaler the minimum PWM frequency was 1.52kHz.

PWM frequencies checked with an osciloscope.

PWM output tested with some R/C servos at 50Hz.

MFC r269646: Use a SYSINIT to init the array of interrupt names on arm.

MFC r269607, r269698:

Cache the imx6 SoC type in a static var so that it only has to be figured
out by sniffing hardware registers once.

Add a missing clock register definition.

MFC r269594, r269596, r269597, r269598, r269605, r269606:

Set ofwbus and simplebus to attach during BUS_PASS_BUS.

Define names that drivers can use to adjust their position relative to
other drivers within a BUS_PASS

Adjust ofwbus and simplebus to attach at BUS_PASS_ORDER_MIDDLE, so that
a platform can attach some other bus first if necessary.

Set the pl310 L2 cache driver to attach during the middle of BUS_PASS_CPU.

Attach arm generic interrupt and timer drivers in the middle of
BUS_PASS_INTERRUPT and BUS_PASS_TIMER, respectively.

Add an arm option, ARM_DEVICE_MULTIPASS, used to opt-in to multi-pass
device attachment on arm platforms. If this is defined, nexus attaches
early in BUS_PASS_BUS, and other busses and devices attach later, in the
pass number they are set up for. Without it defined, nexus attaches in
BUS_PASS_DEFAULT and thus so does everything else, which is status quo.

MFC r269403, r269405, r269410, r269414:

Add 64-bit atomic ops for armv6, and also for armv4 only in kernel code.
Use the new ops in the cddl code (and avoid defining functions with the
same names locally).

MFC r269393, r269394, r269395:

Fix parsing of arch extensions in binutils/gas.
Use ".arch_extension sec" when compiling ARM TI code that uses the
security extensions.

MFC r269390: Fix unwind info in hand-written asm (avoid nested functions).

MFC r269206, r269207, r269208, r269209, r269210, r269211, r269212, r269213,
r269214, r269215, r269216, r269217, r269221:

busdma-v6 improvements, primarily:
- Allocate the temporary segments array per-map rather than per-tag.
- Avoid needlessly bouncing IO for mbufs and buffers allocated by
bus_dmamem_alloc() (in both situations we known they're allocated
on cacheline boundaries and don't need bouncing).
- Various minor reformatting and cleanups.

MFC r268993, r268893, r268994, plus partial r264070, r264082

Fix C++ exception handling for ARM EABI.

Just the part of r264070 that creates the FBSD_1.4 namespace in libc
is hand-applied, and then r264082 which creates the Versions.def entry
is MFC'd.

MFC r256691, r256748: casuword fixes

Use unsigned compare against KERNBASE addr.
Use atomic ops on armv6.

MFC r268401, r268495:

Pending interrupt status is cleared by writing to the ISR, not the data reg.

Use named constant rather than '0' to access the reset controller register.

MFC r266565, r266651:

Map device memory using PTE_DEVICE attributes, and also ensure that the
shared flag is set on normal-memory mappings made via pmap_kenter() for SMP.

The "shared flag" part of this change isn't obvious from the diff, here's
the deal... by using the array of preformatted page table entry templates
instead of constructing the PTE from scratch, we automatically get the
right attribute bits set for both caching and shared.

Fix whitespace glitches.

MFC r267213 (by alc):
Add a page size field to struct vm_page.

Approved by: alc

MFC r263749,267146:

>r267146 | imp | 2014-06-05 22:08:55 -0600 (Thu, 05 Jun 2014) | 4 lines
>Restore comments accidentally removed.

>r263749 | imp | 2014-03-25 16:08:31 -0600 (Tue, 25 Mar 2014) | 18 lines
>Rather than require a makeoptions DEBUG to get debug correct,
>add it in kern.mk, but only if we're using clang. While this
>option is supported by both clang and gcc, in the future there
>may be changes to clang which change the defaults that require
>a tweak to build our kernel such that other tools in our tree
>will work. Set a good example by forcing -gdwarf-2 only for
>clang builds, and only if the user hasn't specified another
>dwarf level already. Update UPDATING to reflect the changed
>state of affairs. This also keeps us from having to update
>all the ARM kernels to add this, and also keeps us from
>in the future having to update all the MIPS kernels and is
>one less place the user will have to know to do something
>special for clang and one less thing developers will need
>to do when moving an architecture to clang.

MFC 266621: Eliminte spurious interrupts caused by ARM weak memory ordering.

MFC r264096, r264097, r264099 r264100, r264101, r264102, r264119:

Fixes to the ti_sdhci and sdhci drivers (fix clock divisor calcs).

Use the ti_sdhci driver instead of ti_mmchs for Pandaboard.

MFC 258287: Implement pmap_align_superpage().

MFC 257231:

Make sure the PCB is aligned on 8 bytes, we may use ldrd/strd to access it,
which may have strong alignment requirements.

MFC 257189:

Fix an itt instruction. We need to execute both the mov and b instructions
when building for Thumb.

MFC 256942, 256943:

- Fix a typo.
- Use bus_dmamap_unload(), it is not optional.
- The new allocator won't return coherent memory for any size > PAGE_SIZE,
so don't assume we have coherent memory, and explicitely use
bus_dmamap_sync().

MFC 256873: Make watchdog function conform watchdog(9):

MFC 256941: make sure the frame is indeed in the kernel memory.

MFC 265624, 265739: Fix interrupt parent property in dts, add SMP support.

MFC 265913, 265914:

Interrupts need to be disabled on entry to cpu_sleep() for ARM. Given
that and the need to be in a critical section when switching to idleclock
mode for event timers, use spinlock_enter()/exit() to achieve both needs.

Clean up some style nits.

MFC 265861, 265870:

Make the hardware memory and instruction barrier functions work on armv4
and armv5 as well.

Add cpu_l2cache_drain_writebuf(), use it to implement generic_bs_barrier().

MFC 265852: Map device memory using PTE_DEVICE rather than PTE_NOCACHE.

MFC 265694, 265705, 265784:

Move the mptramp code which is specific to the Marvell ArmadaXP SoC out of
the common locore.S file and into the mv/armadaxp directory.

Consolidate all the AP core startup stuff under a single #ifdef SMP block

Call idcache_inv_all from the AP core entry code before turning on the MMU.
Also, enable instruction and branch caches, which should be safe now that
they're properly initialized/invalidated first.

MFC 265440, 265441, 265444, 265445, 265446, 265447:

Move the pl310.enabled tunable to hw.pl310.enabled. Clean up a few minor
style(9) nits. Use DEVMETHOD_END.

Break out the code that figures out the L2 cache geometry to its own
routine, so that it can be called from multiple places in upcoming changes.

Call platform_pl310_init() before enabling the controller, and handle the
case where the controller is already enabled.

Add defines for the bits in the PL310 debug control register.

Add a public routine to set the L2 cache ram latencies. This can be
called by platform init routines to fine-tune cache performance.

Enable PL310 power-saving modes and tune the cache ram latencies for imx6.

MFC 265155, 265254:

Omit from the universe build all config files tagged with #NO_UNIVERSE.

Add FDT to the VYBRID kernel.

MFC 265207: Use arm_devmap_add_entry() to setup static device mapping.

MFC 265156: Remove WANDBOARD.common, it was replaced by IMX6.

MFC 265099, 265148, 265690:

Add SMP support for Zedboard.

Use edge-triggered interrupts rather than polling loops to avoid missing
transitions of the INIT_B line. Also, release the mutex during uiomove().

Convert the Zynq SoC support to the new routines for static device mapping.

MFC 265111: Make a declaration into a proper function prototype.

MFC 265035: Move duplicated code to print l2 config into the common code.

MFC 265023, 265024, 265036:

There is no difference between IPI_STOP and IPI_STOP_HARD on ARM, so
map them both to the same interrupt number like other arches do.

Flush and invalidate caches on each CPU as part of handling IPI_STOP.

Don't use multiprocessing-extensions instruction on processors that don't
support SMP.

MFC 264990, 264994, 265020, 265025:

Call cpu_icache_sync_range() rather than sync_all since we know the range
and flushing the entire icache is needlessly expensive.

Provide a proper armv7 implementation of icache_sync_all rather than
using armv7_idcache_wbinv_all, because wbinv_all doesn't broadcast the
operation to other cores. In elf_cpu_load_file() use icache_sync_all()
and explain why it's needed (and why other sync operations aren't).

Remove cpu_idcache_wbinv_all() from kdb_cpu_trap(), it's no longer needed.

Explain why wbinv_all is SMP-safe when dumping, and add a missing l2 cache
flush. (Either it was missing here, or it isn't needed in the minidump
case. Adding it here seems like the safer path to consistancy.)

MFC 264977:

Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead
define a few imx_ccm_foo() functions that are implemented by the imx51
or imx6 ccm code.

MFC 264702: Remove uncessary armv6 cache and TLB maintenance ops.

MFC 264251: Updates to i.MX53:

* Define support for the SDHCI driver, although it doesn't work yet
* Fix the memory mappings for IPU

MFC 264219: Move sys/arm/econa to sys/arm/cavium/cns11xx.

MFC 264203, 264204, 264206, 264218:

Tell VM we now have ARM platforms with physically discontiguous memory.

Define the full 1024M of ram on the imx51 and imx53 boards.

Use a more professional uart device description.

MFC 264180, 264181, 264182:

Follow files.imx51 and add vt support for imx53.

Add fsl,imx53 compatible string.

Need to include machine/fdt.h in vt_early_fb.c

MFC 264160: Remove code under PMAP_CACHE_VIVT, not compiled on armv6.

MFC 264150: Exynos: Correct the end address of the video frame buffer.

MFC 264183: Add a couple more required TLB flushes.

MFC 264137: Switch wandboards over to the common IMX6 kernel config, which
has SMP enabled. Also switch IMX6 to use SCHED_ULE.

MFC 264137: Switch wandboards over to the common IMX6 kernel config, which
has SMP enabled. Also switch IMX6 to use SCHED_ULE.

MFC 264128, 264129, 264130, 264135,

Fix TTB set operation for armv7. Perform sychronization (by "isb" barrier)
after TTB is set.

Fix TLB maintenance issues for armv6 and armv7.

- Add cpu_cpwait to comply with the convention.
- Add missing TLB invalidations, especially in pmap_kenter & pmap_kremove
with distinguishing between D and ID pages.
- Modify pmap init/bootstrap invalidations to ID, just to be safe.
- Fix TLB-inv and PTE_SYNC ordering.

Allocate per-cpu resources for doing pmap_zero_page() and pmap_copy_page().
This is performance enhancement rather than bugfix.

We don't support any ARM systems with an ISA bus and don't need a freelist
of memory to support ISA addressing limitations.

MFC 264052, 264057, 264065, 264094, 264103, 264120

Actually save the mpcore clock frequency retrieved from fdt data.

imx6..
- Don't call sdhci_init_slot() until after handling the FDT properties
related to detecting card presence.
- Flag several sysctl variables as tunables.
- Rework the cpu frequency management code for imx6 to add "operating
points" and min/max frequency controls.

generic timer...
- Setup both secure and non-secure timer IRQs.
We don't know our ARM security state, so one of them will operate.
- Don't set frequency, since it's unpossible in non-secure state.
Only rely on DTS clock-frequency value or get clock from timer.

MFC 264054, 264056

Switch imx6 to using the mpcore per-cpu event timers, but continue to use
the GPT timer, which is fixed-frequency, as a timecounter.

Change NO_EVENTTIMERS from an arm-specific to an MI option, so that it can
be used in MI code.

MFC 264019, 264041, 264048, 264049, 264050, 264051

Add support for event timers whose clock frequency can change while running.

Apparently all ARM configs build kern_et.c, but only a few of them also
build kern_clocksource.c, un-break the build by not referencing functions in
kern_clocksource if NO_EVENTTIMERS is defined.

Add variable-frequency support to the arm mpcore eventtimer driver.

mpcore_timer: Disable the timer and clear any pending bit, then setup the
new counter register values, then restart the timer. Also re-nest the parens
properly for casting the result of converting time and frequency to a count.

MFC 263910, 263913, 263914, 263933, 263934, 263935, 263936, 263981, 263982,

Add more flags for the fpexc register from the ARM1176JZF-S Manual

Initialise fpscr to a sane value when we create the pcb. This sets NaNs to
be the default NaN and for denormalised numbers to be flushed to zero.

VFP fixes/cleanups for ARM11:
* Save the required VFP registers on context switch. If the exception bit
is set we need to save and restore the FPINST register, and if the fp2v
bit is also set we need to save and restore FPINST2.
* Move saving and restoring the floating point control registers to C.
* Clear the fpexc exception and fp2v flags on a floating-point exception.
* Signal a SIGFPE if the fpexc exception flag is set on an undefined
instruction. This is how the ARM core signals to software there is a
floating-point exception.

Add Cortex-A15 cpu id revisions.

Exynos/Arndale...
- Merge SoC-common parts
- Enable iicbus device
- Directly call kmem_alloc_contig to allocate framebuffer memory
and pass VM_MEMATTR_UNCACHEABLE (no-cache, no-buffer).
This fixes screen refreshing problem when data is updated too slowly.
- Add support for keyboard used in Samsung Chromebook (ARM machine)
Support covers device drivers for:
- Interrupt Combiner
- gpio/pad, External Interrupts Controller (pad)
- I2C Interface
- Chrome Embedded Controller
- Chrome Keyboard
- Use new gpio dev class in EHCI driver
- Expand device tree information
- Release i2c bus on detach.

Adds the ADC driver for TI AM3xxx SoC family.

The ADC has a 12bit resolution and its raw output can be read via sysctl(8)
interface.

The driver allows the setup of ADC clock, samples average and open delay
(the number of clock cycles to wait before start the conversion).

The TSC_ADC module is set in the general purpose mode (no touchscreen
support).

Tested on Beaglebone-black.

Written based on AM335x TRM.

MFC 263631, 263637, 263664, 263676, 263679, 263698, 263711,

Implement __flt_rounds for ARMv6 hard-float. The fpscr register stores the
current rounding mode used by the VFP unit.

Simplify how we build MACHINE_ARCH. There are 3 options that may be set
however only arm, armeb, armv6, and soon armv6hf will be used.

Add the llvm/clang patch for r263619.

Reorder the pmap macros so "ARM_MMU_V6 + ARM_MMU_V7" is first. As they are
identical this allows us to build for both v6 and v7 together.

Add code for enabling second CPU core for A20 SoC.
Enable SMP on Cubieboard2.

Switch to freebsd.org emal address in copyright.

MFC 263250, 263251, 263424, 263425, 263426, 263427, 263430, 263431

Use the same cache terminology as the ARM docs in comments. No
functional changes.

Use armv7 TLB flush code, not arm11, for cortex-a processors.

Exynos/ Arndale...
- Disable debugging by default.
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add driver for Display Controller.
- Add support for Samsung Chromebook (ARM Cortex A15 machine).
- Rename mct and ehci drivers files to match common naming.

MFC 263301

In kernel config files, it is supposed to be 'options<space><tab>' not
'options<tab><tab>', per long standing (but recently not so strictly
enforced) convention.

MFC 263245: Make all the comments '# ' and align to same column.