imx6_machdep.c revision 294678
1/*- 2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include "opt_platform.h" 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/imx/imx6_machdep.c 294678 2016-01-24 19:34:05Z ian $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bus.h> 35#include <sys/reboot.h> 36 37#include <vm/vm.h> 38 39#include <machine/bus.h> 40#include <machine/devmap.h> 41#include <machine/intr.h> 42#include <machine/machdep.h> 43 44#include <arm/arm/mpcore_timervar.h> 45#include <arm/freescale/imx/imx6_anatopreg.h> 46#include <arm/freescale/imx/imx6_anatopvar.h> 47#include <arm/freescale/imx/imx_machdep.h> 48 49#include <dev/fdt/fdt_common.h> 50#include <dev/ofw/openfirm.h> 51 52struct fdt_fixup_entry fdt_fixup_table[] = { 53 { NULL, NULL } 54}; 55 56static uint32_t gpio1_node; 57 58/* 59 * Work around the linux workaround for imx6 erratum 006687, in which some 60 * ethernet interrupts don't go to the GPC and thus won't wake the system from 61 * Wait mode. We don't use Wait mode (which halts the GIC, leaving only GPC 62 * interrupts able to wake the system), so we don't experience the bug at all. 63 * The linux workaround is to reconfigure GPIO1_6 as the ENET interrupt by 64 * writing magic values to an undocumented IOMUX register, then letting the gpio 65 * interrupt driver notify the ethernet driver. We'll be able to do all that 66 * (even though we don't need to) once the INTRNG project is committed and the 67 * imx_gpio driver becomes an interrupt driver. Until then, this crazy little 68 * workaround watches for requests to map an interrupt 6 with the interrupt 69 * controller node referring to gpio1, and it substitutes the proper ffec 70 * interrupt number. 71 */ 72static int 73imx6_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, 74 int *trig, int *pol) 75{ 76 77 if (fdt32_to_cpu(intr[0]) == 6 && 78 OF_node_from_xref(iparent) == gpio1_node) { 79 *interrupt = 150; 80 *trig = INTR_TRIGGER_CONFORM; 81 *pol = INTR_POLARITY_CONFORM; 82 return (0); 83 } 84 return (gic_decode_fdt(iparent, intr, interrupt, trig, pol)); 85} 86 87fdt_pic_decode_t fdt_pic_table[] = { 88 &imx6_decode_fdt, 89 NULL 90}; 91 92vm_offset_t 93initarm_lastaddr(void) 94{ 95 96 return (arm_devmap_lastaddr()); 97} 98 99void 100initarm_early_init(void) 101{ 102 /* Inform the MPCore timer driver that its clock is variable. */ 103 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 104} 105 106void 107initarm_gpio_init(void) 108{ 109 110} 111 112void 113initarm_late_init(void) 114{ 115 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 116 117 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 118 119 /* Cache the gpio1 node handle for imx6_decode_fdt() workaround code. */ 120 gpio1_node = OF_node_from_xref( 121 OF_finddevice("/soc/aips-bus@02000000/gpio@0209c000")); 122} 123 124/* 125 * Set up static device mappings. 126 * 127 * This attempts to cover the most-used devices with 1MB section mappings, which 128 * is good for performance (uses fewer TLB entries for device access). 129 * 130 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 131 * L2 cache controller. Most of the 1MB range is unused reserved space. 132 * 133 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 134 * 135 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 136 * the memory map. When we get support for graphics it might make sense to 137 * static map some of that area. Be careful with other things in that area such 138 * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory. 139 */ 140int 141initarm_devmap_init(void) 142{ 143 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 144 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 145 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 146 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 147 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 148 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 149 150 arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 151 arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 152 arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 153 154 return (0); 155} 156 157void 158cpu_reset(void) 159{ 160 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 161 162 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 163} 164 165/* 166 * Determine what flavor of imx6 we're running on. 167 * 168 * This code is based on the way u-boot does it. Information found on the web 169 * indicates that Freescale themselves were the original source of this logic, 170 * including the strange check for number of CPUs in the SCU configuration 171 * register, which is apparently needed on some revisions of the SOLO. 172 * 173 * According to the documentation, there is such a thing as an i.MX6 Dual 174 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 175 * number or provided any logic to handle it in their detection code. 176 * 177 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 178 * documented in the chip reference manual. (SCU configuration is mentioned, 179 * but not mapped out in detail.) I think the bottom two bits of the scu config 180 * register may be ncpu-1. 181 * 182 * This hasn't been tested yet on a dual[-lite]. 183 * 184 * On a solo: 185 * digprog = 0x00610001 186 * hwsoc = 0x00000062 187 * scu config = 0x00000500 188 * On a quad: 189 * digprog = 0x00630002 190 * hwsoc = 0x00000063 191 * scu config = 0x00005503 192 */ 193u_int imx_soc_type() 194{ 195 uint32_t digprog, hwsoc; 196 uint32_t *pcr; 197 static u_int soctype; 198 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 199#define HWSOC_MX6SL 0x60 200#define HWSOC_MX6DL 0x61 201#define HWSOC_MX6SOLO 0x62 202#define HWSOC_MX6Q 0x63 203 204 if (soctype != 0) 205 return (soctype); 206 207 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 208 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 209 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 210 211 if (hwsoc != HWSOC_MX6SL) { 212 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 213 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 214 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 215 /*printf("digprog = 0x%08x\n", digprog);*/ 216 if (hwsoc == HWSOC_MX6DL) { 217 pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 218 if (pcr != NULL) { 219 /*printf("scu config = 0x%08x\n", *pcr);*/ 220 if ((*pcr & 0x03) == 0) { 221 hwsoc = HWSOC_MX6SOLO; 222 } 223 } 224 } 225 } 226 /* printf("hwsoc 0x%08x\n", hwsoc); */ 227 228 switch (hwsoc) { 229 case HWSOC_MX6SL: 230 soctype = IMXSOC_6SL; 231 break; 232 case HWSOC_MX6SOLO: 233 soctype = IMXSOC_6S; 234 break; 235 case HWSOC_MX6DL: 236 soctype = IMXSOC_6DL; 237 break; 238 case HWSOC_MX6Q : 239 soctype = IMXSOC_6Q; 240 break; 241 default: 242 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 243 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 244 soctype = IMXSOC_6Q; 245 break; 246 } 247 248 return (soctype); 249} 250 251/* 252 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 253 * option SOCDEV_PA=0x02000000 254 * option SOCDEV_VA=0x02000000 255 * option EARLY_PRINTF 256 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 257 * makes sense now, but if multiple SOCs do that it will make early_putc another 258 * duplicate symbol to be eliminated on the path to a generic kernel. 259 */ 260#if 0 261static void 262imx6_early_putc(int c) 263{ 264 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 265 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 266 const uint32_t UART_TXRDY = (1 << 3); 267 268 while ((*UART_STAT_REG & UART_TXRDY) == 0) 269 continue; 270 *UART_TX_REG = c; 271} 272early_putc_t *early_putc = imx6_early_putc; 273#endif 274 275