a10_gpio.c revision 266152 
1/*-
2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com>
3 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
4 * Copyright (c) 2012 Luiz Otavio O Souza.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 */
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: stable/10/sys/arm/allwinner/a10_gpio.c 266152 2014-05-15 16:11:06Z ian $");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bus.h>
35
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/rman.h>
39#include <sys/lock.h>
40#include <sys/mutex.h>
41#include <sys/gpio.h>
42
43#include <machine/bus.h>
44#include <machine/cpu.h>
45#include <machine/cpufunc.h>
46#include <machine/resource.h>
47#include <machine/fdt.h>
48#include <machine/intr.h>
49
50#include <dev/fdt/fdt_common.h>
51#include <dev/ofw/ofw_bus.h>
52#include <dev/ofw/ofw_bus_subr.h>
53
54#include "gpio_if.h"
55
56/*
57 * A10 have 9 banks of gpio.
58 * 32 pins per bank:
59 * PA0 - PA17 | PB0 - PB23 | PC0 - PC24
60 * PD0 - PD27 | PE0 - PE31 | PF0 - PF5
61 * PG0 - PG9 | PH0 - PH27 | PI0 - PI12
62 */
63
64#define	A10_GPIO_PINS		288
65#define	A10_GPIO_DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |	\
66    GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
67
68#define A10_GPIO_NONE		0
69#define A10_GPIO_PULLUP		1
70#define A10_GPIO_PULLDOWN	2
71
72#define A10_GPIO_INPUT		0
73#define A10_GPIO_OUTPUT		1
74
75struct a10_gpio_softc {
76	device_t		sc_dev;
77	struct mtx		sc_mtx;
78	struct resource *	sc_mem_res;
79	struct resource *	sc_irq_res;
80	bus_space_tag_t		sc_bst;
81	bus_space_handle_t	sc_bsh;
82	void *			sc_intrhand;
83	int			sc_gpio_npins;
84	struct gpio_pin		sc_gpio_pins[A10_GPIO_PINS];
85};
86
87#define	A10_GPIO_LOCK(_sc)		mtx_lock(&_sc->sc_mtx)
88#define	A10_GPIO_UNLOCK(_sc)		mtx_unlock(&_sc->sc_mtx)
89#define	A10_GPIO_LOCK_ASSERT(_sc)	mtx_assert(&_sc->sc_mtx, MA_OWNED)
90
91#define	A10_GPIO_GP_CFG(_bank, _pin)	0x00 + ((_bank) * 0x24) + ((_pin)<<2)
92#define	A10_GPIO_GP_DAT(_bank)		0x10 + ((_bank) * 0x24)
93#define	A10_GPIO_GP_DRV(_bank, _pin)	0x14 + ((_bank) * 0x24) + ((_pin)<<2)
94#define	A10_GPIO_GP_PUL(_bank, _pin)	0x1c + ((_bank) * 0x24) + ((_pin)<<2)
95
96#define	A10_GPIO_GP_INT_CFG0		0x200
97#define	A10_GPIO_GP_INT_CFG1		0x204
98#define	A10_GPIO_GP_INT_CFG2		0x208
99#define	A10_GPIO_GP_INT_CFG3		0x20c
100
101#define	A10_GPIO_GP_INT_CTL		0x210
102#define	A10_GPIO_GP_INT_STA		0x214
103#define	A10_GPIO_GP_INT_DEB		0x218
104
105#define	A10_GPIO_WRITE(_sc, _off, _val)		\
106    bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
107#define	A10_GPIO_READ(_sc, _off)		\
108    bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
109
110static uint32_t
111a10_gpio_get_function(struct a10_gpio_softc *sc, uint32_t pin)
112{
113	uint32_t bank, func, offset;
114
115	bank = pin / 32;
116	pin = pin - 32 * bank;
117	func = pin >> 3;
118	offset = ((pin & 0x07) << 2);
119
120	A10_GPIO_LOCK(sc);
121	func = (A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, func)) >> offset) & 7;
122	A10_GPIO_UNLOCK(sc);
123
124	return (func);
125}
126
127static uint32_t
128a10_gpio_func_flag(uint32_t nfunc)
129{
130
131	switch (nfunc) {
132	case A10_GPIO_INPUT:
133		return (GPIO_PIN_INPUT);
134	case A10_GPIO_OUTPUT:
135		return (GPIO_PIN_OUTPUT);
136	}
137	return (0);
138}
139
140static void
141a10_gpio_set_function(struct a10_gpio_softc *sc, uint32_t pin, uint32_t f)
142{
143	uint32_t bank, func, data, offset;
144
145	/* Must be called with lock held. */
146	A10_GPIO_LOCK_ASSERT(sc);
147
148	bank = pin / 32;
149	pin = pin - 32 * bank;
150	func = pin >> 3;
151	offset = ((pin & 0x07) << 2);
152
153	data = A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, func));
154	data &= ~(7 << offset);
155	data |= (f << offset);
156	A10_GPIO_WRITE(sc, A10_GPIO_GP_CFG(bank, func), data);
157}
158
159static void
160a10_gpio_set_pud(struct a10_gpio_softc *sc, uint32_t pin, uint32_t state)
161{
162	uint32_t bank, offset, pull, val;
163
164	/* Must be called with lock held. */
165	A10_GPIO_LOCK_ASSERT(sc);
166
167	bank = pin / 32;
168	pin = pin - 32 * bank;
169	pull = pin >> 4;
170	offset = ((pin & 0x0f) << 1);
171
172	val = A10_GPIO_READ(sc, A10_GPIO_GP_PUL(bank, pull));
173	val &= ~(0x03 << offset);
174	val |= (state << offset);
175	A10_GPIO_WRITE(sc, A10_GPIO_GP_PUL(bank, pull), val);
176}
177
178static void
179a10_gpio_pin_configure(struct a10_gpio_softc *sc, struct gpio_pin *pin,
180    unsigned int flags)
181{
182
183	A10_GPIO_LOCK(sc);
184
185	/*
186	 * Manage input/output.
187	 */
188	if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
189		pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
190		if (flags & GPIO_PIN_OUTPUT) {
191			pin->gp_flags |= GPIO_PIN_OUTPUT;
192			a10_gpio_set_function(sc, pin->gp_pin,
193			    A10_GPIO_OUTPUT);
194		} else {
195			pin->gp_flags |= GPIO_PIN_INPUT;
196			a10_gpio_set_function(sc, pin->gp_pin,
197			    A10_GPIO_INPUT);
198		}
199	}
200
201	/* Manage Pull-up/pull-down. */
202	pin->gp_flags &= ~(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN);
203	if (flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) {
204		if (flags & GPIO_PIN_PULLUP) {
205			pin->gp_flags |= GPIO_PIN_PULLUP;
206			a10_gpio_set_pud(sc, pin->gp_pin, A10_GPIO_PULLUP);
207		} else {
208			pin->gp_flags |= GPIO_PIN_PULLDOWN;
209			a10_gpio_set_pud(sc, pin->gp_pin, A10_GPIO_PULLDOWN);
210		}
211	} else
212		a10_gpio_set_pud(sc, pin->gp_pin, A10_GPIO_NONE);
213
214	A10_GPIO_UNLOCK(sc);
215}
216
217static int
218a10_gpio_pin_max(device_t dev, int *maxpin)
219{
220
221	*maxpin = A10_GPIO_PINS - 1;
222	return (0);
223}
224
225static int
226a10_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
227{
228	struct a10_gpio_softc *sc = device_get_softc(dev);
229	int i;
230
231	for (i = 0; i < sc->sc_gpio_npins; i++) {
232		if (sc->sc_gpio_pins[i].gp_pin == pin)
233			break;
234	}
235
236	if (i >= sc->sc_gpio_npins)
237		return (EINVAL);
238
239	A10_GPIO_LOCK(sc);
240	*caps = sc->sc_gpio_pins[i].gp_caps;
241	A10_GPIO_UNLOCK(sc);
242
243	return (0);
244}
245
246static int
247a10_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
248{
249	struct a10_gpio_softc *sc = device_get_softc(dev);
250	int i;
251
252	for (i = 0; i < sc->sc_gpio_npins; i++) {
253		if (sc->sc_gpio_pins[i].gp_pin == pin)
254			break;
255	}
256
257	if (i >= sc->sc_gpio_npins)
258		return (EINVAL);
259
260	A10_GPIO_LOCK(sc);
261	*flags = sc->sc_gpio_pins[i].gp_flags;
262	A10_GPIO_UNLOCK(sc);
263
264	return (0);
265}
266
267static int
268a10_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
269{
270	struct a10_gpio_softc *sc = device_get_softc(dev);
271	int i;
272
273	for (i = 0; i < sc->sc_gpio_npins; i++) {
274		if (sc->sc_gpio_pins[i].gp_pin == pin)
275			break;
276	}
277
278	if (i >= sc->sc_gpio_npins)
279		return (EINVAL);
280
281	A10_GPIO_LOCK(sc);
282	memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
283	A10_GPIO_UNLOCK(sc);
284
285	return (0);
286}
287
288static int
289a10_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
290{
291	struct a10_gpio_softc *sc = device_get_softc(dev);
292	int i;
293
294	for (i = 0; i < sc->sc_gpio_npins; i++) {
295		if (sc->sc_gpio_pins[i].gp_pin == pin)
296			break;
297	}
298
299	if (i >= sc->sc_gpio_npins)
300		return (EINVAL);
301
302	/* Check for unwanted flags. */
303	if ((flags & sc->sc_gpio_pins[i].gp_caps) != flags)
304		return (EINVAL);
305
306	/* Can't mix input/output together. */
307	if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
308	    (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
309		return (EINVAL);
310
311	/* Can't mix pull-up/pull-down together. */
312	if ((flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) ==
313	    (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN))
314		return (EINVAL);
315
316	a10_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
317
318	return (0);
319}
320
321static int
322a10_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
323{
324	struct a10_gpio_softc *sc = device_get_softc(dev);
325	uint32_t bank, offset, data;
326	int i;
327
328	for (i = 0; i < sc->sc_gpio_npins; i++) {
329		if (sc->sc_gpio_pins[i].gp_pin == pin)
330			break;
331	}
332
333	if (i >= sc->sc_gpio_npins)
334		return (EINVAL);
335
336	bank = pin / 32;
337	pin = pin - 32 * bank;
338	offset = pin & 0x1f;
339
340	A10_GPIO_LOCK(sc);
341	data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
342	if (value)
343		data |= (1 << offset);
344	else
345		data &= ~(1 << offset);
346	A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data);
347	A10_GPIO_UNLOCK(sc);
348
349	return (0);
350}
351
352static int
353a10_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
354{
355	struct a10_gpio_softc *sc = device_get_softc(dev);
356	uint32_t bank, offset, reg_data;
357	int i;
358
359	for (i = 0; i < sc->sc_gpio_npins; i++) {
360		if (sc->sc_gpio_pins[i].gp_pin == pin)
361			break;
362	}
363
364	if (i >= sc->sc_gpio_npins)
365		return (EINVAL);
366
367	bank = pin / 32;
368	pin = pin - 32 * bank;
369	offset = pin & 0x1f;
370
371	A10_GPIO_LOCK(sc);
372	reg_data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
373	A10_GPIO_UNLOCK(sc);
374	*val = (reg_data & (1 << offset)) ? 1 : 0;
375
376	return (0);
377}
378
379static int
380a10_gpio_pin_toggle(device_t dev, uint32_t pin)
381{
382	struct a10_gpio_softc *sc = device_get_softc(dev);
383	uint32_t bank, data, offset;
384	int i;
385
386	for (i = 0; i < sc->sc_gpio_npins; i++) {
387		if (sc->sc_gpio_pins[i].gp_pin == pin)
388			break;
389	}
390
391	if (i >= sc->sc_gpio_npins)
392		return (EINVAL);
393
394	bank = pin / 32;
395	pin = pin - 32 * bank;
396	offset = pin & 0x1f;
397
398	A10_GPIO_LOCK(sc);
399	data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
400	if (data & (1 << offset))
401		data &= ~(1 << offset);
402	else
403		data |= (1 << offset);
404	A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data);
405	A10_GPIO_UNLOCK(sc);
406
407	return (0);
408}
409
410static int
411a10_gpio_probe(device_t dev)
412{
413
414	if (!ofw_bus_status_okay(dev))
415		return (ENXIO);
416
417	if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-gpio"))
418		return (ENXIO);
419
420	device_set_desc(dev, "Allwinner GPIO controller");
421	return (BUS_PROBE_DEFAULT);
422}
423
424static int
425a10_gpio_attach(device_t dev)
426{
427	struct a10_gpio_softc *sc = device_get_softc(dev);
428	uint32_t func;
429	int i, rid;
430	phandle_t gpio;
431
432	sc->sc_dev = dev;
433
434	mtx_init(&sc->sc_mtx, "a10 gpio", "gpio", MTX_DEF);
435
436	rid = 0;
437	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
438	    RF_ACTIVE);
439	if (!sc->sc_mem_res) {
440		device_printf(dev, "cannot allocate memory window\n");
441		return (ENXIO);
442	}
443
444	sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
445	sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
446
447	rid = 0;
448	sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
449	    RF_ACTIVE);
450	if (!sc->sc_irq_res) {
451		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
452		device_printf(dev, "cannot allocate interrupt\n");
453		return (ENXIO);
454	}
455
456	/* Find our node. */
457	gpio = ofw_bus_get_node(sc->sc_dev);
458
459	if (!OF_hasprop(gpio, "gpio-controller"))
460		/* Node is not a GPIO controller. */
461		goto fail;
462
463	/* Initialize the software controlled pins. */
464	for (i = 0; i < A10_GPIO_PINS; i++) {
465		snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
466		    "pin %d", i);
467		func = a10_gpio_get_function(sc, i);
468		sc->sc_gpio_pins[i].gp_pin = i;
469		sc->sc_gpio_pins[i].gp_caps = A10_GPIO_DEFAULT_CAPS;
470		sc->sc_gpio_pins[i].gp_flags = a10_gpio_func_flag(func);
471	}
472	sc->sc_gpio_npins = i;
473
474	device_add_child(dev, "gpioc", device_get_unit(dev));
475	device_add_child(dev, "gpiobus", device_get_unit(dev));
476	return (bus_generic_attach(dev));
477
478fail:
479	if (sc->sc_irq_res)
480		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
481	if (sc->sc_mem_res)
482		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
483	return (ENXIO);
484}
485
486static int
487a10_gpio_detach(device_t dev)
488{
489
490	return (EBUSY);
491}
492
493static device_method_t a10_gpio_methods[] = {
494	/* Device interface */
495	DEVMETHOD(device_probe,		a10_gpio_probe),
496	DEVMETHOD(device_attach,	a10_gpio_attach),
497	DEVMETHOD(device_detach,	a10_gpio_detach),
498
499	/* GPIO protocol */
500	DEVMETHOD(gpio_pin_max,		a10_gpio_pin_max),
501	DEVMETHOD(gpio_pin_getname,	a10_gpio_pin_getname),
502	DEVMETHOD(gpio_pin_getflags,	a10_gpio_pin_getflags),
503	DEVMETHOD(gpio_pin_getcaps,	a10_gpio_pin_getcaps),
504	DEVMETHOD(gpio_pin_setflags,	a10_gpio_pin_setflags),
505	DEVMETHOD(gpio_pin_get,		a10_gpio_pin_get),
506	DEVMETHOD(gpio_pin_set,		a10_gpio_pin_set),
507	DEVMETHOD(gpio_pin_toggle,	a10_gpio_pin_toggle),
508
509	DEVMETHOD_END
510};
511
512static devclass_t a10_gpio_devclass;
513
514static driver_t a10_gpio_driver = {
515	"gpio",
516	a10_gpio_methods,
517	sizeof(struct a10_gpio_softc),
518};
519
520DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0);
521