imx6_machdep.c revision 273672 
1/*-
2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include "opt_platform.h"
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/imx/imx6_machdep.c 273672 2014-10-26 03:52:45Z ian $");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bus.h>
35#include <sys/reboot.h>
36
37#include <vm/vm.h>
38
39#include <machine/bus.h>
40#include <machine/devmap.h>
41#include <machine/intr.h>
42#include <machine/machdep.h>
43
44#include <arm/arm/mpcore_timervar.h>
45#include <arm/freescale/imx/imx6_anatopreg.h>
46#include <arm/freescale/imx/imx6_anatopvar.h>
47#include <arm/freescale/imx/imx_machdep.h>
48
49#include <dev/fdt/fdt_common.h>
50#include <dev/ofw/openfirm.h>
51
52struct fdt_fixup_entry fdt_fixup_table[] = {
53	{ NULL, NULL }
54};
55
56fdt_pic_decode_t fdt_pic_table[] = {
57	&gic_decode_fdt,
58	NULL
59};
60
61vm_offset_t
62initarm_lastaddr(void)
63{
64
65	return (arm_devmap_lastaddr());
66}
67
68void
69initarm_early_init(void)
70{
71
72	/* Inform the MPCore timer driver that its clock is variable. */
73	arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
74}
75
76void
77initarm_gpio_init(void)
78{
79
80}
81
82void
83initarm_late_init(void)
84{
85
86}
87
88/*
89 * Set up static device mappings.
90 *
91 * This attempts to cover the most-used devices with 1MB section mappings, which
92 * is good for performance (uses fewer TLB entries for device access).
93 *
94 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
95 * L2 cache controller.  Most of the 1MB range is unused reserved space.
96 *
97 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
98 *
99 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
100 * the memory map.  When we get support for graphics it might make sense to
101 * static map some of that area.  Be careful with other things in that area such
102 * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
103 */
104int
105initarm_devmap_init(void)
106{
107	const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
108	const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
109	const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
110	const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
111	const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
112	const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
113
114	arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
115	arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
116	arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
117
118	return (0);
119}
120
121void
122cpu_reset(void)
123{
124	const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
125
126	imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
127}
128
129/*
130 * Determine what flavor of imx6 we're running on.
131 *
132 * This code is based on the way u-boot does it.  Information found on the web
133 * indicates that Freescale themselves were the original source of this logic,
134 * including the strange check for number of CPUs in the SCU configuration
135 * register, which is apparently needed on some revisions of the SOLO.
136 *
137 * According to the documentation, there is such a thing as an i.MX6 Dual
138 * (non-lite flavor).  However, Freescale doesn't seem to have assigned it a
139 * number or provided any logic to handle it in their detection code.
140 *
141 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
142 * documented in the chip reference manual.  (SCU configuration is mentioned,
143 * but not mapped out in detail.)  I think the bottom two bits of the scu config
144 * register may be ncpu-1.
145 *
146 * This hasn't been tested yet on a dual[-lite].
147 *
148 * On a solo:
149 *      digprog    = 0x00610001
150 *      hwsoc      = 0x00000062
151 *      scu config = 0x00000500
152 * On a quad:
153 *      digprog    = 0x00630002
154 *      hwsoc      = 0x00000063
155 *      scu config = 0x00005503
156 */
157u_int imx_soc_type()
158{
159	uint32_t digprog, hwsoc;
160	uint32_t *pcr;
161	static u_int soctype;
162	const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
163#define	HWSOC_MX6SL	0x60
164#define	HWSOC_MX6DL	0x61
165#define	HWSOC_MX6SOLO	0x62
166#define	HWSOC_MX6Q	0x63
167
168	if (soctype != 0)
169		return (soctype);
170
171	digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
172	hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
173	    IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
174
175	if (hwsoc != HWSOC_MX6SL) {
176		digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
177		hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
178		    IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
179		/*printf("digprog = 0x%08x\n", digprog);*/
180		if (hwsoc == HWSOC_MX6DL) {
181			pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
182			if (pcr != NULL) {
183				/*printf("scu config = 0x%08x\n", *pcr);*/
184				if ((*pcr & 0x03) == 0) {
185					hwsoc = HWSOC_MX6SOLO;
186				}
187			}
188		}
189	}
190	/* printf("hwsoc 0x%08x\n", hwsoc); */
191
192	switch (hwsoc) {
193	case HWSOC_MX6SL:
194		soctype = IMXSOC_6SL;
195		break;
196	case HWSOC_MX6SOLO:
197		soctype = IMXSOC_6S;
198		break;
199	case HWSOC_MX6DL:
200		soctype = IMXSOC_6DL;
201		break;
202	case HWSOC_MX6Q :
203		soctype = IMXSOC_6Q;
204		break;
205	default:
206		printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
207		    "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
208		soctype = IMXSOC_6Q;
209		break;
210	}
211
212	return (soctype);
213}
214
215/*
216 * Early putc routine for EARLY_PRINTF support.  To use, add to kernel config:
217 *   option SOCDEV_PA=0x02000000
218 *   option SOCDEV_VA=0x02000000
219 *   option EARLY_PRINTF
220 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
221 * makes sense now, but if multiple SOCs do that it will make early_putc another
222 * duplicate symbol to be eliminated on the path to a generic kernel.
223 */
224#if 0
225static void
226imx6_early_putc(int c)
227{
228	volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
229	volatile uint32_t * UART_TX_REG   = (uint32_t *)0x02020040;
230	const uint32_t      UART_TXRDY    = (1 << 3);
231
232	while ((*UART_STAT_REG & UART_TXRDY) == 0)
233		continue;
234	*UART_TX_REG = c;
235}
236early_putc_t *early_putc = imx6_early_putc;
237#endif
238
239