am335x_usbss.c revision 266152
1/*- 2 * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26#include <sys/cdefs.h> 27__FBSDID("$FreeBSD: stable/10/sys/arm/ti/am335x/am335x_usbss.c 266152 2014-05-15 16:11:06Z ian $"); 28 29#include <sys/stdint.h> 30#include <sys/stddef.h> 31#include <sys/param.h> 32#include <sys/queue.h> 33#include <sys/types.h> 34#include <sys/systm.h> 35#include <sys/kernel.h> 36#include <sys/bus.h> 37#include <sys/module.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40#include <sys/condvar.h> 41#include <sys/sysctl.h> 42#include <sys/sx.h> 43#include <sys/unistd.h> 44#include <sys/callout.h> 45#include <sys/malloc.h> 46#include <sys/priv.h> 47 48#include <dev/fdt/fdt_common.h> 49#include <dev/ofw/openfirm.h> 50#include <dev/ofw/ofw_bus.h> 51#include <dev/ofw/ofw_bus_subr.h> 52 53#include <dev/usb/usb.h> 54#include <dev/usb/usbdi.h> 55 56#include <dev/usb/usb_core.h> 57#include <dev/usb/usb_busdma.h> 58#include <dev/usb/usb_process.h> 59#include <dev/usb/usb_util.h> 60 61#define USB_DEBUG_VAR usbssdebug 62 63#include <dev/usb/usb_controller.h> 64#include <dev/usb/usb_bus.h> 65#include <dev/usb/controller/musb_otg.h> 66#include <dev/usb/usb_debug.h> 67 68#include <sys/rman.h> 69 70#include <arm/ti/ti_prcm.h> 71#include <arm/ti/ti_scm.h> 72#include <arm/ti/am335x/am335x_scm.h> 73 74#define AM335X_USB_PORTS 2 75 76#define USBSS_REVREG 0x00 77#define USBSS_SYSCONFIG 0x10 78#define USBSS_SYSCONFIG_SRESET 1 79 80#define USBCTRL_REV 0x00 81#define USBCTRL_CTRL 0x14 82#define USBCTRL_STAT 0x18 83#define USBCTRL_IRQ_STAT0 0x30 84#define IRQ_STAT0_RXSHIFT 16 85#define IRQ_STAT0_TXSHIFT 0 86#define USBCTRL_IRQ_STAT1 0x34 87#define IRQ_STAT1_DRVVBUS (1 << 8) 88#define USBCTRL_INTEN_SET0 0x38 89#define USBCTRL_INTEN_SET1 0x3C 90#define USBCTRL_INTEN_USB_ALL 0x1ff 91#define USBCTRL_INTEN_USB_SOF (1 << 3) 92#define USBCTRL_INTEN_CLR0 0x40 93#define USBCTRL_INTEN_CLR1 0x44 94#define USBCTRL_UTMI 0xE0 95#define USBCTRL_UTMI_FSDATAEXT (1 << 1) 96#define USBCTRL_MODE 0xE8 97#define USBCTRL_MODE_IDDIG (1 << 8) 98#define USBCTRL_MODE_IDDIGMUX (1 << 7) 99 100/* USBSS resource + 2 MUSB ports */ 101 102#define RES_USBSS 0 103#define RES_USBCTRL(i) (3*i+1) 104#define RES_USBPHY(i) (3*i+2) 105#define RES_USBCORE(i) (3*i+3) 106 107#define USB_WRITE4(sc, idx, reg, val) do { \ 108 bus_write_4((sc)->sc_mem_res[idx], (reg), (val)); \ 109} while (0) 110 111#define USB_READ4(sc, idx, reg) bus_read_4((sc)->sc_mem_res[idx], (reg)) 112 113#define USBSS_WRITE4(sc, reg, val) \ 114 USB_WRITE4((sc), RES_USBSS, (reg), (val)) 115#define USBSS_READ4(sc, reg) \ 116 USB_READ4((sc), RES_USBSS, (reg)) 117#define USBCTRL_WRITE4(sc, unit, reg, val) \ 118 USB_WRITE4((sc), RES_USBCTRL(unit), (reg), (val)) 119#define USBCTRL_READ4(sc, unit, reg) \ 120 USB_READ4((sc), RES_USBCTRL(unit), (reg)) 121#define USBPHY_WRITE4(sc, unit, reg, val) \ 122 USB_WRITE4((sc), RES_USBPHY(unit), (reg), (val)) 123#define USBPHY_READ4(sc, unit, reg) \ 124 USB_READ4((sc), RES_USBPHY(unit), (reg)) 125 126static struct resource_spec am335x_musbotg_mem_spec[] = { 127 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 128 { SYS_RES_MEMORY, 1, RF_ACTIVE }, 129 { SYS_RES_MEMORY, 2, RF_ACTIVE }, 130 { SYS_RES_MEMORY, 3, RF_ACTIVE }, 131 { SYS_RES_MEMORY, 4, RF_ACTIVE }, 132 { SYS_RES_MEMORY, 5, RF_ACTIVE }, 133 { SYS_RES_MEMORY, 6, RF_ACTIVE }, 134 { -1, 0, 0 } 135}; 136 137static struct resource_spec am335x_musbotg_irq_spec[] = { 138 { SYS_RES_IRQ, 0, RF_ACTIVE }, 139 { SYS_RES_IRQ, 1, RF_ACTIVE }, 140 { SYS_RES_IRQ, 2, RF_ACTIVE }, 141 { -1, 0, 0 } 142}; 143 144#ifdef USB_DEBUG 145static int usbssdebug = 0; 146 147static SYSCTL_NODE(_hw_usb, OID_AUTO, am335x_usbss, CTLFLAG_RW, 0, "AM335x USBSS"); 148SYSCTL_INT(_hw_usb_am335x_usbss, OID_AUTO, debug, CTLFLAG_RW, 149 &usbssdebug, 0, "Debug level"); 150#endif 151 152static device_probe_t musbotg_probe; 153static device_attach_t musbotg_attach; 154static device_detach_t musbotg_detach; 155 156struct musbotg_super_softc { 157 struct musbotg_softc sc_otg[AM335X_USB_PORTS]; 158 struct resource *sc_mem_res[AM335X_USB_PORTS*3+1]; 159 struct resource *sc_irq_res[AM335X_USB_PORTS+1]; 160 void *sc_intr_hdl; 161}; 162 163static void 164musbotg_vbus_poll(struct musbotg_super_softc *sc, int port) 165{ 166 uint32_t stat; 167 168 if (sc->sc_otg[port].sc_mode == MUSB2_DEVICE_MODE) 169 musbotg_vbus_interrupt(&sc->sc_otg[port], 1); 170 else { 171 stat = USBCTRL_READ4(sc, port, USBCTRL_STAT); 172 musbotg_vbus_interrupt(&sc->sc_otg[port], stat & 1); 173 } 174} 175 176/* 177 * Arg to musbotg_clocks_on and musbot_clocks_off is 178 * a uint32_t * pointing to the SCM register offset. 179 */ 180static uint32_t USB_CTRL[] = {SCM_USB_CTRL0, SCM_USB_CTRL1}; 181 182static void 183musbotg_clocks_on(void *arg) 184{ 185 uint32_t c, reg = *(uint32_t *)arg; 186 187 ti_scm_reg_read_4(reg, &c); 188 c &= ~3; /* Enable power */ 189 c |= 1 << 19; /* VBUS detect enable */ 190 c |= 1 << 20; /* Session end enable */ 191 ti_scm_reg_write_4(reg, c); 192} 193 194static void 195musbotg_clocks_off(void *arg) 196{ 197 uint32_t c, reg = *(uint32_t *)arg; 198 199 /* Disable power to PHY */ 200 ti_scm_reg_read_4(reg, &c); 201 ti_scm_reg_write_4(reg, c | 3); 202} 203 204static void 205musbotg_ep_int_set(struct musbotg_softc *sc, int ep, int on) 206{ 207 struct musbotg_super_softc *ssc = sc->sc_platform_data; 208 uint32_t epmask; 209 210 epmask = ((1 << ep) << IRQ_STAT0_RXSHIFT); 211 epmask |= ((1 << ep) << IRQ_STAT0_TXSHIFT); 212 if (on) 213 USBCTRL_WRITE4(ssc, sc->sc_id, 214 USBCTRL_INTEN_SET0, epmask); 215 else 216 USBCTRL_WRITE4(ssc, sc->sc_id, 217 USBCTRL_INTEN_CLR0, epmask); 218} 219 220static void 221musbotg_usbss_interrupt(void *arg) 222{ 223 panic("USBSS real interrupt"); 224} 225 226static void 227musbotg_wrapper_interrupt(void *arg) 228{ 229 struct musbotg_softc *sc = arg; 230 struct musbotg_super_softc *ssc = sc->sc_platform_data; 231 uint32_t stat, stat0, stat1; 232 stat = USBCTRL_READ4(ssc, sc->sc_id, USBCTRL_STAT); 233 stat0 = USBCTRL_READ4(ssc, sc->sc_id, USBCTRL_IRQ_STAT0); 234 stat1 = USBCTRL_READ4(ssc, sc->sc_id, USBCTRL_IRQ_STAT1); 235 if (stat0) 236 USBCTRL_WRITE4(ssc, sc->sc_id, USBCTRL_IRQ_STAT0, stat0); 237 if (stat1) 238 USBCTRL_WRITE4(ssc, sc->sc_id, USBCTRL_IRQ_STAT1, stat1); 239 240 DPRINTFN(4, "port%d: stat0=%08x stat1=%08x, stat=%08x\n", 241 sc->sc_id, stat0, stat1, stat); 242 243 if (stat1 & IRQ_STAT1_DRVVBUS) 244 musbotg_vbus_interrupt(sc, stat & 1); 245 246 musbotg_interrupt(arg, ((stat0 >> 16) & 0xffff), 247 stat0 & 0xffff, stat1 & 0xff); 248} 249 250static int 251musbotg_probe(device_t dev) 252{ 253 254 if (!ofw_bus_status_okay(dev)) 255 return (ENXIO); 256 257 if (!ofw_bus_is_compatible(dev, "ti,musb-am33xx")) 258 return (ENXIO); 259 260 device_set_desc(dev, "TI AM33xx integrated USB OTG controller"); 261 262 return (BUS_PROBE_DEFAULT); 263} 264 265static int 266musbotg_attach(device_t dev) 267{ 268 struct musbotg_super_softc *sc = device_get_softc(dev); 269 int err; 270 int i; 271 uint32_t rev, reg; 272 273 /* Request the memory resources */ 274 err = bus_alloc_resources(dev, am335x_musbotg_mem_spec, 275 sc->sc_mem_res); 276 if (err) { 277 device_printf(dev, 278 "Error: could not allocate mem resources\n"); 279 return (ENXIO); 280 } 281 282 /* Request the IRQ resources */ 283 err = bus_alloc_resources(dev, am335x_musbotg_irq_spec, 284 sc->sc_irq_res); 285 if (err) { 286 device_printf(dev, 287 "Error: could not allocate irq resources\n"); 288 return (ENXIO); 289 } 290 291 /* 292 * Reset USBSS, USB0 and USB1 293 */ 294 rev = USBSS_READ4(sc, USBSS_REVREG); 295 device_printf(dev, "TI AM335X USBSS v%d.%d.%d\n", 296 (rev >> 8) & 7, (rev >> 6) & 3, rev & 63); 297 298 ti_prcm_clk_enable(MUSB0_CLK); 299 300 USBSS_WRITE4(sc, USBSS_SYSCONFIG, 301 USBSS_SYSCONFIG_SRESET); 302 while (USBSS_READ4(sc, USBSS_SYSCONFIG) & 303 USBSS_SYSCONFIG_SRESET) 304 ; 305 306 err = bus_setup_intr(dev, sc->sc_irq_res[0], 307 INTR_TYPE_BIO | INTR_MPSAFE, 308 NULL, (driver_intr_t *)musbotg_usbss_interrupt, sc, 309 &sc->sc_intr_hdl); 310 311 if (err) { 312 sc->sc_intr_hdl = NULL; 313 device_printf(dev, "Failed to setup USBSS interrupt\n"); 314 goto error; 315 } 316 317 for (i = 0; i < AM335X_USB_PORTS; i++) { 318 /* setup MUSB OTG USB controller interface softc */ 319 sc->sc_otg[i].sc_clocks_on = &musbotg_clocks_on; 320 sc->sc_otg[i].sc_clocks_off = &musbotg_clocks_off; 321 sc->sc_otg[i].sc_clocks_arg = &USB_CTRL[i]; 322 323 sc->sc_otg[i].sc_ep_int_set = musbotg_ep_int_set; 324 325 /* initialise some bus fields */ 326 sc->sc_otg[i].sc_bus.parent = dev; 327 sc->sc_otg[i].sc_bus.devices = sc->sc_otg[i].sc_devices; 328 sc->sc_otg[i].sc_bus.devices_max = MUSB2_MAX_DEVICES; 329 330 /* get all DMA memory */ 331 if (usb_bus_mem_alloc_all(&sc->sc_otg[i].sc_bus, 332 USB_GET_DMA_TAG(dev), NULL)) { 333 device_printf(dev, 334 "Failed allocate bus mem for musb%d\n", i); 335 return (ENOMEM); 336 } 337 sc->sc_otg[i].sc_io_res = sc->sc_mem_res[RES_USBCORE(i)]; 338 sc->sc_otg[i].sc_io_tag = 339 rman_get_bustag(sc->sc_otg[i].sc_io_res); 340 sc->sc_otg[i].sc_io_hdl = 341 rman_get_bushandle(sc->sc_otg[i].sc_io_res); 342 sc->sc_otg[i].sc_io_size = 343 rman_get_size(sc->sc_otg[i].sc_io_res); 344 345 sc->sc_otg[i].sc_irq_res = sc->sc_irq_res[i+1]; 346 347 sc->sc_otg[i].sc_bus.bdev = device_add_child(dev, "usbus", -1); 348 if (!(sc->sc_otg[i].sc_bus.bdev)) { 349 device_printf(dev, "No busdev for musb%d\n", i); 350 goto error; 351 } 352 device_set_ivars(sc->sc_otg[i].sc_bus.bdev, 353 &sc->sc_otg[i].sc_bus); 354 355 err = bus_setup_intr(dev, sc->sc_otg[i].sc_irq_res, 356 INTR_TYPE_BIO | INTR_MPSAFE, 357 NULL, (driver_intr_t *)musbotg_wrapper_interrupt, 358 &sc->sc_otg[i], &sc->sc_otg[i].sc_intr_hdl); 359 if (err) { 360 sc->sc_otg[i].sc_intr_hdl = NULL; 361 device_printf(dev, 362 "Failed to setup interrupt for musb%d\n", i); 363 goto error; 364 } 365 366 sc->sc_otg[i].sc_id = i; 367 sc->sc_otg[i].sc_platform_data = sc; 368 if (i == 0) 369 sc->sc_otg[i].sc_mode = MUSB2_DEVICE_MODE; 370 else 371 sc->sc_otg[i].sc_mode = MUSB2_HOST_MODE; 372 373 /* 374 * software-controlled function 375 */ 376 377 if (sc->sc_otg[i].sc_mode == MUSB2_HOST_MODE) { 378 reg = USBCTRL_READ4(sc, i, USBCTRL_MODE); 379 reg |= USBCTRL_MODE_IDDIGMUX; 380 reg &= ~USBCTRL_MODE_IDDIG; 381 USBCTRL_WRITE4(sc, i, USBCTRL_MODE, reg); 382 USBCTRL_WRITE4(sc, i, USBCTRL_UTMI, 383 USBCTRL_UTMI_FSDATAEXT); 384 } else { 385 reg = USBCTRL_READ4(sc, i, USBCTRL_MODE); 386 reg |= USBCTRL_MODE_IDDIGMUX; 387 reg |= USBCTRL_MODE_IDDIG; 388 USBCTRL_WRITE4(sc, i, USBCTRL_MODE, reg); 389 } 390 391 reg = USBCTRL_INTEN_USB_ALL & ~USBCTRL_INTEN_USB_SOF; 392 USBCTRL_WRITE4(sc, i, USBCTRL_INTEN_SET1, reg); 393 USBCTRL_WRITE4(sc, i, USBCTRL_INTEN_CLR0, 0xffffffff); 394 395 err = musbotg_init(&sc->sc_otg[i]); 396 if (!err) 397 err = device_probe_and_attach(sc->sc_otg[i].sc_bus.bdev); 398 399 if (err) 400 goto error; 401 402 /* poll VBUS one time */ 403 musbotg_vbus_poll(sc, i); 404 } 405 406 return (0); 407 408error: 409 musbotg_detach(dev); 410 return (ENXIO); 411} 412 413static int 414musbotg_detach(device_t dev) 415{ 416 struct musbotg_super_softc *sc = device_get_softc(dev); 417 device_t bdev; 418 int err; 419 int i; 420 421 for (i = 0; i < AM335X_USB_PORTS; i++) { 422 if (sc->sc_otg[i].sc_bus.bdev) { 423 bdev = sc->sc_otg[i].sc_bus.bdev; 424 device_detach(bdev); 425 device_delete_child(dev, bdev); 426 } 427 428 if (sc->sc_otg[i].sc_irq_res && sc->sc_otg[i].sc_intr_hdl) { 429 /* 430 * only call musbotg_uninit() after musbotg_init() 431 */ 432 musbotg_uninit(&sc->sc_otg[i]); 433 434 err = bus_teardown_intr(dev, sc->sc_otg[i].sc_irq_res, 435 sc->sc_otg[i].sc_intr_hdl); 436 sc->sc_otg[i].sc_intr_hdl = NULL; 437 } 438 439 usb_bus_mem_free_all(&sc->sc_otg[i].sc_bus, NULL); 440 } 441 442 if (sc->sc_intr_hdl) { 443 bus_teardown_intr(dev, sc->sc_irq_res[0], 444 sc->sc_intr_hdl); 445 sc->sc_intr_hdl = NULL; 446 } 447 448 449 /* Free resources if any */ 450 if (sc->sc_mem_res[0]) 451 bus_release_resources(dev, am335x_musbotg_mem_spec, 452 sc->sc_mem_res); 453 454 if (sc->sc_irq_res[0]) 455 bus_release_resources(dev, am335x_musbotg_irq_spec, 456 sc->sc_irq_res); 457 458 /* during module unload there are lots of children leftover */ 459 device_delete_children(dev); 460 461 return (0); 462} 463 464static device_method_t musbotg_methods[] = { 465 /* Device interface */ 466 DEVMETHOD(device_probe, musbotg_probe), 467 DEVMETHOD(device_attach, musbotg_attach), 468 DEVMETHOD(device_detach, musbotg_detach), 469 DEVMETHOD(device_suspend, bus_generic_suspend), 470 DEVMETHOD(device_resume, bus_generic_resume), 471 DEVMETHOD(device_shutdown, bus_generic_shutdown), 472 473 DEVMETHOD_END 474}; 475 476static driver_t musbotg_driver = { 477 .name = "musbotg", 478 .methods = musbotg_methods, 479 .size = sizeof(struct musbotg_super_softc), 480}; 481 482static devclass_t musbotg_devclass; 483 484DRIVER_MODULE(musbotg, simplebus, musbotg_driver, musbotg_devclass, 0, 0); 485MODULE_DEPEND(musbotg, usb, 1, 1, 1); 486