bcm2835_intr.c revision 322724
1/*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Based on OMAP3 INTC code by Ben Gray 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: stable/10/sys/arm/broadcom/bcm2835/bcm2835_intr.c 322724 2017-08-20 16:52:27Z marius $"); 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/kernel.h> 37#include <sys/ktr.h> 38#include <sys/module.h> 39#include <sys/rman.h> 40#include <machine/bus.h> 41#include <machine/intr.h> 42 43#include <dev/fdt/fdt_common.h> 44#include <dev/ofw/openfirm.h> 45#include <dev/ofw/ofw_bus.h> 46#include <dev/ofw/ofw_bus_subr.h> 47 48#ifdef SOC_BCM2836 49#include <arm/broadcom/bcm2835/bcm2836.h> 50#endif 51 52#define INTC_PENDING_BASIC 0x00 53#define INTC_PENDING_BANK1 0x04 54#define INTC_PENDING_BANK2 0x08 55#define INTC_FIQ_CONTROL 0x0C 56#define INTC_ENABLE_BANK1 0x10 57#define INTC_ENABLE_BANK2 0x14 58#define INTC_ENABLE_BASIC 0x18 59#define INTC_DISABLE_BANK1 0x1C 60#define INTC_DISABLE_BANK2 0x20 61#define INTC_DISABLE_BASIC 0x24 62 63#define BANK1_START 8 64#define BANK1_END (BANK1_START + 32 - 1) 65#define BANK2_START (BANK1_START + 32) 66#define BANK2_END (BANK2_START + 32 - 1) 67#define BANK3_START (BANK2_START + 32) 68#define BANK3_END (BANK3_START + 32 - 1) 69 70#define IS_IRQ_BASIC(n) (((n) >= 0) && ((n) < BANK1_START)) 71#define IS_IRQ_BANK1(n) (((n) >= BANK1_START) && ((n) <= BANK1_END)) 72#define IS_IRQ_BANK2(n) (((n) >= BANK2_START) && ((n) <= BANK2_END)) 73#define ID_IRQ_BCM2836(n) (((n) >= BANK3_START) && ((n) <= BANK3_END)) 74#define IRQ_BANK1(n) ((n) - BANK1_START) 75#define IRQ_BANK2(n) ((n) - BANK2_START) 76 77#ifdef DEBUG 78#define dprintf(fmt, args...) printf(fmt, ##args) 79#else 80#define dprintf(fmt, args...) 81#endif 82 83struct bcm_intc_softc { 84 device_t sc_dev; 85 struct resource * intc_res; 86 bus_space_tag_t intc_bst; 87 bus_space_handle_t intc_bsh; 88}; 89 90static struct bcm_intc_softc *bcm_intc_sc = NULL; 91 92#define intc_read_4(_sc, reg) \ 93 bus_space_read_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg)) 94#define intc_write_4(_sc, reg, val) \ 95 bus_space_write_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg), (val)) 96 97static int 98bcm_intc_probe(device_t dev) 99{ 100 101 if (!ofw_bus_status_okay(dev)) 102 return (ENXIO); 103 104 if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-armctrl-ic") && 105 !ofw_bus_is_compatible(dev, "brcm,bcm2836-armctrl-ic")) 106 return (ENXIO); 107 device_set_desc(dev, "BCM2835 Interrupt Controller"); 108 return (BUS_PROBE_DEFAULT); 109} 110 111static int 112bcm_intc_attach(device_t dev) 113{ 114 struct bcm_intc_softc *sc = device_get_softc(dev); 115 int rid = 0; 116 117 sc->sc_dev = dev; 118 119 if (bcm_intc_sc) 120 return (ENXIO); 121 122 sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 123 if (sc->intc_res == NULL) { 124 device_printf(dev, "could not allocate memory resource\n"); 125 return (ENXIO); 126 } 127 128 sc->intc_bst = rman_get_bustag(sc->intc_res); 129 sc->intc_bsh = rman_get_bushandle(sc->intc_res); 130 131 bcm_intc_sc = sc; 132 133 return (0); 134} 135 136static device_method_t bcm_intc_methods[] = { 137 DEVMETHOD(device_probe, bcm_intc_probe), 138 DEVMETHOD(device_attach, bcm_intc_attach), 139 { 0, 0 } 140}; 141 142static driver_t bcm_intc_driver = { 143 "intc", 144 bcm_intc_methods, 145 sizeof(struct bcm_intc_softc), 146}; 147 148static devclass_t bcm_intc_devclass; 149 150EARLY_DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 151 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); 152 153int 154arm_get_next_irq(int last_irq) 155{ 156 struct bcm_intc_softc *sc = bcm_intc_sc; 157 uint32_t pending; 158 int32_t irq = last_irq + 1; 159#ifdef SOC_BCM2836 160 int ret; 161#endif 162 163 /* Sanity check */ 164 if (irq < 0) 165 irq = 0; 166 167#ifdef SOC_BCM2836 168 if ((ret = bcm2836_get_next_irq(irq)) >= 0) 169 return (ret + BANK3_START); 170#endif 171 172 /* TODO: should we mask last_irq? */ 173 if (irq < BANK1_START) { 174 pending = intc_read_4(sc, INTC_PENDING_BASIC); 175 if ((pending & 0xFF) == 0) { 176 irq = BANK1_START; /* skip to next bank */ 177 } else do { 178 if (pending & (1 << irq)) 179 return irq; 180 irq++; 181 } while (irq < BANK1_START); 182 } 183 if (irq < BANK2_START) { 184 pending = intc_read_4(sc, INTC_PENDING_BANK1); 185 if (pending == 0) { 186 irq = BANK2_START; /* skip to next bank */ 187 } else do { 188 if (pending & (1 << IRQ_BANK1(irq))) 189 return irq; 190 irq++; 191 } while (irq < BANK2_START); 192 } 193 if (irq < BANK3_START) { 194 pending = intc_read_4(sc, INTC_PENDING_BANK2); 195 if (pending != 0) do { 196 if (pending & (1 << IRQ_BANK2(irq))) 197 return irq; 198 irq++; 199 } while (irq < BANK3_START); 200 } 201 return (-1); 202} 203 204void 205arm_mask_irq(uintptr_t nb) 206{ 207 struct bcm_intc_softc *sc = bcm_intc_sc; 208 dprintf("%s: %d\n", __func__, nb); 209 210 if (IS_IRQ_BASIC(nb)) 211 intc_write_4(sc, INTC_DISABLE_BASIC, (1 << nb)); 212 else if (IS_IRQ_BANK1(nb)) 213 intc_write_4(sc, INTC_DISABLE_BANK1, (1 << IRQ_BANK1(nb))); 214 else if (IS_IRQ_BANK2(nb)) 215 intc_write_4(sc, INTC_DISABLE_BANK2, (1 << IRQ_BANK2(nb))); 216#ifdef SOC_BCM2836 217 else if (ID_IRQ_BCM2836(nb)) 218 bcm2836_mask_irq(nb - BANK3_START); 219#endif 220 else 221 printf("arm_mask_irq: Invalid IRQ number: %d\n", nb); 222} 223 224void 225arm_unmask_irq(uintptr_t nb) 226{ 227 struct bcm_intc_softc *sc = bcm_intc_sc; 228 dprintf("%s: %d\n", __func__, nb); 229 230 if (IS_IRQ_BASIC(nb)) 231 intc_write_4(sc, INTC_ENABLE_BASIC, (1 << nb)); 232 else if (IS_IRQ_BANK1(nb)) 233 intc_write_4(sc, INTC_ENABLE_BANK1, (1 << IRQ_BANK1(nb))); 234 else if (IS_IRQ_BANK2(nb)) 235 intc_write_4(sc, INTC_ENABLE_BANK2, (1 << IRQ_BANK2(nb))); 236#ifdef SOC_BCM2836 237 else if (ID_IRQ_BCM2836(nb)) 238 bcm2836_unmask_irq(nb - BANK3_START); 239#endif 240 else 241 printf("arm_mask_irq: Invalid IRQ number: %d\n", nb); 242} 243