ehci_mv.c revision 278278 
1/*-
2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 *    may be used to endorse or promote products derived from this software
17 *    without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32/*
33 * FDT attachment driver for the USB Enhanced Host Controller.
34 */
35
36#include <sys/cdefs.h>
37__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ehci_mv.c 278278 2015-02-05 20:03:02Z hselasky $");
38
39#include "opt_bus.h"
40
41#include <sys/stdint.h>
42#include <sys/stddef.h>
43#include <sys/param.h>
44#include <sys/queue.h>
45#include <sys/types.h>
46#include <sys/systm.h>
47#include <sys/kernel.h>
48#include <sys/bus.h>
49#include <sys/module.h>
50#include <sys/lock.h>
51#include <sys/mutex.h>
52#include <sys/condvar.h>
53#include <sys/sysctl.h>
54#include <sys/sx.h>
55#include <sys/unistd.h>
56#include <sys/callout.h>
57#include <sys/malloc.h>
58#include <sys/priv.h>
59
60#include <dev/ofw/ofw_bus.h>
61#include <dev/ofw/ofw_bus_subr.h>
62
63#include <dev/usb/usb.h>
64#include <dev/usb/usbdi.h>
65
66#include <dev/usb/usb_core.h>
67#include <dev/usb/usb_busdma.h>
68#include <dev/usb/usb_process.h>
69#include <dev/usb/usb_util.h>
70
71#include <dev/usb/usb_controller.h>
72#include <dev/usb/usb_bus.h>
73#include <dev/usb/controller/ehci.h>
74#include <dev/usb/controller/ehcireg.h>
75
76#include <arm/mv/mvreg.h>
77#include <arm/mv/mvvar.h>
78
79#define	EHCI_VENDORID_MRVL	0x1286
80#define	EHCI_HC_DEVSTR		"Marvell Integrated USB 2.0 controller"
81
82static device_attach_t mv_ehci_attach;
83static device_detach_t mv_ehci_detach;
84
85static int err_intr(void *arg);
86
87static struct resource *irq_err;
88static void *ih_err;
89
90/* EHCI HC regs start at this offset within USB range */
91#define	MV_USB_HOST_OFST	0x0100
92
93#define	USB_BRIDGE_INTR_CAUSE	0x210
94#define	USB_BRIDGE_INTR_MASK	0x214
95#define	USB_BRIDGE_ERR_ADDR	0x21C
96
97#define	MV_USB_ADDR_DECODE_ERR (1 << 0)
98#define	MV_USB_HOST_UNDERFLOW  (1 << 1)
99#define	MV_USB_HOST_OVERFLOW   (1 << 2)
100#define	MV_USB_DEVICE_UNDERFLOW (1 << 3)
101
102static int
103mv_ehci_probe(device_t self)
104{
105
106	if (!ofw_bus_status_okay(self))
107		return (ENXIO);
108
109	if (!ofw_bus_is_compatible(self, "mrvl,usb-ehci"))
110		return (ENXIO);
111
112	device_set_desc(self, EHCI_HC_DEVSTR);
113
114	return (BUS_PROBE_DEFAULT);
115}
116
117static int
118mv_ehci_attach(device_t self)
119{
120	ehci_softc_t *sc = device_get_softc(self);
121	bus_space_handle_t bsh;
122	int err;
123	int rid;
124
125	/* initialise some bus fields */
126	sc->sc_bus.parent = self;
127	sc->sc_bus.devices = sc->sc_devices;
128	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
129	sc->sc_bus.dma_bits = 32;
130
131	/* get all DMA memory */
132	if (usb_bus_mem_alloc_all(&sc->sc_bus,
133	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
134		return (ENOMEM);
135	}
136
137	rid = 0;
138	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
139	if (!sc->sc_io_res) {
140		device_printf(self, "Could not map memory\n");
141		goto error;
142	}
143	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
144	bsh = rman_get_bushandle(sc->sc_io_res);
145	sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST;
146
147	/*
148	 * Marvell EHCI host controller registers start at certain offset
149	 * within the whole USB registers range, so create a subregion for the
150	 * host mode configuration purposes.
151	 */
152
153	if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST,
154	    sc->sc_io_size, &sc->sc_io_hdl) != 0)
155		panic("%s: unable to subregion USB host registers",
156		    device_get_name(self));
157
158	rid = 0;
159	irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
160	    RF_SHAREABLE | RF_ACTIVE);
161	if (irq_err == NULL) {
162		device_printf(self, "Could not allocate error irq\n");
163		mv_ehci_detach(self);
164		return (ENXIO);
165	}
166
167	/*
168	 * Notice: Marvell EHCI controller has TWO interrupt lines, so make
169	 * sure to use the correct rid for the main one (controller interrupt)
170	 * -- refer to DTS for the right resource number to use here.
171	 */
172	rid = 1;
173	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
174	    RF_SHAREABLE | RF_ACTIVE);
175	if (sc->sc_irq_res == NULL) {
176		device_printf(self, "Could not allocate irq\n");
177		goto error;
178	}
179
180	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
181	if (!sc->sc_bus.bdev) {
182		device_printf(self, "Could not add USB device\n");
183		goto error;
184	}
185	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
186	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
187
188	sprintf(sc->sc_vendor, "Marvell");
189
190	err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO,
191	    err_intr, NULL, sc, &ih_err);
192	if (err) {
193		device_printf(self, "Could not setup error irq, %d\n", err);
194		ih_err = NULL;
195		goto error;
196	}
197
198	EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR |
199	    MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW |
200	    MV_USB_DEVICE_UNDERFLOW);
201
202	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
203	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
204	if (err) {
205		device_printf(self, "Could not setup irq, %d\n", err);
206		sc->sc_intr_hdl = NULL;
207		goto error;
208	}
209
210	/*
211	 * Workaround for Marvell integrated EHCI controller: reset of
212	 * the EHCI core clears the USBMODE register, which sets the core in
213	 * an undefined state (neither host nor agent), so it needs to be set
214	 * again for proper operation.
215	 *
216	 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for
217	 * details.
218	 */
219	sc->sc_flags |= EHCI_SCFLG_SETMODE;
220	if (bootverbose)
221		device_printf(self, "5.24 GL USB-2 workaround enabled\n");
222
223	/* XXX all MV chips need it? */
224	sc->sc_flags |= EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_NORESTERM;
225
226	err = ehci_init(sc);
227	if (!err) {
228		err = device_probe_and_attach(sc->sc_bus.bdev);
229	}
230	if (err) {
231		device_printf(self, "USB init failed err=%d\n", err);
232		goto error;
233	}
234	return (0);
235
236error:
237	mv_ehci_detach(self);
238	return (ENXIO);
239}
240
241static int
242mv_ehci_detach(device_t self)
243{
244	ehci_softc_t *sc = device_get_softc(self);
245	device_t bdev;
246	int err;
247
248	if (sc->sc_bus.bdev) {
249		bdev = sc->sc_bus.bdev;
250		device_detach(bdev);
251		device_delete_child(self, bdev);
252	}
253	/* during module unload there are lots of children leftover */
254	device_delete_children(self);
255
256	/*
257	 * disable interrupts that might have been switched on in mv_ehci_attach
258	 */
259	if (sc->sc_io_res) {
260		EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0);
261	}
262	if (sc->sc_irq_res && sc->sc_intr_hdl) {
263		/*
264		 * only call ehci_detach() after ehci_init()
265		 */
266		ehci_detach(sc);
267
268		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
269
270		if (err)
271			/* XXX or should we panic? */
272			device_printf(self, "Could not tear down irq, %d\n",
273			    err);
274		sc->sc_intr_hdl = NULL;
275	}
276	if (irq_err && ih_err) {
277		err = bus_teardown_intr(self, irq_err, ih_err);
278
279		if (err)
280			device_printf(self, "Could not tear down irq, %d\n",
281			    err);
282		ih_err = NULL;
283	}
284	if (irq_err) {
285		bus_release_resource(self, SYS_RES_IRQ, 0, irq_err);
286		irq_err = NULL;
287	}
288	if (sc->sc_irq_res) {
289		bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res);
290		sc->sc_irq_res = NULL;
291	}
292	if (sc->sc_io_res) {
293		bus_release_resource(self, SYS_RES_MEMORY, 0,
294		    sc->sc_io_res);
295		sc->sc_io_res = NULL;
296	}
297	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
298
299	return (0);
300}
301
302static int
303err_intr(void *arg)
304{
305	ehci_softc_t *sc = arg;
306	unsigned int cause;
307
308	cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE);
309	if (cause) {
310		printf("USB error: ");
311		if (cause & MV_USB_ADDR_DECODE_ERR) {
312			uint32_t addr;
313
314			addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR);
315			printf("address decoding error (addr=%#x)\n", addr);
316		}
317		if (cause & MV_USB_HOST_UNDERFLOW)
318			printf("host underflow\n");
319		if (cause & MV_USB_HOST_OVERFLOW)
320			printf("host overflow\n");
321		if (cause & MV_USB_DEVICE_UNDERFLOW)
322			printf("device underflow\n");
323		if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW |
324		    MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW))
325			printf("unknown cause (cause=%#x)\n", cause);
326
327		EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0);
328	}
329	return (FILTER_HANDLED);
330}
331
332static device_method_t ehci_methods[] = {
333	/* Device interface */
334	DEVMETHOD(device_probe, mv_ehci_probe),
335	DEVMETHOD(device_attach, mv_ehci_attach),
336	DEVMETHOD(device_detach, mv_ehci_detach),
337	DEVMETHOD(device_suspend, bus_generic_suspend),
338	DEVMETHOD(device_resume, bus_generic_resume),
339	DEVMETHOD(device_shutdown, bus_generic_shutdown),
340
341	DEVMETHOD_END
342};
343
344static driver_t ehci_driver = {
345	"ehci",
346	ehci_methods,
347	sizeof(ehci_softc_t),
348};
349
350static devclass_t ehci_devclass;
351
352DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
353MODULE_DEPEND(ehci, usb, 1, 1, 1);
354