files.mv revision 266277 
1# $FreeBSD: stable/10/sys/arm/mv/files.mv 266277 2014-05-17 00:53:12Z ian $
2#
3# The Marvell CPU cores
4# - Compliant with V5TE architecture
5# - Super scalar dual issue CPU
6# - Big/Little Endian
7# - MMU/MPU
8# - L1 Cache: Supports streaming and write allocate
9# - Variable pipeline stages
10# - Out-of-order execution
11# - Branch Prediction
12# - JTAG/ICE
13# - Vector Floating Point (VFP) unit
14#
15arm/arm/bus_space_generic.c	standard
16arm/arm/cpufunc_asm_arm10.S	standard
17arm/arm/cpufunc_asm_arm11.S	standard
18arm/arm/cpufunc_asm_armv5.S	standard
19arm/arm/cpufunc_asm_armv5_ec.S	standard
20arm/arm/cpufunc_asm_armv7.S	standard
21arm/arm/cpufunc_asm_sheeva.S	standard
22arm/arm/cpufunc_asm_pj4b.S	standard
23arm/arm/irq_dispatch.S		standard
24
25arm/mv/bus_space.c		standard
26arm/mv/gpio.c			standard
27arm/mv/mv_common.c		standard
28arm/mv/mv_localbus.c		standard
29arm/mv/mv_machdep.c		standard
30arm/mv/mv_pci.c			optional	pci
31arm/mv/mv_sata.c		optional	ata | atamvsata
32arm/mv/mv_ts.c			standard
33arm/mv/timer.c			standard
34arm/mv/twsi.c			optional	iicbus
35
36dev/cesa/cesa.c			optional	cesa
37dev/mge/if_mge.c		optional	mge
38dev/nand/nfc_mv.c		optional	nand
39dev/mvs/mvs_soc.c		optional	mvs
40dev/uart/uart_dev_ns8250.c	optional	uart
41dev/usb/controller/ehci_mv.c	optional	ehci
42
43kern/kern_clocksource.c		standard
44