mp_machdep.c revision 266046
1/*- 2 * Copyright (c) 2011 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26#include <sys/cdefs.h> 27__FBSDID("$FreeBSD: stable/10/sys/arm/arm/mp_machdep.c 266046 2014-05-14 16:32:27Z ian $"); 28#include <sys/param.h> 29#include <sys/systm.h> 30#include <sys/bus.h> 31#include <sys/kernel.h> 32#include <sys/lock.h> 33#include <sys/mutex.h> 34#include <sys/proc.h> 35#include <sys/pcpu.h> 36#include <sys/sched.h> 37#include <sys/smp.h> 38#include <sys/ktr.h> 39#include <sys/malloc.h> 40 41#include <vm/vm.h> 42#include <vm/vm_extern.h> 43#include <vm/vm_kern.h> 44#include <vm/pmap.h> 45 46#include <machine/cpu.h> 47#include <machine/smp.h> 48#include <machine/pcb.h> 49#include <machine/pte.h> 50#include <machine/intr.h> 51#include <machine/vmparam.h> 52#ifdef VFP 53#include <machine/vfp.h> 54#endif 55#ifdef CPU_MV_PJ4B 56#include <arm/mv/mvwin.h> 57#include <dev/fdt/fdt_common.h> 58#endif 59 60#include "opt_smp.h" 61 62void *temp_pagetable; 63extern struct pcpu __pcpu[]; 64/* used to hold the AP's until we are ready to release them */ 65struct mtx ap_boot_mtx; 66struct pcb stoppcbs[MAXCPU]; 67 68/* # of Applications processors */ 69volatile int mp_naps; 70 71/* Set to 1 once we're ready to let the APs out of the pen. */ 72volatile int aps_ready = 0; 73 74static int ipi_handler(void *arg); 75void set_stackptrs(int cpu); 76 77/* Temporary variables for init_secondary() */ 78void *dpcpu[MAXCPU - 1]; 79 80/* Determine if we running MP machine */ 81int 82cpu_mp_probe(void) 83{ 84 CPU_SETOF(0, &all_cpus); 85 86 return (platform_mp_probe()); 87} 88 89/* Start Application Processor via platform specific function */ 90static int 91check_ap(void) 92{ 93 uint32_t ms; 94 95 for (ms = 0; ms < 2000; ++ms) { 96 if ((mp_naps + 1) == mp_ncpus) 97 return (0); /* success */ 98 else 99 DELAY(1000); 100 } 101 102 return (-2); 103} 104 105extern unsigned char _end[]; 106 107/* Initialize and fire up non-boot processors */ 108void 109cpu_mp_start(void) 110{ 111 int error, i; 112 vm_offset_t temp_pagetable_va; 113 vm_paddr_t addr, addr_end; 114 115 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 116 117 /* Reserve memory for application processors */ 118 for(i = 0; i < (mp_ncpus - 1); i++) 119 dpcpu[i] = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE, 120 M_WAITOK | M_ZERO); 121 temp_pagetable_va = (vm_offset_t)contigmalloc(L1_TABLE_SIZE, 122 M_TEMP, 0, 0x0, 0xffffffff, L1_TABLE_SIZE, 0); 123 addr = KERNPHYSADDR; 124 addr_end = (vm_offset_t)&_end - KERNVIRTADDR + KERNPHYSADDR; 125 addr_end &= ~L1_S_OFFSET; 126 addr_end += L1_S_SIZE; 127 bzero((void *)temp_pagetable_va, L1_TABLE_SIZE); 128 for (addr = KERNPHYSADDR; addr <= addr_end; addr += L1_S_SIZE) { 129 ((int *)(temp_pagetable_va))[addr >> L1_S_SHIFT] = 130 L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr; 131 ((int *)(temp_pagetable_va))[(addr - 132 KERNPHYSADDR + KERNVIRTADDR) >> L1_S_SHIFT] = 133 L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr; 134 } 135 136#if defined(CPU_MV_PJ4B) 137 /* Add ARMADAXP registers required for snoop filter initialization */ 138 ((int *)(temp_pagetable_va))[MV_BASE >> L1_S_SHIFT] = 139 L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW)|fdt_immr_pa; 140#endif 141 142 temp_pagetable = (void*)(vtophys(temp_pagetable_va)); 143 cpu_idcache_wbinv_all(); 144 cpu_l2cache_wbinv_all(); 145 146 /* Initialize boot code and start up processors */ 147 platform_mp_start_ap(); 148 149 /* Check if ap's started properly */ 150 error = check_ap(); 151 if (error) 152 printf("WARNING: Some AP's failed to start\n"); 153 else 154 for (i = 1; i < mp_ncpus; i++) 155 CPU_SET(i, &all_cpus); 156 157 contigfree((void *)temp_pagetable_va, L1_TABLE_SIZE, M_TEMP); 158} 159 160/* Introduce rest of cores to the world */ 161void 162cpu_mp_announce(void) 163{ 164 165} 166 167extern vm_paddr_t pmap_pa; 168void 169init_secondary(int cpu) 170{ 171 struct pcpu *pc; 172 uint32_t loop_counter; 173 int start = 0, end = 0; 174 175 cpu_setup(NULL); 176 setttb(pmap_pa); 177 cpu_tlb_flushID(); 178 179 pc = &__pcpu[cpu]; 180 set_pcpu(pc); 181 182 /* 183 * pcpu_init() updates queue, so it should not be executed in parallel 184 * on several cores 185 */ 186 while(mp_naps < (cpu - 1)) 187 ; 188 189 pcpu_init(pc, cpu, sizeof(struct pcpu)); 190 dpcpu_init(dpcpu[cpu - 1], cpu); 191 192 /* Provide stack pointers for other processor modes. */ 193 set_stackptrs(cpu); 194 195 /* Signal our startup to BSP */ 196 atomic_add_rel_32(&mp_naps, 1); 197 198 /* Spin until the BSP releases the APs */ 199 while (!aps_ready) 200 ; 201 202 /* Initialize curthread */ 203 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread")); 204 pc->pc_curthread = pc->pc_idlethread; 205 pc->pc_curpcb = pc->pc_idlethread->td_pcb; 206#ifdef VFP 207 pc->pc_cpu = cpu; 208 209 vfp_init(); 210#endif 211 212 mtx_lock_spin(&ap_boot_mtx); 213 214 atomic_add_rel_32(&smp_cpus, 1); 215 216 if (smp_cpus == mp_ncpus) { 217 /* enable IPI's, tlb shootdown, freezes etc */ 218 atomic_store_rel_int(&smp_started, 1); 219 } 220 221 mtx_unlock_spin(&ap_boot_mtx); 222 223 /* Enable ipi */ 224#ifdef IPI_IRQ_START 225 start = IPI_IRQ_START; 226#ifdef IPI_IRQ_END 227 end = IPI_IRQ_END; 228#else 229 end = IPI_IRQ_START; 230#endif 231#endif 232 233 for (int i = start; i <= end; i++) 234 arm_unmask_irq(i); 235 enable_interrupts(I32_bit); 236 237 loop_counter = 0; 238 while (smp_started == 0) { 239 DELAY(100); 240 loop_counter++; 241 if (loop_counter == 1000) 242 CTR0(KTR_SMP, "AP still wait for smp_started"); 243 } 244 /* Start per-CPU event timers. */ 245 cpu_initclocks_ap(); 246 247 CTR0(KTR_SMP, "go into scheduler"); 248 platform_mp_init_secondary(); 249 250 /* Enter the scheduler */ 251 sched_throw(NULL); 252 253 panic("scheduler returned us to %s", __func__); 254 /* NOTREACHED */ 255} 256 257static int 258ipi_handler(void *arg) 259{ 260 u_int cpu, ipi; 261 262 cpu = PCPU_GET(cpuid); 263 264 ipi = pic_ipi_get((int)arg); 265 266 while ((ipi != 0x3ff)) { 267 switch (ipi) { 268 case IPI_RENDEZVOUS: 269 CTR0(KTR_SMP, "IPI_RENDEZVOUS"); 270 smp_rendezvous_action(); 271 break; 272 273 case IPI_AST: 274 CTR0(KTR_SMP, "IPI_AST"); 275 break; 276 277 case IPI_STOP: 278 case IPI_STOP_HARD: 279 /* 280 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 281 * necessary to add it in the switch. 282 */ 283 CTR0(KTR_SMP, "IPI_STOP or IPI_STOP_HARD"); 284 285 savectx(&stoppcbs[cpu]); 286 287 /* Indicate we are stopped */ 288 CPU_SET_ATOMIC(cpu, &stopped_cpus); 289 290 /* Wait for restart */ 291 while (!CPU_ISSET(cpu, &started_cpus)) 292 cpu_spinwait(); 293 294 CPU_CLR_ATOMIC(cpu, &started_cpus); 295 CPU_CLR_ATOMIC(cpu, &stopped_cpus); 296 CTR0(KTR_SMP, "IPI_STOP (restart)"); 297 break; 298 case IPI_PREEMPT: 299 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 300 sched_preempt(curthread); 301 break; 302 case IPI_HARDCLOCK: 303 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 304 hardclockintr(); 305 break; 306 case IPI_TLB: 307 CTR1(KTR_SMP, "%s: IPI_TLB", __func__); 308 cpufuncs.cf_tlb_flushID(); 309 break; 310 default: 311 panic("Unknown IPI 0x%0x on cpu %d", ipi, curcpu); 312 } 313 314 pic_ipi_clear(ipi); 315 ipi = pic_ipi_get(-1); 316 } 317 318 return (FILTER_HANDLED); 319} 320 321static void 322release_aps(void *dummy __unused) 323{ 324 uint32_t loop_counter; 325 int start = 0, end = 0; 326 327 if (mp_ncpus == 1) 328 return; 329#ifdef IPI_IRQ_START 330 start = IPI_IRQ_START; 331#ifdef IPI_IRQ_END 332 end = IPI_IRQ_END; 333#else 334 end = IPI_IRQ_START; 335#endif 336#endif 337 338 for (int i = start; i <= end; i++) { 339 /* 340 * IPI handler 341 */ 342 /* 343 * Use 0xdeadbeef as the argument value for irq 0, 344 * if we used 0, the intr code will give the trap frame 345 * pointer instead. 346 */ 347 arm_setup_irqhandler("ipi", ipi_handler, NULL, (void *)i, i, 348 INTR_TYPE_MISC | INTR_EXCL, NULL); 349 350 /* Enable ipi */ 351 arm_unmask_irq(i); 352 } 353 atomic_store_rel_int(&aps_ready, 1); 354 355 printf("Release APs\n"); 356 357 for (loop_counter = 0; loop_counter < 2000; loop_counter++) { 358 if (smp_started) 359 return; 360 DELAY(1000); 361 } 362 printf("AP's not started\n"); 363} 364 365SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL); 366 367struct cpu_group * 368cpu_topo(void) 369{ 370 371 return (smp_topo_1level(CG_SHARE_L2, 1, 0)); 372} 373 374void 375cpu_mp_setmaxid(void) 376{ 377 378 platform_mp_setmaxid(); 379} 380 381/* Sending IPI */ 382void 383ipi_all_but_self(u_int ipi) 384{ 385 cpuset_t other_cpus; 386 387 other_cpus = all_cpus; 388 CPU_CLR(PCPU_GET(cpuid), &other_cpus); 389 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi); 390 platform_ipi_send(other_cpus, ipi); 391} 392 393void 394ipi_cpu(int cpu, u_int ipi) 395{ 396 cpuset_t cpus; 397 398 CPU_ZERO(&cpus); 399 CPU_SET(cpu, &cpus); 400 401 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi); 402 platform_ipi_send(cpus, ipi); 403} 404 405void 406ipi_selected(cpuset_t cpus, u_int ipi) 407{ 408 409 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi); 410 platform_ipi_send(cpus, ipi); 411} 412 413void 414tlb_broadcast(int ipi) 415{ 416 417 if (smp_started) 418 ipi_all_but_self(ipi); 419} 420