imx_wdogreg.h revision 294678
1/*- 2 * Copyright (c) 2012, 2013 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Oleksandr Rybalko under sponsorship 6 * from the FreeBSD Foundation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: stable/10/sys/arm/freescale/imx/imx_wdogreg.h 294678 2016-01-24 19:34:05Z ian $ 30 */ 31 32#define WDOG_CLK_FREQ 32768 33 34#define WDOG_CR_REG 0x00 /* Control Register */ 35#define WDOG_CR_WT_MASK 0xff00 /* Count of 0.5 sec */ 36#define WDOG_CR_WT_SHIFT 8 37#define WDOG_CR_WDW (1 << 7) /* Suspend WDog */ 38#define WDOG_CR_WDA (1 << 5) /* Don't touch ipp_wdog */ 39#define WDOG_CR_SRS (1 << 4) /* Don't touch sys_reset */ 40#define WDOG_CR_WDT (1 << 3) /* Assert ipp_wdog on tout */ 41#define WDOG_CR_WDE (1 << 2) /* WDog Enable */ 42#define WDOG_CR_WDBG (1 << 1) /* Suspend when DBG mode */ 43#define WDOG_CR_WDZST (1 << 0) /* Suspend when LP mode */ 44 45#define WDOG_SR_REG 0x02 /* Service Register */ 46#define WDOG_SR_STEP1 0x5555 47#define WDOG_SR_STEP2 0xaaaa 48 49#define WDOG_RSR_REG 0x04 /* Reset Status Register */ 50#define WDOG_RSR_POR (1 << 4) /* Due to Power-On Reset */ 51#define WDOG_RSR_TOUT (1 << 1) /* Due WDog timeout reset */ 52#define WDOG_RSR_SFTW (1 << 0) /* Due Soft reset */ 53 54#define WDOG_ICR_REG 0x06 /* Interrupt Control Register */ 55#define WDOG_ICR_WIE (1 << 15) /* Enable Interrupt */ 56#define WDOG_ICR_WTIS (1 << 14) /* Interrupt has occurred */ 57#define WDOG_ICR_WTCT_MASK 0x00ff 58#define WDOG_ICR_WTCT_SHIFT 0 /* Interrupt hold time */ 59 60#define WDOG_MCR_REG 0x08 /* Miscellaneous Control Register */ 61#define WDOG_MCR_PDE (1 << 0) 62 63