/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
H A D | smu_v13_0_4_ppt.c | 427 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 429 if (!clk_table || clk_type >= SMU_CLK_COUNT) 434 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) 436 *freq = clk_table->SocClocks[dpm_level]; 439 if (dpm_level >= clk_table->VcnClkLevelsEnabled) 441 *freq = clk_table->VClocks[dpm_level]; 444 if (dpm_level >= clk_table->VcnClkLevelsEnabled) 446 *freq = clk_table->DClocks[dpm_level]; 450 if (dpm_level >= clk_table->NumDfPstatesEnabled) 452 *freq = clk_table 470 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 747 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1097 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
H A D | dcn35_fpu.c | 223 * - clocks levels with passed clk_table entries from Clk Mgr as reported by PM 232 struct clk_limit_table *clk_table = &bw_params->clk_table; local 244 ASSERT(clk_table->num_entries); 247 for (i = 0; i < clk_table->num_entries; ++i) { 248 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) 249 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; 250 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) 251 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; 254 for (i = 0; i < clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | dcn31_fpu.c | 585 struct clk_limit_table *clk_table = &bw_params->clk_table; local 599 ASSERT(clk_table->num_entries); 602 for (i = 0; i < clk_table->num_entries; ++i) { 603 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) 604 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; 605 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) 606 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; 609 for (i = 0; i < clk_table->num_entries; i++) { 612 if ((unsigned int) dcn3_1_soc.clock_limits[j].dcfclk_mhz <= clk_table 662 struct clk_limit_table *clk_table = &bw_params->clk_table; local 724 struct clk_limit_table *clk_table = &bw_params->clk_table; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/core/ |
H A D | dc.c | 5008 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries; i++) { 5009 if (dc->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz > maxDPM) 5010 maxDPM = dc->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz;
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
H A D | dcn32_clk_mgr.c | 151 entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); 166 struct clk_limit_num_entries *num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entries_per_clk; 190 &clk_mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, 196 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, 203 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, 211 &clk_mgr_base->bw_params->clk_table.entries[0].dispclk_mhz, 221 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, 236 if (clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz 238 clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz 242 if (clk_mgr_base->bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
H A D | dcn315_clk_mgr.c | 255 .clk_table = { 404 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 407 bw_params->clk_table.entries[i].dcfclk_mhz; 487 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; 503 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) 504 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) 506 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; 507 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
H A D | smu_v14_0_0_ppt.c | 601 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 603 if (!clk_table || clk_type >= SMU_CLK_COUNT) 608 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) 610 *freq = clk_table->SocClocks[dpm_level]; 613 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) 615 *freq = clk_table->VClocks0[dpm_level]; 618 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) 620 *freq = clk_table->DClocks0[dpm_level]; 623 if (dpm_level >= clk_table->Vcn1ClkLevelsEnabled) 625 *freq = clk_table 655 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 743 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 863 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1020 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 1051 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1324 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 1336 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1374 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 1393 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
H A D | dcn35_clk_mgr.c | 462 .clk_table = { 591 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 594 bw_params->clk_table.entries[i].dcfclk_mhz; 711 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; 771 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) 772 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) 775 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; 776 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
H A D | dcn316_clk_mgr.c | 259 .clk_table = { 366 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 369 bw_params->clk_table.entries[i].dcfclk_mhz; 505 bw_params->clk_table.num_entries = j + 1; 516 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { 519 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk; 520 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; 521 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; 524 bw_params->clk_table.entries[i].wck_ratio = 2; 527 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
H A D | dcn32_hwseq.c | 723 clocks->dcfclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dcfclk_mhz * 1000; 724 clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000; 725 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; 726 clocks->dppclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dppclk_mhz * 1000; 727 clocks->ref_dtbclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dtbclk_mhz * 1000; 731 clocks->dispclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dispclk_mhz * 1000; 1733 dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
H A D | dcn351_fpu.c | 258 * - clocks levels with passed clk_table entries from Clk Mgr as reported by PM 267 struct clk_limit_table *clk_table = &bw_params->clk_table; local 279 ASSERT(clk_table->num_entries); 282 for (i = 0; i < clk_table->num_entries; ++i) { 283 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) 284 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; 285 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) 286 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; 289 for (i = 0; i < clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
H A D | dcn30_hwseq.c | 1170 dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | dcn32_fpu.c | 191 uint16_t min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz; 192 uint16_t min_dcfclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].dcfclk_mhz; 202 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = clk_mgr->base.bw_params->clk_table.entries[0].dcfclk_mhz; 204 if (clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz) 205 setb_min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz; 243 clk_mgr->base.bw_params->dummy_pstate_table[0].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz * 16; 245 clk_mgr->base.bw_params->dummy_pstate_table[1].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[1].memclk_mhz * 16; 247 clk_mgr->base.bw_params->dummy_pstate_table[2].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz * 16; 249 clk_mgr->base.bw_params->dummy_pstate_table[3].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[3].memclk_mhz * 16; 2420 dcfclk = dc->clk_mgr->bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
H A D | dcn30_resource.c | 2119 if (bw_params->clk_table.entries[0].memclk_mhz) { 2122 if (bw_params->clk_table.entries[i].dcfclk_mhz > dcn30_bb_max_clk.max_dcfclk_mhz) 2123 dcn30_bb_max_clk.max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; 2124 if (bw_params->clk_table.entries[i].dispclk_mhz > dcn30_bb_max_clk.max_dispclk_mhz) 2125 dcn30_bb_max_clk.max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; 2126 if (bw_params->clk_table.entries[i].dppclk_mhz > dcn30_bb_max_clk.max_dppclk_mhz) 2127 dcn30_bb_max_clk.max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; 2128 if (bw_params->clk_table.entries[i].phyclk_mhz > dcn30_bb_max_clk.max_phyclk_mhz) 2129 dcn30_bb_max_clk.max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; 2152 num_uclk_states = bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
H A D | dcn303_fpu.c | 216 if (bw_params->clk_table.entries[0].memclk_mhz) { 220 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) 221 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; 222 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) 223 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; 224 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) 225 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; 226 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) 227 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; 252 num_uclk_states = bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
H A D | rn_clk_mgr.c | 477 ranges->reader_wm_sets[num_valid_sets].min_drain_clk_mhz = bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 479 ranges->reader_wm_sets[num_valid_sets].max_drain_clk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; 576 .clk_table = { 662 bw_params->clk_table.num_entries = j + 1; 664 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { 665 bw_params->clk_table.entries[i].fclk_mhz = clock_table->FClocks[j].Freq; 666 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[j].Freq; 667 bw_params->clk_table.entries[i].voltage = clock_table->FClocks[j].Vol; 668 bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->FClocks[j].Vol); 669 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | vangogh_ppt.c | 518 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 520 if (!clk_table || clk_type >= SMU_CLK_COUNT) 525 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) 527 *freq = clk_table->SocClocks[dpm_level]; 530 if (dpm_level >= clk_table->VcnClkLevelsEnabled) 532 *freq = clk_table->VcnClocks[dpm_level].vclk; 535 if (dpm_level >= clk_table->VcnClkLevelsEnabled) 537 *freq = clk_table->VcnClocks[dpm_level].dclk; 541 if (dpm_level >= clk_table->NumDfPstatesEnabled) 543 *freq = clk_table 561 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 663 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 809 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 2155 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local [all...] |
/linux-master/drivers/clk/rockchip/ |
H A D | clk.c | 367 struct clk **clk_table; local 374 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); 375 if (!clk_table) 379 clk_table[i] = ERR_PTR(-ENOENT); 382 ctx->clk_data.clks = clk_table;
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
H A D | vg_clk_mgr.c | 409 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 412 bw_params->clk_table.entries[i].dcfclk_mhz; 493 .clk_table = { 586 bw_params->clk_table.num_entries = j + 1; 588 for (i = 0; i < bw_params->clk_table.num_entries - 1; i++, j--) { 589 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; 590 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; 591 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage; 592 bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->DfPstateTable[j].voltage); 594 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | process_pptables_v1_0.c | 313 struct phm_clock_array **clk_table, 337 *clk_table = table; 311 get_valid_clk( struct pp_hwmgr *hwmgr, struct phm_clock_array **clk_table, phm_ppt_v1_clock_voltage_dependency_table const *clk_volt_pp_table ) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | clk_mgr.h | 255 struct clk_limit_table clk_table; member in struct:clk_bw_params
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
H A D | dcn314_clk_mgr.c | 397 .clk_table = { 509 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 512 bw_params->clk_table.entries[i].dcfclk_mhz; 622 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; 663 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) 664 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) 667 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; 668 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | dcn20_fpu.c | 2286 vlevel_max = bw_params->clk_table.num_entries - 1; 2370 static struct _vcs_dpi_voltage_scaling_st construct_low_pstate_lvl(struct clk_limit_table *clk_table, unsigned int high_voltage_lvl) argument 2376 low_pstate_lvl.dcfclk_mhz = clk_table->entries[0].dcfclk_mhz; 2377 low_pstate_lvl.fabricclk_mhz = clk_table->entries[0].fclk_mhz; 2378 low_pstate_lvl.socclk_mhz = clk_table->entries[0].socclk_mhz; 2379 low_pstate_lvl.dram_speed_mts = clk_table->entries[0].memclk_mhz * 2; 2389 for (i = clk_table->num_entries; i > 1; i--) 2390 clk_table->entries[i] = clk_table->entries[i-1]; 2391 clk_table 2401 struct clk_limit_table *clk_table = &bw_params->clk_table; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
H A D | dcn31_clk_mgr.c | 337 .clk_table = { 444 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 447 bw_params->clk_table.entries[i].dcfclk_mhz; 582 bw_params->clk_table.num_entries = j + 1; 593 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { 594 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk; 595 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; 596 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; 599 bw_params->clk_table.entries[i].wck_ratio = 2; 602 bw_params->clk_table [all...] |
/linux-master/sound/soc/samsung/ |
H A D | i2s.c | 123 struct clk *clk_table[3]; member in struct:samsung_i2s_priv 814 rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC]; 1264 if (!IS_ERR(priv->clk_table[i])) 1265 clk_unregister(priv->clk_table[i]); 1313 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, 1320 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, 1330 priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, 1337 priv->clk_data.clks = priv->clk_table; 1547 priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]);
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