Lines Matching refs:clk_table

518 	DpmClocks_t *clk_table = smu->smu_table.clocks_table;
520 if (!clk_table || clk_type >= SMU_CLK_COUNT)
525 if (dpm_level >= clk_table->NumSocClkLevelsEnabled)
527 *freq = clk_table->SocClocks[dpm_level];
530 if (dpm_level >= clk_table->VcnClkLevelsEnabled)
532 *freq = clk_table->VcnClocks[dpm_level].vclk;
535 if (dpm_level >= clk_table->VcnClkLevelsEnabled)
537 *freq = clk_table->VcnClocks[dpm_level].dclk;
541 if (dpm_level >= clk_table->NumDfPstatesEnabled)
543 *freq = clk_table->DfPstateTable[dpm_level].memclk;
547 if (dpm_level >= clk_table->NumDfPstatesEnabled)
549 *freq = clk_table->DfPstateTable[dpm_level].fclk;
561 DpmClocks_t *clk_table = smu->smu_table.clocks_table;
606 count = clk_table->NumSocClkLevelsEnabled;
610 count = clk_table->VcnClkLevelsEnabled;
614 count = clk_table->VcnClkLevelsEnabled;
618 count = clk_table->NumDfPstatesEnabled;
622 count = clk_table->NumDfPstatesEnabled;
663 DpmClocks_t *clk_table = smu->smu_table.clocks_table;
709 count = clk_table->NumSocClkLevelsEnabled;
713 count = clk_table->VcnClkLevelsEnabled;
717 count = clk_table->VcnClkLevelsEnabled;
721 count = clk_table->NumDfPstatesEnabled;
725 count = clk_table->NumDfPstatesEnabled;
809 DpmClocks_t *clk_table = smu->smu_table.clocks_table;
813 *mclk_mask = clk_table->NumDfPstatesEnabled - 1;
816 *fclk_mask = clk_table->NumDfPstatesEnabled - 1;
2161 DpmClocks_t *clk_table = smu->smu_table.clocks_table;
2163 smu->gfx_default_hard_min_freq = clk_table->MinGfxClk;
2164 smu->gfx_default_soft_max_freq = clk_table->MaxGfxClk;