#
89b0f15f |
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13-Feb-2024 |
Thomas Gleixner <tglx@linutronix.de> |
x86/cpu/topology: Get rid of cpuinfo::x86_max_cores Now that __num_cores_per_package and __num_threads_per_package are available, cpuinfo::x86_max_cores and the related math all over the place can be replaced with the ready to consume data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Michael Kelley <mhklinux@outlook.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Link: https://lore.kernel.org/r/20240213210253.176147806@linutronix.de
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#
2e9b1523 |
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01-Aug-2023 |
Perry Yuan <perry.yuan@amd.com> |
drm/amdgpu: optimize RLC powerdown notification on Vangogh The smu needs to get the rlc power down message to sync the rlc state with smu, the rlc state updating message need to be sent at while smu begin suspend sequence , otherwise SMU will crash while RLC state is not notified by driver, and rlc state probally changed after that notification, so it needs to notify rlc state to smu at the end of the suspend sequence in amdgpu_device_suspend() that can make sure the rlc state is correctly set to SMU. [ 101.000590] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 101.000598] amdgpu 0000:03:00.0: amdgpu: Failed to disable gfxoff! [ 110.838026] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 110.838035] amdgpu 0000:03:00.0: amdgpu: Failed to disable smu features. [ 110.838039] amdgpu 0000:03:00.0: amdgpu: Fail to disable dpm features! [ 110.838040] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62 [ 110.884394] PM: suspend of devices aborted after 21213.620 msecs [ 110.884402] PM: start suspend of devices aborted after 21213.882 msecs [ 110.884405] PM: Some devices failed to suspend, or early wake event detected Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8c4e9105 |
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01-Aug-2023 |
Perry Yuan <perry.yuan@amd.com> |
drm/amdgpu: optimize RLC powerdown notification on Vangogh The smu needs to get the rlc power down message to sync the rlc state with smu, the rlc state updating message need to be sent at while smu begin suspend sequence , otherwise SMU will crash while RLC state is not notified by driver, and rlc state probally changed after that notification, so it needs to notify rlc state to smu at the end of the suspend sequence in amdgpu_device_suspend() that can make sure the rlc state is correctly set to SMU. [ 101.000590] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 101.000598] amdgpu 0000:03:00.0: amdgpu: Failed to disable gfxoff! [ 110.838026] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 110.838035] amdgpu 0000:03:00.0: amdgpu: Failed to disable smu features. [ 110.838039] amdgpu 0000:03:00.0: amdgpu: Fail to disable dpm features! [ 110.838040] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62 [ 110.884394] PM: suspend of devices aborted after 21213.620 msecs [ 110.884402] PM: start suspend of devices aborted after 21213.882 msecs [ 110.884405] PM: Some devices failed to suspend, or early wake event detected Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
908cebc9 |
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30-Oct-2023 |
Li Ma <li.ma@amd.com> |
drm/amd/swsmu: remove fw version check in sw_init. dorp fw version check and using max table size to init table. Signed-off-by: Li Ma <li.ma@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
19589468 |
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11-Oct-2023 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amd/pm: Support for getting power1_cap_min value Support for getting power1_cap_min value on smu13 and smu11. For other Asics, we still use 0 as the default value. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
710d9cae |
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10-Oct-2023 |
Yifan Zhang <yifan1.zhang@amd.com> |
drm/amd/pm: drop most smu_cmn_get_smc_version in smu smu_check_fw_version is called in smu hw init, thus smu if version and version are garenteed to be stored in smu context. No need to call smu_cmn_get_smc_version again after system boot up. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
102b80f6 |
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10-Aug-2023 |
Kun Liu <Kun.Liu2@amd.com> |
drm/amd/pm: Vangogh: Get average_* from average field of gpu_metrics_table for older BIOS, smu won't fill average field of gpu_metrics_table, so we acquire average_* from current field. but now average value is available in gpu_metrics_v2_4 Signed-off-by: Kun Liu <Kun.Liu2@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9366c2e8 |
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10-Aug-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Rename AMDGPU_PP_SENSOR_GPU_POWER Use the clearer name `AMDGPU_PP_SENSOR_GPU_AVG_POWER` instead. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
47f1724d |
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10-Aug-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Introduce `AMDGPU_PP_SENSOR_GPU_INPUT_POWER` Some GPUs have been overloading average power values and input power values. To disambiguate these, introduce a new `AMDGPU_PP_SENSOR_GPU_INPUT_POWER` and the GPUs that share input power update to use this instead of average power. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2746 Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
41cec40b |
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30-May-2023 |
Wenyou Yang <WenYou.Yang@amd.com> |
drm/amd/pm: Vangogh: Add new gpu_metrics_v2_4 to acquire gpu_metrics To acquire the voltage and current info from gpu_metrics interface, but gpu_metrics_v2_3 doesn't contain them, and to be backward compatible, add new gpu_metrics_v2_4 structure. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Wenyou Yang <WenYou.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
63b9acdf |
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20-May-2023 |
Tim Huang <Tim.Huang@amd.com> |
drm/amd/pm: reverse mclk and fclk clocks levels for vangogh This patch reverses the DPM clocks levels output of pp_dpm_mclk and pp_dpm_fclk. On dGPUs and older APUs we expose the levels from lowest clocks to highest clocks. But for some APUs, the clocks levels that from the DFPstateTable are given the reversed orders by PMFW. Like the memory DPM clocks that are exposed by pp_dpm_mclk. It's not intuitive that they are reversed on these APUs. All tools and software that talks to the driver then has to know different ways to interpret the data depending on the asic. So we need to reverse them to expose the clocks levels from the driver consistently. Signed-off-by: Tim Huang <Tim.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bfc03568 |
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20-May-2023 |
Tim Huang <Tim.Huang@amd.com> |
drm/amd/pm: reverse mclk and fclk clocks levels for vangogh This patch reverses the DPM clocks levels output of pp_dpm_mclk and pp_dpm_fclk. On dGPUs and older APUs we expose the levels from lowest clocks to highest clocks. But for some APUs, the clocks levels that from the DFPstateTable are given the reversed orders by PMFW. Like the memory DPM clocks that are exposed by pp_dpm_mclk. It's not intuitive that they are reversed on these APUs. All tools and software that talks to the driver then has to know different ways to interpret the data depending on the asic. So we need to reverse them to expose the clocks levels from the driver consistently. Signed-off-by: Tim Huang <Tim.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
63d99a34 |
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17-Mar-2023 |
Lee Jones <lee@kernel.org> |
drm/amd/pm/swsmu/smu11/vangogh_ppt: Provide a couple of missing parameter descriptions Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:2381: warning: Function parameter or member 'residency' not described in 'vangogh_get_gfxoff_residency' drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:2399: warning: Function parameter or member 'entrycount' not described in 'vangogh_get_gfxoff_entrycount' Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: David Airlie <airlied@gmail.com> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Li Ma <li.ma@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dc622367 |
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16-Feb-2023 |
Perry Yuan <perry.yuan@amd.com> |
drm/amdgpu: map new capped and uncapped mode power profiles for Vangogh Capped and Uncapped workload types are supported, each workload type has different performance thresholds and pstate conditions. * capped mode is used by power centric workload * uncapped mode is used by perf centric workload Acked-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aea9040c |
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28-Feb-2023 |
Kun Liu <Kun.Liu2@amd.com> |
drm/amdgpu: fix no previous prototype warning add static prefix for vangogh_set_apu_thermal_limit function Signed-off-by: Kun Liu <Kun.Liu2@amd.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202303010827.c2N0yBGT-lkp@intel.com Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0c3c9936 |
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21-Feb-2023 |
Kun Liu <Kun.Liu2@amd.com> |
drm/amdgpu: added a sysfs interface for thermal throttling implement apu_thermal_cap r/w callback for vangogh Signed-off-by: Kun Liu <Kun.Liu2@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0d6516ef |
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05-Sep-2022 |
Li Ma <li.ma@amd.com> |
drm/amd/pm:add new gpu_metrics_v2_3 to acquire average temperature info Add new gpu_metrics_v2_3 to acquire average temperature info from SMU metrics. To acquire average temp info from gpu_metrics interface, but gpu_metrics_v2_2 only has members to show current temp info. --- v1: Only add average_temperature_gfx in gpu_metrics_v2_3. v2: Add average temp members for soc, core and l3 in gpu_metrics_v2_3 and put these new members at the end of gpu_metrics_v2_3. Add operation to read average temp info from metrics table. v3: Merge v1 and v2 and rename the patch. v4: Merge v3. Add firmware version judgment in vangogh_common_get_gpu_metrics to maintain backward compatibility and rename the patch. "return ret" on error scenario in smu_cmn_get_smc_version. Signed-off-by: Li Ma <li.ma@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1ed5a845 |
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10-Aug-2022 |
André Almeida <andrealmeid@igalia.com> |
drm/amd/pm: Implement GFXOFF's entry count and residency for vangogh Implement functions to get and set GFXOFF's entry count and residency for vangogh. Signed-off-by: André Almeida <andrealmeid@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
43195162 |
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11-Jul-2022 |
André Almeida <andrealmeid@igalia.com> |
drm/amd/pm: Implement get GFXOFF status for vangogh Implement function to get current GFXOFF status for vangogh. Signed-off-by: André Almeida <andrealmeid@igalia.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
da1db031 |
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26-May-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/swsmu: add SMU mailbox registers in SMU context So we can eventaully use them in the common smu code for accessing the SMU mailboxes without needing a lot of per asic logic in the common code. Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
91aa9c8f |
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24-Jan-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/smu11.5: restore cclks in vangogh_set_performance_level When we disable manual clock setting, we need to restore the cclks as well as the gfxclk. Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3c6591e9 |
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08-Dec-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop the cache for enabled ppfeatures The following scenarios make the driver cache for enabled ppfeatures outdated and invalid: - Other tools interact with PMFW to change the enabled ppfeatures. - PMFW may enable/disable some features behind driver's back. E.g. for sienna_cichild, on gfxoff entering, PMFW will disable gfx related DPM features. All those are performed without driver's notice. Also considering driver does not actually interact with PMFW such frequently, the benefit brought by such cache is very limited. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7ade3ca9 |
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07-Dec-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the usage for 'supported' member of smu_feature structure The supported features should be retrieved just after EnableAllDpmFeatures message complete. And the check(whether some dpm feature is supported) is only needed when we decide to enable or disable it. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2d282665 |
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07-Dec-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: update the data type for retrieving enabled ppfeatures Use uint64_t instead of an array of uint32_t. This can avoid some non-necessary intermediate uint32_t -> uint64_t conversions. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5af779ad |
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07-Dec-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: unify the interface for retrieving enabled ppfeatures Instead of having two which do the same thing. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
56383e8f |
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28-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop unneeded smu->sensor_lock As all those related APIs are already well protected by adev->pm.mutex and smu->message_lock. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
da11407f |
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28-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop unneeded smu->metrics_lock As all those related APIs are already well protected by adev->pm.mutex and smu->message_lock. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
94a80b5b |
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23-Nov-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: Modify implmentations of get_power_profile_mode to use amdgpu_pp_profile_name After modifying navi10 in previous commit, extend the changes so all implementations of pp_hwmgr_func->get_power_profile_mode and pptable_funcs->get_power_profile_mode use amdgpu_pp_profile_name == Test == LOGFILE=pp_profile_strings.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_power_profile_mode " for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
48c19a95 |
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28-Oct-2021 |
Perry Yuan <Perry.Yuan@amd.com> |
drm/amd/pm: add GFXCLK/SCLK clocks level print support for APUs add support that allow the userspace tool like RGP to get the GFX clock value at runtime, the fix follow the old way to show the min/current/max clocks level for compatible consideration. === Test === $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz * 1: 1100Mhz 2: 1600Mhz then run stress test on one APU system. $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz 1: 1040Mhz * 2: 1600Mhz The current GFXCLK value is updated at runtime. BugLink: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5260 Reviewed-by: Huang Ray <Ray.Huang@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3dac776e |
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28-Oct-2021 |
Perry Yuan <Perry.Yuan@amd.com> |
drm/amd/pm: add GFXCLK/SCLK clocks level print support for APUs add support that allow the userspace tool like RGP to get the GFX clock value at runtime, the fix follow the old way to show the min/current/max clocks level for compatible consideration. === Test === $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz * 1: 1100Mhz 2: 1600Mhz then run stress test on one APU system. $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz 1: 1040Mhz * 2: 1600Mhz The current GFXCLK value is updated at runtime. BugLink: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5260 Reviewed-by: Huang Ray <Ray.Huang@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
68e3871d |
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04-Oct-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/pm: properly handle sclk for profiling modes on vangogh When selecting between levels in the force performance levels interface sclk (gfxclk) was not set correctly for all levels. Select the proper sclk settings for all levels. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1726 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2d1ac1cb |
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18-Aug-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: (v2) add limit_type to (pptable_funcs)->set_power_limit signature v2 add check for SMU_DEFAULT_PPT_LIMIT v1 modify (pptable_funcs)->set_power_limit signature modify smu11 set_power_limit signature (arcturus, navi10, sienna_cichlid) modify smu13 set_power_limit signature (aldabaran) modify vangogh_set_power_limit signature (vangogh) === Test === sudo bash AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} LOGFILE=pp_show_power_cap.log cp $LOGFILE{,.old} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES=" power1_cap power2_cap" for f in $FILES do if test -f "$HWMON_DIR/$f"; then echo === $f === >> $LOGFILE cat $HWMON_DIR/$f >> $LOGFILE RESTORE_VALUE=`cat $HWMON_DIR/$f` 2>&1 >> $LOGFILE echo RESTORE_VALUE $RESTORE_VALUE >> $LOGFILE echo 120000000 > $HWMON_DIR/$f sleep 3 cat $HWMON_DIR/$f >> $LOGFILE echo $RESTORE_VALUE > $HWMON_DIR/$f sleep 3 cat $HWMON_DIR/$f >> $LOGFILE else echo === $f === >> $LOGFILE echo File Not Found >> $LOGFILE fi done cat $LOGFILE Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ee121f7e |
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07-Sep-2021 |
Lang Yu <lang.yu@amd.com> |
drm/amdgpu: fix sysfs_emit/sysfs_emit_at warnings(v2) sysfs_emit and sysfs_emit_at requrie a page boundary aligned buf address. Make them happy! v2: use an inline function. Warning Log: [ 492.545174] invalid sysfs_emit_at: buf:00000000f19bdfde at:0 [ 492.546416] WARNING: CPU: 7 PID: 1304 at fs/sysfs/file.c:765 sysfs_emit_at+0x4a/0xa0 [ 492.654805] Call Trace: [ 492.655353] ? smu_cmn_get_metrics_table+0x40/0x50 [amdgpu] [ 492.656780] vangogh_print_clk_levels+0x369/0x410 [amdgpu] [ 492.658245] vangogh_common_print_clk_levels+0x77/0x80 [amdgpu] [ 492.659733] ? preempt_schedule_common+0x18/0x30 [ 492.660713] smu_print_ppclk_levels+0x65/0x90 [amdgpu] [ 492.662107] amdgpu_get_pp_od_clk_voltage+0x13d/0x190 [amdgpu] [ 492.663620] dev_attr_show+0x1d/0x40 Signed-off-by: Lang Yu <lang.yu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8f48ba30 |
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07-Sep-2021 |
Lang Yu <lang.yu@amd.com> |
drm/amdgpu: fix sysfs_emit/sysfs_emit_at warnings(v2) sysfs_emit and sysfs_emit_at requrie a page boundary aligned buf address. Make them happy! v2: use an inline function. Warning Log: [ 492.545174] invalid sysfs_emit_at: buf:00000000f19bdfde at:0 [ 492.546416] WARNING: CPU: 7 PID: 1304 at fs/sysfs/file.c:765 sysfs_emit_at+0x4a/0xa0 [ 492.654805] Call Trace: [ 492.655353] ? smu_cmn_get_metrics_table+0x40/0x50 [amdgpu] [ 492.656780] vangogh_print_clk_levels+0x369/0x410 [amdgpu] [ 492.658245] vangogh_common_print_clk_levels+0x77/0x80 [amdgpu] [ 492.659733] ? preempt_schedule_common+0x18/0x30 [ 492.660713] smu_print_ppclk_levels+0x65/0x90 [amdgpu] [ 492.662107] amdgpu_get_pp_od_clk_voltage+0x13d/0x190 [amdgpu] [ 492.663620] dev_attr_show+0x1d/0x40 Signed-off-by: Lang Yu <lang.yu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f5d8e164 |
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27-Aug-2021 |
Colin Ian King <colin.king@canonical.com> |
drm/amdgpu/swsmu: fix spelling mistake "minimun" -> "minimum" There are three identical spelling mistakes in dev_err messages. Fix these. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fe14c285 |
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30-Jun-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: Replace smu11 usage of sprintf with sysfs_emit modification of smu11 files arcturus_ppt.c sienna_cichlid_ppt.c vangogh_ppt.c === Test === AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} LOGFILE=pp_printf.test.log lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_dpm_sclk pp_power_profile_mode " for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a5467ebd |
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05-Aug-2021 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
drm/amd/pm: Fix a memory leak in an error handling path in 'vangogh_tables_init()' 'watermarks_table' must be freed instead 'clocks_table', because 'clocks_table' is known to be NULL at this point and 'watermarks_table' is never freed if the last kzalloc fails. Fixes: c98ee89736b8 ("drm/amd/pm: add the fine grain tuning function for vangogh") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5126da7d |
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05-Aug-2021 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
drm/amd/pm: Fix a memory leak in an error handling path in 'vangogh_tables_init()' 'watermarks_table' must be freed instead 'clocks_table', because 'clocks_table' is known to be NULL at this point and 'watermarks_table' is never freed if the last kzalloc fails. Fixes: c98ee89736b8 ("drm/amd/pm: add the fine grain tuning function for vangogh") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
488f211d |
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18-May-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the power limits reporting on OOB supported As OOB(out-of-band) interface may be used to update the power limits. Thus to make sure the power limits reporting of our driver always reflects the correct values, the internal cache must be aligned carefully. V2: add support for out-of-band of other ASICs align cached current power limit with OOB imposed Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-By: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7cab3cff |
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08-Jun-2021 |
Graham Sider <Graham.Sider@amd.com> |
drm/amd/pm: Add vangogh throttler translation Perform dependent to independent throttle status translation for vangogh. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a99a5116 |
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14-Apr-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: revise two names of sensor values for vangogh This patch is to revise two names of sensor values for vangogh. New smu metrics table is supported by new pmfw (from version 4.63.36.00 ), it includes two parts, one part is the current smu metrics table data and the other part is the average smu metrics table data. The hwmon will read the current gfxclk and mclk from the current smu metrics table data. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3ef9d1e0 |
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13-Apr-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: remove the "set" function of pp_dpm_mclk for vangogh This patch is to remove the "set" function of pp_dpm_mclk for vangogh. For vangogh, mclk bonds with fclk, they will lock each other on the same perfomance level. But according to the smu message from pmfw, only fclk is allowed to set value manually, so remove the unnecessary code of "set" function for mclk. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
86c8236e |
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09-Apr-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add support for new smu metrics table for vangogh This patch is to add support for new smu metrics table for vangogh. It will support new and legacy smu metrics table in the meanwhile. New pmfw version is 4.63.36.00, and new smu interface version is #3. v1: check smu pmfw version to determine to use new or legacy smu metrics table v2: check smu interface version to determine to use new or legacy smu metrics table v3: revise wrong symbol Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3495d3c3 |
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07-Apr-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add the callback to get vbios bootup values for vangogh This patch is to add the callback to get vbios bootup values for vangogh, it will get the bootup values of gfxclk, mclk, socclk and so on. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1c0f0430 |
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26-Mar-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vangogh: don't check for dpm in is_dpm_running when in suspend Do the same thing we do for Renoir. We can check, but since the sbios has started DPM, it will always return true which causes the driver to skip some of the SMU init when it shouldn't. Reviewed-by: Zhan Liu <zhan.liu@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6e58941c |
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11-Mar-2021 |
Eric Huang <jinhuieric.huang@amd.com> |
drm/amd/pm: add a new sysfs entry for default power limit Driver doesn't keep the default bootup power limit and expose it to user. As requested we add it in driver. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
152bb95c |
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28-Feb-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: update existing gpu_metrics interfaces V2 Update the gpu_metrics interface implementations to use the latest upgraded data structures. V2: fit the data type change of energy_accumulator Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
183b451d |
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02-Mar-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: correct the name of one function for vangogh This patch is to correct the name of one function for vangogh. This function is used to print the clock levels of all kinds of IP components. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5b2e2c09 |
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24-Feb-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disable Per discussions with PMFW team, the driver only needs to notify the PMFW when the RLC is disabled. The RLC FW will notify the PMFW directly when it's enabled. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9d489afd |
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23-Feb-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/pm: make unsupported power profile messages debug Making them an error confuses users and the errors are harmless as not all asics support all profiles. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1488 Acked-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ca1203d7 |
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09-Feb-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amd/pm: do not issue message while write "r" into pp_od_clk_voltage We should commit the value after restore them back to default as well. $ echo "r" > pp_od_clk_voltage $ echo "c" > pp_od_clk_voltage Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ce7c670d |
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09-Feb-2021 |
Colin Ian King <colin.king@canonical.com> |
drm/amd/pm: fix spelling mistake in various messages "power_dpm_force_perfomance_level" There are spelling mistakes in error and warning messages, the text power_dpm_force_perfomance_level is missing a letter r and should be power_dpm_force_performance_level. Fix them. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6951c3e4 |
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26-Mar-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vangogh: don't check for dpm in is_dpm_running when in suspend Do the same thing we do for Renoir. We can check, but since the sbios has started DPM, it will always return true which causes the driver to skip some of the SMU init when it shouldn't. Reviewed-by: Zhan Liu <zhan.liu@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
992ace41 |
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24-Feb-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disable Per discussions with PMFW team, the driver only needs to notify the PMFW when the RLC is disabled. The RLC FW will notify the PMFW directly when it's enabled. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e3746696 |
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23-Feb-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/pm: make unsupported power profile messages debug Making them an error confuses users and the errors are harmless as not all asics support all profiles. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1488 Acked-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d7ef887f |
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19-Jan-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: make the error log more clear for fine grain tuning function This patch is to make the error log more clear for fine grain tuning function, it covers Raven/Raven2/Picasso/Renoir/Vangogh. The fine grain tuning function uses the sysfs file -- pp_od_clk_voltage, but only when another sysfs file -- power_dpm_force_performance_level is switched to "manual" mode, it is allowed to access "pp_od_clk_voltage". Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ae07970a |
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25-Jan-2021 |
Xiaomeng Hou <Xiaomeng.Hou@amd.com> |
drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangogh Implement hwmon API for reading/setting slow and fast PPT limit. APU power is managed to system-level requirements through the PPT (package power tracking) feature. PPT is intended to limit power to the requirements of the power source and could be dynamically updated to maximize APU performance within the system power budget. Here FAST_PPT_LIMIT manages the ~10 ms moving average of APU power, while SLOW_PPT_LIMIT manages the configurable, thermally significant moving average of APU power (default ~5000 ms). User could read slow/fast ppt limit using command "cat power*_cap" or "sensors" in the hwmon device directory. User could adjust values of slow/fast ppt limit as needed depending on workloads through command "echo ## > power*_cap". Example: $ echo 15000000 > power1_cap $ echo 18000000 > power2_cap $ sensors amdgpu-pci-0300 Adapter: PCI adapter slowPPT: 9.04W (cap = 15.00 W) fastPPT: 9.04W (cap = 18.00 W) v2: align with existing interfaces for the getting/setting of PPT limits. Encode the upper 8 bits of limit value to distinguish slow and fast power limit type. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
de4b7cd8 |
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03-Feb-2021 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amd/pm/swsmu: unify the init soft gpu metrics function the soft gpu metrics is not asic related data structure. unify them to reduce duplicate code. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bb377feb |
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02-Feb-2021 |
Jinzhou Su <Jinzhou.Su@amd.com> |
drm/amd/pm: Disable GFXOFF when GFX DPM or PG disabled Check GFX DPM and PG bit before enable GFXOFF on Vangogh smu post init. Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c9021a6e |
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01-Feb-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: fill in the data member of v2 gpu metrics table for vangogh This patch is to fill in the data member of v2 gpu metrics table for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9f0837e0 |
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13-Jan-2021 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amd/pm: remove unused message SMU_MSG_SpareX the SpareX is reserved by SMU firmware, the driver is never use it. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4aef0ebc |
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15-Jan-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: fix build error without x86 kconfig (v2) This patch is to fix below build error while we are using the kconfig without x86. drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function 'vangogh_get_smu_metrics_data': drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:300:10: error: 'boot_cpu_data' undeclared (first use in this function); did you mean 'boot_cpuid'? 300 | boot_cpu_data.x86_max_cores * sizeof(uint16_t)); | ^~~~~~~~~~~~~ | boot_cpuid drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function 'vangogh_read_sensor': drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:1320:11: error: 'boot_cpu_data' undeclared (first use in this function); did you mean 'boot_cpuid'? 1320 | *size = boot_cpu_data.x86_max_cores * sizeof(uint16_t); | ^~~~~~~~~~~~~ | boot_cpuid drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function 'vangogh_od_edit_dpm_table': drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:1460:19: error: 'boot_cpu_data' undeclared (first use in this function); did you mean 'boot_cpuid'? 1460 | if (input[0] >= boot_cpu_data.x86_max_cores) { | ^~~~~~~~~~~~~ | boot_cpuid v2: fix #ifdef and add comment for APU only Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d7379efa |
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13-Jan-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: modify the fine grain tuning function for vangogh This patch is to modify the fine grain tuning function for vangogh. This patch uses the existing old flag to make the two sysfs files work separately -- "power_dpm_force_performance_level" and "pp_od_clk_voltage". Only the power_dpm_force_performance_level is switched to "manual" mode, the fine grain tuning function will be started. In other mode, including "high","low","min_sclk","min_mclk", "standard" and "peak", the fine grain tuning function will be shut down, and the frequency range of gfx and cpu clock will be restored the default values. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8f8150fa |
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12-Jan-2021 |
Souptick Joarder <jrdr.linux@gmail.com> |
drm: amdgpu: pm: Mark vangogh_clk_dpm_is_enabled() as static kernel test robot throws below warnings -> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:594:6: warning: no previous prototype for 'vangogh_clk_dpm_is_enabled' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:594:6: warning: no previous prototype for function 'vangogh_clk_dpm_is_enabled' [-Wmissing-prototypes] Mark vangogh_clk_dpm_is_enabled() as static. Reviewed-by: Huang Rui <ray.huang@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0d90d0dd |
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08-Jan-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amd/pm: implement processor fine grain feature for vangogh (v3) This patch is to implement the processor fine grain feature for vangogh. It's similar with gfx clock, the only difference is below: echo "p core_id level value" > pp_od_clk_voltage 1. "p" - set the cclk (processor) frequency 2. "core_id" - 0/1/2/3, represents which cpu core you want to select 2. "level" - 0 or 1, "0" represents the min value, "1" represents the max value 3. "value" - the target value of cclk frequency, it should be limited in the safe range v2: fix some missing changes as Evan's suggestion. v3: add version check and fix the restore. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
517cb957 |
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07-Jan-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amd/pm: implement the processor clocks which read by metric The core processor clocks will be stored in smu metric table, then we add this runtime information into amdgpu_pm_info interface. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ec3b35c8 |
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12-Jan-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add the workload map for vangogh This patch is to add the workload map for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f727ebeb |
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12-Jan-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: support the function to change power profile mode for vangogh This patch is to support the function to change power profile mode for vangogh. Vangogh supports 5 kinds of power profile mode: "FULL SCREEN 3D", "VIDEO", "VR", "COMPUTE" and "CUSTOM". Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3313ef18 |
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11-Jan-2021 |
Jinzhou Su <Jinzhou.Su@amd.com> |
drm/amd/pm: Enable GfxOff for Vangogh Add Enable gfxoff for Vangogh during smu_post_init. System will not enter GfxOff without allow message. Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b58ce1fe |
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11-Jan-2021 |
Jinzhou Su <Jinzhou.Su@amd.com> |
drm/amd/pm: Add GFXOFF interface for Vangogh Steps to enter gfxoff mode on Vangogh 1. Send EnableGfxOff message to SMU 2. Send AllowGfxOff message to SMU Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
74353883 |
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02-Dec-2020 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: revise the mode2 reset for vangogh PCIE MMIO bar needs to be restored firstly after the reset event triggers. So it's unable to access the registers to wait for response from SMU. Becasue the value of mmMP1_SMN_C2PMSG_90 is invalid at that moment. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
20e157c7 |
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25-Nov-2020 |
Alex Deucher <alexdeucher@gmail.com> |
drm/amdgpu: add mode2 reset support for vangogh GPU reset is handled via SMU similar to previous APUs. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com>
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#
aedebd40 |
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07-Jan-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amd/pm: initial feature_enabled/feature_support bitmap for vangogh VanGogh supports feature mask checking which exposed by smu firmware. It has to initial at first, otherwise, all SMU_FEATURE_xxx masks are invalid. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4dac9f20 |
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07-Jan-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amd/pm: clean up get_allowed_feature_mask function The get_allowed_feature_mask is superfluous on vangogh. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1acc0802 |
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07-Jan-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amd/pm: remove vcn/jpeg powergating feature checking for vangogh VCN/JPEG PG won't be a feature mask bit which exposed by vangogh smu firmware. So remove it. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2a38ca99 |
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11-Jan-2021 |
Colin Ian King <colin.king@canonical.com> |
drm/amdgpu: Add missing BOOTUP_DEFAULT to profile_name[] A recent change added a new BOOTUP_DEFAULT power profile mode to the PP_SMC_POWER_PROFILE enum but omitted updating the corresponding profile_name array. Fix this by adding in the missing BOOTUP_DEFAULT to profile_name[]. Addresses-Coverity: ("Out-of-bounds read") Fixes: c27c9778a19e ("drm/amd/powerplay: support BOOTUP_DEFAULT power profile mode") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
307f049b |
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06-Jan-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add the parameters of power profiles for vangogh This pacth is to add the parameters of power profiles for vangogh, includeing "profile_peak", "profile_standard", "profile_min_sclk", "profile_min_mclk". Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b0eec124 |
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31-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: enable dclk/vclk dpm function in "auto" power profile for vangogh This patch is to enable dclk/vclk dpm function in "auto" power profile for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ea173d15 |
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24-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add support to umd P-state function for vangogh This patch is to add support to umd P-state function for vangogh. It enables the "set" function of 3 sysfs nodes: pp_dpm_mclk, pp_dpm_fclk, pp_dpm_socclk, the functions is used to set the DPM frequency level of memclk/fclk/socclk. Due to only after enabling the "power_dpm_force_performance_level" sysfs node, it is allowed to set these three nodes, so this patch also enables the "powe_dpm_force_performance_level" sysfs node, which is used to change power profile. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dd9e0b21 |
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24-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add some basic functions to support umd P-state function for vangogh. This patch is to add some basic functions to support umd P-state function for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d0e4e112 |
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24-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add some basic functions to support umd P-state function for vangogh. This patch is to add some basic functions to support umd P-state function for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f02c7336 |
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24-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: enable the "fetch" function of pp_dpm_vclk/dclk for vangogh This patch is to enable the "fetch" function of pp_dpm_vclk and pp_dpm_dclk. It allows to fetch the current frequency of vcn and dcn and their DPM levels for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
54800b58 |
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15-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add new feature map macros to resolve duplicate name This patch is to add new feature map macros to resolve duplicate name. Vangogh uses one different format to name some feature bits of swSMU, it causes some duplicate name in the existing feature map list. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ae7b32e7 |
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15-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add support to umd P-state "fetch" function for vangogh This patch is to add supoort to umd P-state function for vangogh. It enables the "fetch" function of 3 sysfs nodes: pp_dpm_mclk, pp_dpm_fclk, pp_dpm_socclk,the function is used to fetch the current frequency of memclk/fclk/socclk. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
23289a22 |
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14-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: correct the sensor value of power for vangogh This patch is to correct the sensor value of power for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
eefdf047 |
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17-Dec-2020 |
Jinzhou Su <Jinzhou.Su@amd.com> |
drm/amd/pm: Add interface for request WGPs When user specifies a reduced WGP(CU) config via disalbe_cu module parameter, this does not disable the clocks which uses additional power. This interface send active WGP number to SMU and SMU will cooperate with RLC to power off relative WGPs. v2: Add request active WGPs in Vangogh smu post init. Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
53a5a272 |
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01-Feb-2021 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: fill in the data member of v2 gpu metrics table for vangogh This patch is to fill in the data member of v2 gpu metrics table for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0e61f09a |
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14-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: correct the sensor value of power for vangogh This patch is to correct the sensor value of power for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9e3a6ab7 |
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16-Dec-2020 |
Xiaomeng Hou <Xiaomeng.Hou@amd.com> |
drm/amd/pm: check pmfw version before issuing RlcPowerNotify message Only pmfw version behind v4.63.23.00 could support this message. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a0f55287 |
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01-Dec-2020 |
Xiaomeng Hou <Xiaomeng.Hou@amd.com> |
drm/amd/pm: inform SMU RLC status thus enable/disable DPM feature for vangogh RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFW is unaware of RLC being halted and will continue sending messages, which would eventually cause an ACPI hang. Use the system_feature_control interface to notify SMU the status of RLC (Normal/OFF) thus enable/disable DPM feature. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lazar Lijo <Lijo.Lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8c901781 |
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08-Dec-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: remove one unsupported smu function for vangogh This patch is to remove one unsupported smu function, this function will set the smu feature mask to disable all smu features in exception. Because vangogh doesn't support to set the smu feature mask by driver software, so this function is invalid for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2139d12b |
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01-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/swsmu/vangogh: use metrics table for voltages (v2) Fixes voltage reading for vddgfx and adds support for vddsoc. v2: use new voltage enum Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6cc24d8d |
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01-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/swsmu/vangogh: simplify sensor handling Just query the metrics table directly rather than going through an extra level of functions. Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b4339bb9 |
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30-Nov-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/swsmu/vangogh: return error if fetching metrics fails rather than just dropping the error. Also fixes a set but not used variable warning. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fce8a4ac |
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18-Nov-2020 |
Jinzhou Su <Jinzhou.Su@amd.com> |
drm/amdgpu: Add gfx doorbell setting for Vangogh Using KIQ to map GFX queues instead of MMIO for gfx async ring, add missing doorbell range setting. v2: fix typo Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
17863170 |
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17-Nov-2020 |
Colin Ian King <colin.king@canonical.com> |
drm/amd/pm: fix spelling mistakes in dev_warn messages There are two spelling mistakes in dev_warn messages. Fix these. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c98ee897 |
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12-Nov-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add the fine grain tuning function for vangogh This patch is to add the fine grain tuning function for vangogh. This function uses the pp_od_clk_voltage sysfs file to configure the min and max value of gfx clock frequency or restore the default value. Command guide: echo "s level value" > pp_od_clk_voltage "s" - set the sclk frequency "level" - 0 or 1, "0" represents the min value, "1" represents the max value "value" - the target value of sclk frequency, it should be limited in the safe range echo "r" > pp_od_clk_voltage "r" - reset the sclk frequency, restore the default value instantly echo "c" > pp_od_clk_voltage "c" - commit the min and max value of sclk frequency to the system only after the commit command, the setting target values by "s" command will take effect. Example: 1)check the default sclk frequency $ cat pp_od_clk_voltage OD_SCLK: 0: 200Mhz 1: 1400Mhz OD_RANGE: SCLK: 200MHz 1400MHz 2)use "s" -- set command to configure the min or max sclk frequency $ echo "s 0 600" > pp_od_clk_voltage $ echo "s 1 1000" > pp_od_clk_voltage $ echo "c" > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 600Mhz 1: 1000Mhz OD_RANGE: SCLK: 200MHz 1400MHz 3)use "r" -- reset command to restore the min and max sclk frequency $ echo "r" > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 200Mhz 1: 1400Mhz OD_RANGE: SCLK: 200MHz 1400MHz Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fd253334 |
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03-Nov-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add the interface to dump smu metrics table for vangogh This patch is to add the interface to dump smu metrics table for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
271ab489 |
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26-Oct-2020 |
Xiaojian Du <Xiaojian.Du@amd.com> |
drm/amd/pm: add some swSMU functions for vangogh. This patch is to add some swSMU functions for vangogh, to support the sensor info on "hwmon" and pm info. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f46a221b |
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27-Aug-2020 |
Xiaojian Du <xiaojian.du@amd.com> |
drm/amdgpu/powerplay: add smu initialize funcitons for vangogh (v4) This patch is to add smu initialize functions for vangogh. v2: squash in updates v3: drop duplicate table entries v4: rebase fixes Signed-off-by: Xiaojian Du <xiaojian.du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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