Searched refs:bank (Results 1 - 25 of 367) sorted by relevance

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/linux-master/drivers/gpio/
H A Dgpio-omap.c78 void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
84 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
109 static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, argument
112 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction,
118 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, argument
121 void __iomem *reg = bank
136 omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset, int enable) argument
143 omap_gpio_dbck_enable(struct gpio_bank *bank) argument
154 omap_gpio_dbck_disable(struct gpio_bank *bank) argument
181 omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, unsigned debounce) argument
233 omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned offset) argument
263 omap_gpio_is_off_wakeup_capable(struct gpio_bank *bank, u32 gpio_mask) argument
273 omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, unsigned trigger) argument
325 omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) argument
334 omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, unsigned trigger) argument
374 omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset) argument
395 omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) argument
409 omap_gpio_is_input(struct gpio_bank *bank, unsigned offset) argument
416 omap_gpio_init_irq(struct gpio_bank *bank, unsigned offset) argument
427 struct gpio_bank *bank = omap_irq_data_get_bank(d); local
470 omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) argument
487 omap_clear_gpio_irqstatus(struct gpio_bank *bank, unsigned offset) argument
493 omap_get_gpio_irqbank_mask(struct gpio_bank *bank) argument
507 omap_set_gpio_irqenable(struct gpio_bank *bank, unsigned offset, int enable) argument
545 struct gpio_bank *bank = omap_irq_data_get_bank(d); local
564 struct gpio_bank *bank = gpiobank; local
627 struct gpio_bank *bank = omap_irq_data_get_bank(d); local
646 struct gpio_bank *bank = omap_irq_data_get_bank(d); local
663 struct gpio_bank *bank = omap_irq_data_get_bank(data); local
670 struct gpio_bank *bank = omap_irq_data_get_bank(data); local
677 struct gpio_bank *bank = omap_irq_data_get_bank(d); local
690 struct gpio_bank *bank = omap_irq_data_get_bank(d); local
716 struct gpio_bank *bank = omap_irq_data_get_bank(d); local
752 struct gpio_bank *bank = dev_get_drvdata(dev); local
766 struct gpio_bank *bank = dev_get_drvdata(dev); local
800 omap_mpuio_init(struct gpio_bank *bank) argument
812 struct gpio_bank *bank = gpiochip_get_data(chip); local
827 struct gpio_bank *bank = gpiochip_get_data(chip); local
844 struct gpio_bank *bank = gpiochip_get_data(chip); local
854 struct gpio_bank *bank; local
866 struct gpio_bank *bank = gpiochip_get_data(chip); local
879 struct gpio_bank *bank; local
893 struct gpio_bank *bank = gpiochip_get_data(chip); local
915 struct gpio_bank *bank; local
958 struct gpio_bank *bank; local
970 struct gpio_bank *bank = gpiochip_get_data(chip); local
984 omap_gpio_show_rev(struct gpio_bank *bank) argument
999 omap_gpio_mod_init(struct gpio_bank *bank) argument
1026 omap_gpio_chip_init(struct gpio_bank *bank, struct device *pm_dev) argument
1109 omap_gpio_restore_context(struct gpio_bank *bank) argument
1134 omap_gpio_idle(struct gpio_bank *bank, bool may_lose_context) argument
1181 omap_gpio_unidle(struct gpio_bank *bank) argument
1275 struct gpio_bank *bank; local
1398 struct gpio_bank *bank; local
1493 struct gpio_bank *bank = platform_get_drvdata(pdev); local
1504 struct gpio_bank *bank = dev_get_drvdata(dev); local
1517 struct gpio_bank *bank = dev_get_drvdata(dev); local
1530 struct gpio_bank *bank = dev_get_drvdata(dev); local
1542 struct gpio_bank *bank = dev_get_drvdata(dev); local
[all...]
H A Dgpio-brcmstb.c26 #define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32)))
27 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN)
28 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA)
29 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR)
30 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_E
66 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); local
71 __brcmstb_gpio_get_active_irqs(struct brcmstb_gpio_bank *bank) argument
80 brcmstb_gpio_get_active_irqs(struct brcmstb_gpio_bank *bank) argument
92 brcmstb_gpio_hwirq_to_offset(irq_hw_number_t hwirq, struct brcmstb_gpio_bank *bank) argument
98 brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, unsigned int hwirq, bool enable) argument
133 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); local
141 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); local
149 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); local
159 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); local
235 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); local
262 brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank) argument
287 struct brcmstb_gpio_bank *bank; local
301 struct brcmstb_gpio_bank *bank; local
325 struct brcmstb_gpio_bank *bank = local
377 struct brcmstb_gpio_bank *bank; local
404 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); local
495 brcmstb_gpio_bank_save(struct brcmstb_gpio_priv *priv, struct brcmstb_gpio_bank *bank) argument
509 struct brcmstb_gpio_bank *bank; local
540 brcmstb_gpio_bank_restore(struct brcmstb_gpio_priv *priv, struct brcmstb_gpio_bank *bank) argument
560 struct brcmstb_gpio_bank *bank; local
643 struct brcmstb_gpio_bank *bank; local
[all...]
H A Dgpio-rockchip.c76 static inline void rockchip_gpio_writel(struct rockchip_pin_bank *bank, argument
79 void __iomem *reg = bank->reg_base + offset;
81 if (bank->gpio_type == GPIO_TYPE_V2)
87 static inline u32 rockchip_gpio_readl(struct rockchip_pin_bank *bank, argument
90 void __iomem *reg = bank->reg_base + offset;
93 if (bank->gpio_type == GPIO_TYPE_V2)
101 static inline void rockchip_gpio_writel_bit(struct rockchip_pin_bank *bank, argument
105 void __iomem *reg = bank->reg_base + offset;
108 if (bank->gpio_type == GPIO_TYPE_V2) {
123 static inline u32 rockchip_gpio_readl_bit(struct rockchip_pin_bank *bank, argument
143 struct rockchip_pin_bank *bank = gpiochip_get_data(chip); local
156 struct rockchip_pin_bank *bank = gpiochip_get_data(chip); local
176 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); local
186 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); local
200 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); local
307 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); local
334 struct rockchip_pin_bank *bank = irq_desc_get_handler_data(desc); local
386 struct rockchip_pin_bank *bank = gc->private; local
471 struct rockchip_pin_bank *bank = gc->private; local
479 struct rockchip_pin_bank *bank = gc->private; local
487 struct rockchip_pin_bank *bank = gc->private; local
496 struct rockchip_pin_bank *bank = gc->private; local
511 rockchip_interrupts_register(struct rockchip_pin_bank *bank) argument
575 rockchip_gpiolib_register(struct rockchip_pin_bank *bank) argument
639 rockchip_get_bank_data(struct rockchip_pin_bank *bank) argument
686 struct rockchip_pin_bank *bank; local
707 struct rockchip_pin_bank *bank = NULL; local
783 struct rockchip_pin_bank *bank = platform_get_drvdata(pdev); local
[all...]
/linux-master/arch/x86/kernel/cpu/mce/
H A Dthreshold.c35 void mce_inherit_storm(unsigned int bank) argument
40 * Previous CPU owning this bank had put it into storm mode,
42 * the worst (all recent polls of the bank found a valid error
46 storm->banks[bank].history = ~0ull;
47 storm->banks[bank].timestamp = jiffies;
60 static void mce_handle_storm(unsigned int bank, bool on) argument
64 mce_intel_handle_storm(bank, on);
69 void cmci_storm_begin(unsigned int bank) argument
73 __set_bit(bank, this_cpu_ptr(mce_poll_banks));
74 storm->banks[bank]
84 cmci_storm_end(unsigned int bank) argument
[all...]
H A Dintel.c31 * CMCI can be delivered to multiple cpus that share a machine check bank
32 * so we need to designate a single cpu to process errors logged in each bank
61 * MCi_CTL2 threshold for each bank when there is no storm.
62 * Default value for each bank may have been set by BIOS.
71 * bank because both corrected and uncorrected errors may be logged
72 * in the same bank and signalled with CMCI. The threshold only applies
137 static void cmci_set_threshold(int bank, int thresh) argument
143 rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
145 wrmsrl(MSR_IA32_MCx_CTL2(bank), val | thresh);
149 void mce_intel_handle_storm(int bank, boo argument
175 cmci_skip_bank(int bank, u64 *val) argument
229 cmci_claim_bank(int bank, u64 val, int bios_zero_thresh, int *bios_wrong_thresh) argument
320 __cmci_disable_bank(int bank) argument
383 cmci_disable_bank(int bank) argument
[all...]
H A Damd.c134 enum smca_bank_types smca_get_bank_type(unsigned int cpu, unsigned int bank) argument
138 if (bank >= MAX_NR_BANKS)
141 b = &per_cpu(smca_banks, cpu)[bank];
215 * So to define a unique name for each bank, we use a temp c-string to append
244 static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu) argument
252 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high))
258 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high))
262 per_cpu(smca_misc_banks_map, cpu) |= BIT_ULL(bank);
266 static void smca_configure(unsigned int bank, unsigned int cpu) argument
272 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank);
336 is_shared_bank(int bank) argument
369 lvt_interrupt_supported(unsigned int bank, u32 msr_high_bits) argument
519 smca_get_block_address(unsigned int bank, unsigned int block, unsigned int cpu) argument
531 get_block_address(u32 current_addr, u32 low, u32 high, unsigned int bank, unsigned int block, unsigned int cpu) argument
560 prepare_threshold_block(unsigned int bank, unsigned int block, u32 addr, int offset, u32 misc_high) argument
632 disable_err_thresholding(struct cpuinfo_x86 *c, unsigned int bank) argument
674 unsigned int bank, block, cpu = smp_processor_id(); local
779 __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) argument
819 _log_error_bank(unsigned int bank, u32 msr_stat, u32 msr_addr, u64 misc) argument
837 _log_error_deferred(unsigned int bank, u32 misc) argument
864 log_error_deferred(unsigned int bank) argument
880 unsigned int bank; local
886 log_error_thresholding(unsigned int bank, u64 misc) argument
922 unsigned int bank, cpu = smp_processor_id(); local
1090 get_name(unsigned int cpu, unsigned int bank, struct threshold_block *b) argument
1120 allocate_threshold_blocks(unsigned int cpu, struct threshold_bank *tb, unsigned int bank, unsigned int block, u32 address) argument
1221 threshold_create_bank(struct threshold_bank **bp, unsigned int cpu, unsigned int bank) argument
1297 deallocate_threshold_blocks(struct threshold_bank *bank) argument
1320 threshold_remove_bank(struct threshold_bank *bank) argument
1352 unsigned int bank, numbanks = this_cpu_read(mce_num_banks); local
1394 unsigned int numbanks, bank; local
[all...]
/linux-master/include/dt-bindings/gpio/
H A Duniphier-gpio.h13 #define UNIPHIER_GPIO_PORT(bank, line) \
14 ((UNIPHIER_GPIO_LINES_PER_BANK) * (bank) + (line))
/linux-master/scripts/dtc/include-prefixes/dt-bindings/gpio/
H A Duniphier-gpio.h13 #define UNIPHIER_GPIO_PORT(bank, line) \
14 ((UNIPHIER_GPIO_LINES_PER_BANK) * (bank) + (line))
/linux-master/include/linux/platform_data/
H A Dgpio-davinci.h19 #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
/linux-master/drivers/pinctrl/renesas/
H A Dsh_pfc.h442 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \
443 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
444 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0)
446 #define PORT_GP_CFG_2(bank, fn, sfx, cfg) \
447 PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \
448 PORT_GP_CFG_1(bank, 1, fn, sfx, cfg)
449 #define PORT_GP_2(bank, fn, sfx) PORT_GP_CFG_2(bank, f
[all...]
/linux-master/sound/pci/au88x0/
H A Dau88x0_wt.h12 /* WT channels are grouped in banks. Each bank has 0x20 channels. */
17 /* WT bank base register (as dword address). */
21 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */
22 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */
23 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */
24 #define WT_MRAMP(bank) (((((bank)
[all...]
/linux-master/arch/mips/sgi-ip32/
H A Dip32-memory.c25 int bank; local
29 for (bank=0; bank < CRIME_MAXBANKS; bank++) {
30 u64 bankctl = crime->bank_ctrl[bank];
32 if (bank != 0 && base == 0)
39 printk("CRIME MC: bank %u base 0x%016Lx size %LuMiB\n",
40 bank, base, size >> 20);
/linux-master/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.c54 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
59 if (bank->eint_mask_offset)
60 reg_mask = bank->pctl_offset + bank->eint_mask_offset;
62 reg_mask = our_chip->eint_mask + bank->eint_offset;
64 raw_spin_lock_irqsave(&bank->slock, flags);
66 mask = readl(bank->eint_base + reg_mask);
68 writel(mask, bank->eint_base + reg_mask);
70 raw_spin_unlock_irqrestore(&bank->slock, flags);
77 struct samsung_pin_bank *bank local
92 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
126 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
173 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
185 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
217 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
280 struct samsung_pin_bank *bank = d->pin_banks; local
315 struct samsung_pin_bank *bank; local
379 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
533 struct samsung_pin_bank *bank = eintd->bank; local
587 struct samsung_pin_bank *bank; local
691 exynos_pinctrl_suspend_bank( struct samsung_pinctrl_drv_data *drvdata, struct samsung_pin_bank *bank) argument
713 exynosauto_pinctrl_suspend_bank(struct samsung_pinctrl_drv_data *drvdata, struct samsung_pin_bank *bank) argument
728 struct samsung_pin_bank *bank = drvdata->pin_banks; local
749 exynos_pinctrl_resume_bank( struct samsung_pinctrl_drv_data *drvdata, struct samsung_pin_bank *bank) argument
779 exynosauto_pinctrl_resume_bank(struct samsung_pinctrl_drv_data *drvdata, struct samsung_pin_bank *bank) argument
796 struct samsung_pin_bank *bank = drvdata->pin_banks; local
[all...]
/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dadf_transport.c40 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) argument
42 spin_lock(&bank->lock);
43 if (bank->ring_mask & (1 << ring)) {
44 spin_unlock(&bank->lock);
47 bank->ring_mask |= (1 << ring);
48 spin_unlock(&bank->lock);
52 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) argument
54 spin_lock(&bank->lock);
55 bank->ring_mask &= ~(1 << ring);
56 spin_unlock(&bank
59 adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) argument
72 adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) argument
162 struct adf_etr_bank_data *bank = ring->bank; local
225 struct adf_etr_bank_data *bank; local
306 struct adf_etr_bank_data *bank = ring->bank; local
325 adf_ring_response_handler(struct adf_etr_bank_data *bank) argument
343 struct adf_etr_bank_data *bank = (void *)bank_addr; local
370 adf_get_coalesc_timer(struct adf_etr_bank_data *bank, const char *section, u32 bank_num_in_accel) argument
384 adf_init_bank(struct adf_accel_dev *accel_dev, struct adf_etr_bank_data *bank, u32 bank_num, void __iomem *csr_addr) argument
524 cleanup_bank(struct adf_etr_bank_data *bank) argument
[all...]
H A Dadf_transport_debug.c44 struct adf_etr_bank_data *bank = ring->bank; local
45 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev);
46 void __iomem *csr = ring->bank->csr_addr;
51 head = csr_ops->read_csr_ring_head(csr, bank->bank_number,
53 tail = csr_ops->read_csr_ring_tail(csr, bank->bank_number,
55 empty = csr_ops->read_csr_e_stat(csr, bank->bank_number);
60 seq_printf(sfile, "ring num %d, bank num %d\n",
61 ring->ring_number, ring->bank->bank_number);
104 ring->bank
121 struct adf_etr_bank_data *bank = sfile->private; local
136 struct adf_etr_bank_data *bank = sfile->private; local
147 struct adf_etr_bank_data *bank = sfile->private; local
191 adf_bank_debugfs_add(struct adf_etr_bank_data *bank) argument
205 adf_bank_debugfs_rm(struct adf_etr_bank_data *bank) argument
[all...]
H A Dadf_gen4_hw_data.h76 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \
78 ADF_RING_BUNDLE_SIZE * (bank) + \
80 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \
82 ADF_RING_BUNDLE_SIZE * (bank) + \
84 #define READ_CSR_E_STAT(csr_base_addr, bank) \
86 ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_E_STAT)
87 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \
89 ADF_RING_BUNDLE_SIZE * (bank) + \
91 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \
94 u32 _bank = bank; \
[all...]
H A Dadf_gen2_hw_data.h31 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \
32 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
34 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \
35 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
37 #define READ_CSR_E_STAT(csr_base_addr, bank) \
38 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
40 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \
41 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
43 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \
48 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank))
[all...]
/linux-master/arch/arm/mach-omap2/
H A Dpowerdomain-common.c47 u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank) argument
49 switch (bank) {
67 u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank) argument
69 switch (bank) {
87 u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank) argument
89 switch (bank) {
/linux-master/include/linux/
H A Djz4780-nemc.h23 * enum jz4780_nemc_bank_type - device types which can be connected to a bank
34 extern void jz4780_nemc_set_type(struct device *dev, unsigned int bank,
36 extern void jz4780_nemc_assert(struct device *dev, unsigned int bank,
/linux-master/drivers/bus/
H A Duniphier-system-bus.c23 #define UNIPHIER_SBC_STRIDE 0x10 /* register stride to next bank */
25 #define UNIPHIER_SBC_BASE_DUMMY 0xffffffff /* data to squash bank 0, 1 */
35 struct uniphier_system_bus_bank bank[UNIPHIER_SBC_NR_BANKS]; member in struct:uniphier_system_bus_priv
39 int bank, u32 addr, u64 paddr, u32 size)
44 "range found: bank = %d, addr = %08x, paddr = %08llx, size = %08x\n",
45 bank, addr, paddr, size);
47 if (bank >= ARRAY_SIZE(priv->bank)) {
48 dev_err(priv->dev, "unsupported bank number %d\n", bank);
38 uniphier_system_bus_add_bank(struct uniphier_system_bus_priv *priv, int bank, u32 addr, u64 paddr, u32 size) argument
[all...]
/linux-master/tools/testing/selftests/gpio/
H A Dgpio-sim.sh181 create_bank chip bank
183 test -n `cat $CONFIGFS_DIR/chip/bank/chip_name` || fail "chip_name doesn't work"
188 create_bank chip bank
189 test "`cat $CONFIGFS_DIR/chip/bank/chip_name`" = "none" || \
195 create_bank chip bank
204 create_bank chip bank
206 test "`get_chip_num_lines chip bank`" = "1" || fail "default number of lines is not 1"
211 create_bank chip bank
212 set_num_lines chip bank 16
214 test "`get_chip_num_lines chip bank`"
[all...]
/linux-master/drivers/net/phy/mscc/
H A Dmscc_macsec.c23 enum macsec_bank bank, u32 reg)
34 MSCC_PHY_MACSEC_20_TARGET(bank >> 2));
36 if (bank >> 2 == 0x1)
38 bank &= 0x3;
40 bank = 0;
45 MSCC_PHY_MACSEC_19_TARGET(bank));
62 enum macsec_bank bank, u32 reg, u32 val)
72 MSCC_PHY_MACSEC_20_TARGET(bank >> 2));
74 if ((bank >> 2 == 0x1) || (bank >>
22 vsc8584_macsec_phy_read(struct phy_device *phydev, enum macsec_bank bank, u32 reg) argument
61 vsc8584_macsec_phy_write(struct phy_device *phydev, enum macsec_bank bank, u32 reg, u32 val) argument
96 vsc8584_macsec_classification(struct phy_device *phydev, enum macsec_bank bank) argument
106 vsc8584_macsec_flow_default_action(struct phy_device *phydev, enum macsec_bank bank, bool block) argument
153 vsc8584_macsec_integrity_checks(struct phy_device *phydev, enum macsec_bank bank) argument
175 vsc8584_macsec_block_init(struct phy_device *phydev, enum macsec_bank bank) argument
244 vsc8584_macsec_mac_init(struct phy_device *phydev, enum macsec_bank bank) argument
374 enum macsec_bank bank = flow->bank; local
448 vsc8584_macsec_find_flow(struct macsec_context *ctx, enum macsec_bank bank) argument
464 enum macsec_bank bank = flow->bank; local
483 enum macsec_bank bank = flow->bank; local
524 enum macsec_bank bank = flow->bank; local
600 vsc8584_macsec_alloc_flow(struct vsc8531_private *priv, enum macsec_bank bank) argument
[all...]
/linux-master/drivers/hwspinlock/
H A Dhwspinlock_internal.h36 * @bank: the hwspinlock_device structure which owns this lock
41 struct hwspinlock_device *bank; member in struct:hwspinlock
64 int local_id = hwlock - &hwlock->bank->lock[0];
66 return hwlock->bank->base_id + local_id;
/linux-master/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c157 static void stm32_gpio_backup_value(struct stm32_gpio_bank *bank, argument
160 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL);
161 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL;
164 static void stm32_gpio_backup_mode(struct stm32_gpio_bank *bank, u32 offset, argument
167 bank->pin_backup[offset] &= ~(STM32_GPIO_BKP_MODE_MASK |
169 bank->pin_backup[offset] |= mode << STM32_GPIO_BKP_MODE_SHIFT;
170 bank->pin_backup[offset] |= alt << STM32_GPIO_BKP_ALT_SHIFT;
173 static void stm32_gpio_backup_driving(struct stm32_gpio_bank *bank, u32 offset, argument
176 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_TYPE);
177 bank
180 stm32_gpio_backup_speed(struct stm32_gpio_bank *bank, u32 offset, u32 speed) argument
187 stm32_gpio_backup_bias(struct stm32_gpio_bank *bank, u32 offset, u32 bias) argument
196 __stm32_gpio_set(struct stm32_gpio_bank *bank, unsigned offset, int value) argument
209 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); local
225 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); local
232 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); local
240 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); local
250 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); local
263 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); local
283 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); local
321 struct stm32_gpio_bank *bank = d->domain->host_data; local
343 struct stm32_gpio_bank *bank = d->domain->host_data; local
369 struct stm32_gpio_bank *bank = irq_data->domain->host_data; local
389 struct stm32_gpio_bank *bank = irq_data->domain->host_data; local
429 struct stm32_gpio_bank *bank = d->host_data; local
454 struct stm32_gpio_bank *bank = d->host_data; local
493 struct stm32_gpio_bank *bank = d->host_data; local
757 stm32_pmx_set_mode(struct stm32_gpio_bank *bank, int pin, u32 mode, u32 alt) argument
799 stm32_pmx_get_mode(struct stm32_gpio_bank *bank, int pin, u32 *mode, u32 *alt) argument
828 struct stm32_gpio_bank *bank; local
855 struct stm32_gpio_bank *bank = gpiochip_get_data(range->gc); local
892 stm32_pconf_set_driving(struct stm32_gpio_bank *bank, unsigned offset, u32 drive) argument
927 stm32_pconf_get_driving(struct stm32_gpio_bank *bank, unsigned int offset) argument
943 stm32_pconf_set_speed(struct stm32_gpio_bank *bank, unsigned offset, u32 speed) argument
978 stm32_pconf_get_speed(struct stm32_gpio_bank *bank, unsigned int offset) argument
994 stm32_pconf_set_bias(struct stm32_gpio_bank *bank, unsigned offset, u32 bias) argument
1029 stm32_pconf_get_bias(struct stm32_gpio_bank *bank, unsigned int offset) argument
1045 stm32_pconf_get(struct stm32_gpio_bank *bank, unsigned int offset, bool dir) argument
1071 struct stm32_gpio_bank *bank; local
1189 struct stm32_gpio_bank *bank; local
1266 stm32_pctrl_get_desc_pin_from_gpio(struct stm32_pinctrl *pctl, struct stm32_gpio_bank *bank, unsigned int offset) argument
1292 struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; local
1623 struct stm32_gpio_bank *bank = &pctl->banks[i]; local
1666 struct stm32_gpio_bank *bank; local
[all...]
/linux-master/drivers/mfd/
H A Dab8500-sysctrl.c93 static inline bool valid_bank(u8 bank) argument
95 return ((bank == AB8500_SYS_CTRL1_BLOCK) ||
96 (bank == AB8500_SYS_CTRL2_BLOCK));
101 u8 bank; local
106 bank = (reg >> 8);
107 if (!valid_bank(bank))
110 return abx500_get_register_interruptible(sysctrl_dev, bank,
117 u8 bank; local
122 bank = (reg >> 8);
123 if (!valid_bank(bank)) {
[all...]

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