cpu/mce/intel.c

31  * CMCI can be delivered to multiple cpus that share a machine check bank
32  * so we need to designate a single cpu to process errors logged in each bank
61  * MCi_CTL2 threshold for each bank when there is no storm.
62  * Default value for each bank may have been set by BIOS.
71  * bank because both corrected and uncorrected errors may be logged
72  * in the same bank and signalled with CMCI. The threshold only applies
137 static void cmci_set_threshold(int bank, int thresh)
143 	rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
145 	wrmsrl(MSR_IA32_MCx_CTL2(bank), val | thresh);
149 void mce_intel_handle_storm(int bank, bool on)
152 		cmci_set_threshold(bank, CMCI_STORM_THRESHOLD);
154 		cmci_set_threshold(bank, cmci_threshold[bank]);
170  * ownership of a bank.
171  * 1: CPU already owns this bank
172  * 2: BIOS owns this bank
173  * 3: Some other CPU owns this bank
175 static bool cmci_skip_bank(int bank, u64 *val)
179 	if (test_bit(bank, owned))
183 	if (test_bit(bank, mce_banks_ce_disabled))
186 	rdmsrl(MSR_IA32_MCx_CTL2(bank), *val);
190 		clear_bit(bank, owned);
191 		__clear_bit(bank, this_cpu_ptr(mce_poll_banks));
200  * 1: If this bank is in storm mode from whichever CPU was
227  * Try to claim ownership of a bank.
229 static void cmci_claim_bank(int bank, u64 val, int bios_zero_thresh, int *bios_wrong_thresh)
234 	wrmsrl(MSR_IA32_MCx_CTL2(bank), val);
235 	rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
237 	/* If the enable bit did not stick, this bank should be polled. */
239 		WARN_ON(!test_bit(bank, this_cpu_ptr(mce_poll_banks)));
240 		storm->banks[bank].poll_only = true;
245 	set_bit(bank, (void *)this_cpu_ptr(&mce_banks_owned));
248 		pr_notice("CPU%d BANK%d CMCI inherited storm\n", smp_processor_id(), bank);
249 		mce_inherit_storm(bank);
250 		cmci_storm_begin(bank);
252 		__clear_bit(bank, this_cpu_ptr(mce_poll_banks));
265 	/* Save default threshold for each bank */
266 	if (cmci_threshold[bank] == 0)
267 		cmci_threshold[bank] = val & MCI_CTL2_CMCI_THRESHOLD_MASK;
320 static void __cmci_disable_bank(int bank)
324 	if (!test_bit(bank, this_cpu_ptr(mce_banks_owned)))
326 	rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
328 	wrmsrl(MSR_IA32_MCx_CTL2(bank), val);
329 	__clear_bit(bank, this_cpu_ptr(mce_banks_owned));
332 		cmci_storm_end(bank);
383 void cmci_disable_bank(int bank)
392 	__cmci_disable_bank(bank);
493 	    (m->bank == 0) &&