qat/qat_common/adf_transport.c

40 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring)
42 	spin_lock(&bank->lock);
43 	if (bank->ring_mask & (1 << ring)) {
44 		spin_unlock(&bank->lock);
47 	bank->ring_mask |= (1 << ring);
48 	spin_unlock(&bank->lock);
52 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring)
54 	spin_lock(&bank->lock);
55 	bank->ring_mask &= ~(1 << ring);
56 	spin_unlock(&bank->lock);
59 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring)
61 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev);
63 	spin_lock_bh(&bank->lock);
64 	bank->irq_mask |= (1 << ring);
65 	spin_unlock_bh(&bank->lock);
66 	csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number,
67 				      bank->irq_mask);
68 	csr_ops->write_csr_int_col_ctl(bank->csr_addr, bank->bank_number,
69 				       bank->irq_coalesc_timer);
72 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring)
74 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev);
76 	spin_lock_bh(&bank->lock);
77 	bank->irq_mask &= ~(1 << ring);
78 	spin_unlock_bh(&bank->lock);
79 	csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number,
80 				      bank->irq_mask);
90 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
104 	csr_ops->write_csr_ring_tail(ring->bank->csr_addr,
105 				     ring->bank->bank_number, ring->ring_number,
114 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
129 		csr_ops->write_csr_ring_head(ring->bank->csr_addr,
130 					     ring->bank->bank_number,
138 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
141 	csr_ops->write_csr_ring_config(ring->bank->csr_addr,
142 				       ring->bank->bank_number,
149 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
155 	csr_ops->write_csr_ring_config(ring->bank->csr_addr,
156 				       ring->bank->bank_number,
162 	struct adf_etr_bank_data *bank = ring->bank;
163 	struct adf_accel_dev *accel_dev = bank->accel_dev;
196 	csr_ops->write_csr_ring_base(ring->bank->csr_addr,
197 				     ring->bank->bank_number, ring->ring_number,
211 		dma_free_coherent(&GET_DEV(ring->bank->accel_dev),
225 	struct adf_etr_bank_data *bank;
233 		dev_err(&GET_DEV(accel_dev), "Invalid bank number\n");
261 	bank = &transport_data->banks[bank_num];
262 	if (adf_reserve_ring(bank, ring_num)) {
267 	ring = &bank->rings[ring_num];
269 	ring->bank = bank;
294 		adf_enable_ring_irq(bank, ring->ring_number);
299 	adf_unreserve_ring(bank, ring_num);
306 	struct adf_etr_bank_data *bank = ring->bank;
307 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev);
310 	adf_disable_ring_irq(bank, ring->ring_number);
314 	csr_ops->write_csr_ring_config(bank->csr_addr, bank->bank_number,
316 	csr_ops->write_csr_ring_base(bank->csr_addr, bank->bank_number,
319 	adf_unreserve_ring(bank, ring->ring_number);
325 static void adf_ring_response_handler(struct adf_etr_bank_data *bank)
327 	struct adf_accel_dev *accel_dev = bank->accel_dev;
333 	empty_rings = csr_ops->read_csr_e_stat(bank->csr_addr,
334 					       bank->bank_number);
335 	empty_rings = ~empty_rings & bank->irq_mask;
338 		adf_handle_response(&bank->rings[i]);
343 	struct adf_etr_bank_data *bank = (void *)bank_addr;
344 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev);
347 	adf_ring_response_handler(bank);
349 	csr_ops->write_csr_int_flag_and_col(bank->csr_addr, bank->bank_number,
350 					    bank->irq_mask);
370 static void adf_get_coalesc_timer(struct adf_etr_bank_data *bank,
374 	if (adf_get_cfg_int(bank->accel_dev, section,
376 			    bank_num_in_accel, &bank->irq_coalesc_timer))
377 		bank->irq_coalesc_timer = ADF_COALESCING_DEF_TIME;
379 	if (ADF_COALESCING_MAX_TIME < bank->irq_coalesc_timer ||
380 	    ADF_COALESCING_MIN_TIME > bank->irq_coalesc_timer)
381 		bank->irq_coalesc_timer = ADF_COALESCING_DEF_TIME;
385 			 struct adf_etr_bank_data *bank,
398 	memset(bank, 0, sizeof(*bank));
399 	bank->bank_number = bank_num;
400 	bank->csr_addr = csr_addr;
401 	bank->accel_dev = accel_dev;
402 	spin_lock_init(&bank->lock);
404 	/* Allocate the rings in the bank */
406 	bank->rings = kzalloc_node(size, GFP_KERNEL,
408 	if (!bank->rings)
417 		adf_get_coalesc_timer(bank, "Accelerator0", bank_num);
419 		bank->irq_coalesc_timer = ADF_COALESCING_MIN_TIME;
425 		ring = &bank->rings[i];
439 			tx_ring = &bank->rings[i - hw_data->tx_rx_gap];
443 	if (adf_bank_debugfs_add(bank)) {
445 			"Failed to add bank debugfs entry\n");
456 		ring = &bank->rings[i];
460 	kfree(bank->rings);
524 static void cleanup_bank(struct adf_etr_bank_data *bank)
526 	struct adf_accel_dev *accel_dev = bank->accel_dev;
532 		struct adf_etr_ring_data *ring = &bank->rings[i];
534 		if (bank->ring_mask & (1 << i))
540 	kfree(bank->rings);
541 	adf_bank_debugfs_rm(bank);
542 	memset(bank, 0, sizeof(*bank));