#
5a002bf2 |
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15-Nov-2023 |
Sergey Shtylyov <s.shtylyov@omp.ru> |
pinctrl: stm32: return errors from stm32_gpio_direction_output() In the STMicroelectronics STM32 driver, stm32_gpio_direction_output() ignores the result of pinctrl_gpio_direction_output() for no good reason. Let's propagate errors from pinctrl_gpio_direction_output() upstream... Found by Linux Verification Center (linuxtesting.org) with the Svace static analysis tool. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Link: https://lore.kernel.org/r/5ce023a8-db0c-13a9-be42-09e3348ca44d@omp.ru Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
edd48fd9 |
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06-Nov-2023 |
Antonio Borneo <antonio.borneo@foss.st.com> |
pinctrl: stm32: fix array read out of bound The existing code does not verify if the "tentative" index exceeds the size of the array, causing out of bound read. Issue identified with kasan. Check the index before using it. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Fixes: 32c170ff15b0 ("pinctrl: stm32: set default gpio line names using pin names") Link: https://lore.kernel.org/r/20231107110520.4449-1-antonio.borneo@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b0eeba52 |
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31-Oct-2023 |
Chen Ni <nichen@iscas.ac.cn> |
pinctrl: stm32: Add check for devm_kcalloc Add check for the return value of devm_kcalloc() and return the error if it fails in order to avoid NULL pointer dereference. Fixes: 32c170ff15b0 ("pinctrl: stm32: set default gpio line names using pin names") Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Acked-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20231031080807.3600656-1-nichen@iscas.ac.cn Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b04ce10d |
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09-Oct-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
pinctrl: stm32: drop wrappers around pinctrl_gpio_free/input() pinctrl_gpio_*() helpers now have signatures corresponding with those of the GPIOLIB callbacks. We can drop the wrappers. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
b679d6c0 |
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03-Oct-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
treewide: rename pinctrl_gpio_direction_output_new() Now that pinctrl_gpio_direction_output() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
315c46f9 |
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03-Oct-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
treewide: rename pinctrl_gpio_direction_input_new() Now that pinctrl_gpio_direction_input() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
4fccb263 |
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03-Oct-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
treewide: rename pinctrl_gpio_free_new() Now that pinctrl_gpio_free()() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
acb38be6 |
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03-Oct-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
treewide: rename pinctrl_gpio_request_new() Now that pinctrl_gpio_request() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
164fcf1e |
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03-Oct-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
pinctrl: stm32: use new pinctrl GPIO helpers Replace the pinctrl helpers taking the global GPIO number as argument with the improved variants that instead take a pointer to the GPIO chip and the controller-relative offset. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
32c170ff |
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19-Jun-2023 |
Valentin Caron <valentin.caron@foss.st.com> |
pinctrl: stm32: set default gpio line names using pin names Add stm32_pctrl_get_desc_pin_from_gpio function to find a stm32 pin descriptor which is matching with a gpio. Most of the time pin number is equal to pin index in array. So the first part of the function is useful to speed up. And during gpio bank register, we set default gpio names with pin names. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@foss.st.com> Link: https://lore.kernel.org/r/20230620104349.834687-1-valentin.caron@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
060f03e9 |
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14-Jul-2023 |
Rob Herring <robh@kernel.org> |
pinctrl: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230714174901.4062397-1-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e0e8fbf8 |
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10-Mar-2023 |
Rob Herring <robh@kernel.org> |
pinctrl: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230310144721.1544669-1-robh@kernel.org [Dropped hunk hitting drivers/pinctrl/renesas/pinctrl.c] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
913a956c |
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27-Feb-2023 |
Dario Binacchi <dario.binacchi@amarulasolutions.com> |
pinctrl: stm32: use dynamic allocation of GPIO base Since commit 502df79b860563d7 ("gpiolib: Warn on drivers still using static gpiobase allocation"), one or more warnings are printed during boot on systems where static allocation of GPIO base is used: [ 0.197707] gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.199942] stm32f429-pinctrl soc:pinctrl@40020000: GPIOA bank added [ 0.200711] gpio gpiochip1: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.202855] stm32f429-pinctrl soc:pinctrl@40020000: GPIOB bank added [ 0.203591] gpio gpiochip2: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.205704] stm32f429-pinctrl soc:pinctrl@40020000: GPIOC bank added [ 0.206338] gpio gpiochip3: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.208448] stm32f429-pinctrl soc:pinctrl@40020000: GPIOD bank added [ 0.209182] gpio gpiochip4: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.211282] stm32f429-pinctrl soc:pinctrl@40020000: GPIOE bank added [ 0.212094] gpio gpiochip5: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.214270] stm32f429-pinctrl soc:pinctrl@40020000: GPIOF bank added [ 0.215005] gpio gpiochip6: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.217110] stm32f429-pinctrl soc:pinctrl@40020000: GPIOG bank added [ 0.217845] gpio gpiochip7: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.219959] stm32f429-pinctrl soc:pinctrl@40020000: GPIOH bank added [ 0.220602] gpio gpiochip8: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.222714] stm32f429-pinctrl soc:pinctrl@40020000: GPIOI bank added [ 0.223483] gpio gpiochip9: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.225594] stm32f429-pinctrl soc:pinctrl@40020000: GPIOJ bank added [ 0.226336] gpio gpiochip10: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.228490] stm32f429-pinctrl soc:pinctrl@40020000: GPIOK bank added So let's follow the suggestion and use dynamic allocation. Tested on STM32F429I-DISC1 board. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20230227205131.2104082-1-dario.binacchi@amarulasolutions.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
dcef18c8 |
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01-Jan-2023 |
Miaoqian Lin <linmq006@gmail.com> |
pinctrl: stm32: Fix refcount leak in stm32_pctrl_get_irq_domain of_irq_find_parent() returns a node pointer with refcount incremented, We should use of_node_put() on it when not needed anymore. Add missing of_node_put() to avoid refcount leak. Fixes: d86f4d71e42a ("pinctrl: stm32: check irq controller availability at probe") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20230102082503.3944927-1-linmq006@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b2de4316 |
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28-Nov-2022 |
Bernhard Rosenkränzer <bero@baylibre.com> |
pinctrl: stm32: Remove check for pins-are-numbered Remove the check for the unnecessary pins-are-numbered DeviceTree property Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221129023401.278780-3-bero@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
7338faa4 |
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07-Oct-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: stm32: Add missing header(s) Do not imply that some of the generic headers may be always included. Instead, include explicitly what we are direct user of. While at it, sort headers alphabetically. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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#
790cf9e3 |
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17-Sep-2022 |
Yang Yingliang <yangyingliang@huawei.com> |
pinctrl: stm32: Switch to use dev_err_probe() helper In the probe path, dev_err() can be replace with dev_err_probe() which will check if error code is -EPROBE_DEFER and prints the error name. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220917122015.1893880-1-yangyingliang@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
a1d4ef1a |
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27-Jun-2022 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: fix optional IRQ support to gpios To act as an interrupt controller, a gpio bank relies on the "interrupt-parent" of the pin controller. When this optional "interrupt-parent" misses, do not create any IRQ domain. This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when the interrupt-parent = <exti> property is not declared in the Device Tree. Fixes: 0eb9f683336d ("pinctrl: Add IRQ support to STM32 gpios") Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20220627142350.742973-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
8b3dd882 |
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07-May-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: stm32: Unshadow np variable in stm32_pctl_probe() The np variable is used globally for stm32_pctl_probe() and in one of its code branches. cppcheck is not happy with that: pinctrl-stm32.c:1530:23: warning: Local variable 'np' shadows outer variable [shadowVariable] Instead of simply renaming one of the variables convert some code to use a device pointer directly. Fixes: bb949ed9b16b ("pinctrl: stm32: Switch to use for_each_gpiochip_node() helper") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20220507102257.26414-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
f4b09d8d |
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05-May-2022 |
Linus Walleij <linus.walleij@linaro.org> |
pinctrl: stm32: Fix up errorpath after merge When merging the for_each_gpiochip_node() changes, I made some mistakes by not disabling the clocks on the errorpath, fix it up. Fixes: a0912083086d ("Merge tag 'intel-gpio-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel") Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
3389b098 |
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02-May-2022 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: prevent the use of the secure protected pins The hardware denies any access from the Linux non-secure world to the secure-protected pins. Hence, prevent any driver to request such a pin. Mark the secure-protected GPIO lines as invalid (.init_valid_mask) and prevent the pinmux request / pinconf setting operations. Identify the secure pins with "NO ACCESS" in the pinconf sysfs. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20220502153114.283618-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
3296c473 |
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02-May-2022 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: improve debugfs information of pinconf-pins entry Print the name of the selected alternate function in addition to its number. Ex: "pin 135 (PI7): alternate 10 (SAI2_FS_A) - ..." Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Link: https://lore.kernel.org/r/20220502152524.283374-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c954531b |
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22-Apr-2022 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: improve bank clocks management Instead of enabling/disabling the clock at each IO configuration update, just keep the clock enabled from the probe. This makes things simpler and more efficient (e.g. the time required to toggle an output IO is drastically decreased) without significantly increasing the power consumption. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20220422143608.226580-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
bb949ed9 |
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01-Apr-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: stm32: Switch to use for_each_gpiochip_node() helper Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
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#
d9463201 |
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01-Apr-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: stm32: Replace custom code by gpiochip_node_count() call Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
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#
05d8af44 |
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21-Apr-2022 |
Marek Vasut <marex@denx.de> |
pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested The current EOI handler for LEVEL triggered interrupts calls clk_enable(), register IO, clk_disable(). The clock manipulation requires locking which happens with IRQs disabled in clk_enable_lock(). Instead of turning the clock on and off all the time, enable the clock in case LEVEL interrupt is requested and keep the clock enabled until all LEVEL interrupts are freed. The LEVEL interrupts are an exception on this platform and seldom used, so this does not affect the common case. This simplifies the LEVEL interrupt handling considerably and also fixes the following splat found when using preempt-rt: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 0 at kernel/locking/rtmutex.c:2040 __rt_mutex_trylock+0x37/0x62 Modules linked in: CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.109-rt65-stable-standard-00068-g6a5afc4b1217 #85 Hardware name: STM32 (Device Tree Support) [<c010a45d>] (unwind_backtrace) from [<c010766f>] (show_stack+0xb/0xc) [<c010766f>] (show_stack) from [<c06353ab>] (dump_stack+0x6f/0x84) [<c06353ab>] (dump_stack) from [<c01145e3>] (__warn+0x7f/0xa4) [<c01145e3>] (__warn) from [<c063386f>] (warn_slowpath_fmt+0x3b/0x74) [<c063386f>] (warn_slowpath_fmt) from [<c063b43d>] (__rt_mutex_trylock+0x37/0x62) [<c063b43d>] (__rt_mutex_trylock) from [<c063c053>] (rt_spin_trylock+0x7/0x16) [<c063c053>] (rt_spin_trylock) from [<c036a2f3>] (clk_enable_lock+0xb/0x80) [<c036a2f3>] (clk_enable_lock) from [<c036ba69>] (clk_core_enable_lock+0x9/0x18) [<c036ba69>] (clk_core_enable_lock) from [<c034e9f3>] (stm32_gpio_get+0x11/0x24) [<c034e9f3>] (stm32_gpio_get) from [<c034ef43>] (stm32_gpio_irq_trigger+0x1f/0x48) [<c034ef43>] (stm32_gpio_irq_trigger) from [<c014aa53>] (handle_fasteoi_irq+0x71/0xa8) [<c014aa53>] (handle_fasteoi_irq) from [<c0147111>] (generic_handle_irq+0x19/0x22) [<c0147111>] (generic_handle_irq) from [<c014752d>] (__handle_domain_irq+0x55/0x64) [<c014752d>] (__handle_domain_irq) from [<c0346f13>] (gic_handle_irq+0x53/0x64) [<c0346f13>] (gic_handle_irq) from [<c0100ba5>] (__irq_svc+0x65/0xc0) Exception stack(0xc0e01f18 to 0xc0e01f60) 1f00: 0000300c 00000000 1f20: 0000300c c010ff01 00000000 00000000 c0e00000 c0e07714 00000001 c0e01f78 1f40: c0e07758 00000000 ef7cd0ff c0e01f68 c010554b c0105542 40000033 ffffffff [<c0100ba5>] (__irq_svc) from [<c0105542>] (arch_cpu_idle+0xc/0x1e) [<c0105542>] (arch_cpu_idle) from [<c063be95>] (default_idle_call+0x21/0x3c) [<c063be95>] (default_idle_call) from [<c01324f7>] (do_idle+0xe3/0x1e4) [<c01324f7>] (do_idle) from [<c01327b3>] (cpu_startup_entry+0x13/0x14) [<c01327b3>] (cpu_startup_entry) from [<c0a00c13>] (start_kernel+0x397/0x3d4) [<c0a00c13>] (start_kernel) from [<00000000>] (0x0) ---[ end trace 0000000000000002 ]--- Power consumption measured on STM32MP157C DHCOM SoM is not increased or is below noise threshold. Fixes: 47beed513a85b ("pinctrl: stm32: Add level interrupt support to gpio irq chip") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Marc Zyngier <maz@kernel.org> Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-arm-kernel@lists.infradead.org To: linux-gpio@vger.kernel.org Reviewed-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20220421140827.214088-1-marex@denx.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e74200eb |
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15-Apr-2022 |
Marek Vasut <marex@denx.de> |
pinctrl: stm32: Do not call stm32_gpio_get() for edge triggered IRQs in EOI The stm32_gpio_get() should only be called for LEVEL triggered interrupts, skip calling it for EDGE triggered interrupts altogether to avoid wasting CPU cycles in EOI handler. On this platform, EDGE triggered interrupts are the majority and LEVEL triggered interrupts are the exception no less, and the CPU cycles are not abundant. Fixes: 47beed513a85b ("pinctrl: stm32: Add level interrupt support to gpio irq chip") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Marc Zyngier <maz@kernel.org> Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-arm-kernel@lists.infradead.org To: linux-gpio@vger.kernel.org Link: https://lore.kernel.org/r/20220415215410.498349-1-marex@denx.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b67210cc |
|
15-Dec-2021 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: consider the GPIO offset to expose all the GPIO lines Consider the GPIO controller offset (from "gpio-ranges") to compute the maximum GPIO line number. This fixes an issue where gpio-ranges uses a non-null offset. e.g.: gpio-ranges = <&pinctrl 6 86 10> In that case the last valid GPIO line is not 9 but 15 (6 + 10 - 1) Cc: stable@vger.kernel.org Fixes: 67e2996f72c7 ("pinctrl: stm32: fix the reported number of GPIO lines per bank") Reported-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20211215095808.621716-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
576ad176 |
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08-Oct-2021 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: do not warn when 'st,package' is absent Since the 'st,package' property is optional, outputting the "No package detected" warning-level log when the property is absent is unsuitable. Remove that log. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20211008122454.617556-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c370bb47 |
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08-Oct-2021 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: use valid pin identifier in stm32_pinctrl_resume() When resuming from low power, the driver attempts to restore the configuration of some pins. This is done by a call to: stm32_pinctrl_restore_gpio_regs(struct stm32_pinctrl *pctl, u32 pin) where 'pin' must be a valid pin value (i.e. matching some 'groups->pin'). Fix the current implementation which uses some wrong 'pin' value. Fixes: e2f3cf18c3e2 ("pinctrl: stm32: add suspend/resume management") Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20211008122517.617633-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
db0f0325 |
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17-Jun-2021 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: check for IRQ MUX validity during alloc() Considering the following irq_domain_ops call chain: - .alloc() is called when a clients calls platform_get_irq() or gpiod_to_irq() - .activate() is called next, when the clients calls request_threaded_irq() Check for the IRQ MUX conflict during the first stage (alloc instead of activate). This avoids to provide the client with an IRQ that can't be used. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20210617144602.2557619-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
67e2996f |
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17-Jun-2021 |
Fabien Dessenne <fabien.dessenne@foss.st.com> |
pinctrl: stm32: fix the reported number of GPIO lines per bank Each GPIO bank supports a variable number of lines which is usually 16, but is less in some cases : this is specified by the last argument of the "gpio-ranges" bank node property. Report to the framework, the actual number of lines, so the libgpiod gpioinfo command lists the actually existing GPIO lines. Fixes: 1dc9d289154b ("pinctrl: stm32: add possibility to use gpio-ranges to declare bank range") Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20210617144629.2557693-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
589b9b8b |
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06-Apr-2021 |
Marek Vasut <marex@denx.de> |
pinctrl: stm32: Print invalid AF warning inside stm32_pctrl_is_function_valid() The "invalid function %d on pin %d .\n" message is triplicated in the driver in different variants, just pull it into the function and have it once in the driver. The bonus is that all variants of the message now print the pin number and AF consistently, so it is easier to debug such pinmux problems. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabien Dessenne <fabien.dessenne@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Acked-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20210406180035.279249-1-marex@denx.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
ffeaa23a |
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15-Feb-2021 |
Junlin Yang <yangjunlin@yulong.com> |
pinctrl: stm32: add missing of_node_put Fix OF node leaks by calling of_node_put in for_each_available_child_of_node when the cycle returns. Generated by: scripts/coccinelle/iterators/for_each_child.cocci Signed-off-by: Junlin Yang <yangjunlin@yulong.com> Link: https://lore.kernel.org/r/20210215103643.898-1-angkery@163.com Acked-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
290a9f93 |
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15-Jun-2020 |
Fabien Dessenne <fabien.dessenne@st.com> |
pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API Use the hwspin_lock_timeout_in_atomic() API which is the most appropriated here. Indeed: - hwspin_lock_() is called after spin_lock_irqsave() - the hwspin_lock_timeout() API relies on jiffies count which won't work if IRQs are disabled which is the case here. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Link: https://lore.kernel.org/r/20200615124456.27328-1-alexandre.torgue@st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b1a05ba9 |
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15-Jun-2020 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: add possibility to configure pins individually Adds the possibility to configure a single pin through the gpiolib (i.e: to set PULL_UP/PULL_DOWN config). Mutex behavior is slightly changed to avoid a deadlock when pin_config_set is called (in this case pctldev->mutex is already taken). Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Link: https://lore.kernel.org/r/20200615125951.28008-3-alexandre.torgue@st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
d9665bb8 |
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15-Jun-2020 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: return proper error code in pin_config_set ".pin_config_set" or ".pin_config_group_set" can be called with a configuration not supported (i.e. PIN_CONFIG_PERSIST_STATE). In this case, it is more suitable to return -ENOTSUPP instead of -EINVAL. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Link: https://lore.kernel.org/r/20200615125951.28008-2-alexandre.torgue@st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
2254e776 |
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15-Jun-2020 |
Etienne Carriere <etienne.carriere@st.com> |
pinctrl: stm32: defer probe if reset resource is not yet ready Defer probe when pin controller reset is defined in the system resources but not yet probed. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Link: https://lore.kernel.org/r/20200615125407.27632-3-alexandre.torgue@st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
d888229e |
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15-Jun-2020 |
Etienne Carriere <etienne.carriere@st.com> |
pinctrl: stm32: don't print an error on probe deferral during clock get Change STM32 pinctrl driver to not print an error trace when probe is deferred due to clock resource. Probe defer issue (for clocks) could occur during bank registering when some banks have already been registered. In this case banks already registered should be released. To not waste time in this case, it is better to check first if all clocks are available before registering banks. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Link: https://lore.kernel.org/r/20200615125407.27632-2-alexandre.torgue@st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
00760d3c |
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23-Mar-2020 |
Marek Vasut <marex@denx.de> |
irqchip/stm32: Retrigger both in eoi and unmask callbacks Sampling the IRQ line state in EOI and retriggering the interrupt to work around missing level-triggered interrupt support only works for non-threaded interrupts. Threaded interrupts must be retriggered the same way in unmask callback. Signed-off-by: Marek Vasut <marex@denx.de> [maz: fixed missing static attribute] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200323235132.530550-1-marex@denx.de
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#
47beed51 |
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19-Feb-2020 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: Add level interrupt support to gpio irq chip GPIO hardware block is directly linked to EXTI block but EXTI handles external interrupts only on edge. To be able to handle GPIO interrupt on level a "hack" is done in gpio irq chip: parent interrupt (exti irq chip) is retriggered following interrupt type and gpio line value. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Marek Vasut <marex@denx.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200219143229.18084-3-alexandre.torgue@st.com
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#
3c827873 |
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14-Feb-2020 |
Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> |
pinctrl: Use new GPIO_LINE_DIRECTION Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0. Main benefit is to make it easier to see which values mean IN and which OUT. As a side effect this helps GPIO framework to change the direction defines to something else if ever needed. Please note that return value from get_direction call on pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have returned value 2 for direction INPUT. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reported-by: kbuild test robot <lkp@intel.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
474137c9 |
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08-Aug-2019 |
Nishka Dasgupta <nishkadg.linux@gmail.com> |
pinctrl: stm32: stm32: Add of_node_put() before return Each iteration of for_each_child_of_node and for_each_available_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in two places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190808075457.16109-1-nishkadg.linux@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
489b64d6 |
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01-Jun-2019 |
Linus Walleij <linus.walleij@linaro.org> |
pinctrl: stm32: Add links to consumers Using STM32 as guinea pig after Alex's initial positive test to see if this is something we should encourage in general and make default behaviour. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
8eb2dfee |
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10-May-2019 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: add lock mechanism for irqmux selection GPIOs are split between several banks (A, B, ...) and each bank can have up to 16 lines. Those GPIOs could be used as interrupt lines thanks to exti lines. As there are only 16 exti lines, a mux is used to select which gpio line is connected to which exti line. Mapping is done as follow: -A0, B0, C0.. -->exti_line_0 (X0 selected by mux_0) -A1, B1, C1.. -->exti_line_1 (X1 selected by mux_1) ... This patch adds a protection to avoid overriding on mux_n for exti_line_n. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e2f3cf18 |
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10-May-2019 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: add suspend/resume management During power sequence, GPIO hardware registers could be lost if the power supply is switched off. Each device using pinctrl API is in charge of managing pins during suspend/resume sequences. But for pins used as gpio or irq stm32 pinctrl driver has to save the hardware configuration. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
d86f4d71 |
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24-Apr-2019 |
Fabien Dessenne <fabien.dessenne@st.com> |
pinctrl: stm32: check irq controller availability at probe It is not guaranteed that the IRQ controller driver is probed before the pin controller driver gets probed. Considering this, check for the irq domain availability during probe and return EPROBE_DEFER if needed. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
cc528862 |
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10-Apr-2019 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: introduce package support A same SoC can be available in several packages. Differences between packages are only the numbers of available balls. In order not to write a driver for each new package, same driver (ex: pinctrl-stm32mp157.c) will be used. This patch introduces the "package" property for each pin. So on a same driver, it will be possible to indicate on which package the pin is available. The package information will be got from the device tree. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e003ec6a |
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14-Feb-2019 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: return error upon hwspinlock failure Return error to the caller when the hwspinlock can't get locked. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
cd8c9b5a |
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14-Feb-2019 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: fix memory leak issue configs is allocated by pinconf_generic_parse_dt_config(), pinctrl_utils_add_map_configs() duplicates configs so it can and has to be freed to prevent memory leaks. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
97cfb6cd |
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13-Nov-2018 |
Benjamin Gaignard <benjamin.gaignard@linaro.org> |
pinctrl: stm32: protect configuration registers with a hwspinlock If a hwspinlock if defined in device tree use it to protect configuration registers. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
94f4e54c |
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27-Aug-2018 |
Rob Herring <robh@kernel.org> |
pinctrl: Convert to using %pOFn instead of device_node.name In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Dong Aisheng <aisheng.dong@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Sean Wang <sean.wang@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@bootlin.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Tony Lindgren <tony@atomide.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Barry Song <baohua@kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-omap@vger.kernel.org Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Sean Wang <sean.wang@mediatek.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
2e25a9cb |
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17-Jul-2018 |
Ludovic Barre <ludovic.barre@st.com> |
pinctrl: stm32: add syscfg mask parameter This patch adds mask parameter to define IRQ mux field. This field could vary depend of IRQ mux selection register. To avoid backward compatibility, the drivers set the legacy value by default. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
17cf082d |
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16-Jul-2018 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: check node status before new gpio bank registering Register a new GPIO bank only if GPIO bank node is enabled. This patch also adds checks on ranges which are defined only if a bank is registered. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
3b8283f0 |
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16-Jul-2018 |
Alexandre Torgue <alexandre.torgue@st.com> |
pinctrl: stm32: fix bank io port number In case the exti line is not in line with the bank number (that is the case when there is an hole between two banks, for example GPIOK and then GPIOZ), use "st,bank-ioport" DT property to get the right exti line. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c12fcfb1 |
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26-Apr-2018 |
Ludovic Barre <ludovic.barre@st.com> |
pinctrl/stm32: Add irq_eoi for stm32gpio irqchip -Parent domain of stm32gpio evolves to hierarchy domain and could have a handle_fasteoi_irq. So an irq_eoi parent callback is needed for children. -Replace space by tabulation. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
430a2a59 |
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23-Feb-2018 |
Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com> |
pinctrl: stm32: Optimizes and enhances stm32gpio irqchip - removes unneeded irq_chip.irq_eoi callback - adds irq_chip.irq_set_wake callback for possible in the future GPIO wakeup - adds irq_chip.irq_ack callback Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com> Reviewed-by: Ludovic Barre <ludovic.barre@st.com> Tested-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
702cb0a0 |
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29-Dec-2017 |
Thomas Gleixner <tglx@linutronix.de> |
genirq/irqdomain: Rename early argument of irq_domain_activate_irq() The 'early' argument of irq_domain_activate_irq() is actually used to denote reservation mode. To avoid confusion, rename it before abuse happens. No functional change. Fixes: 72491643469a ("genirq/irqdomain: Update irq_domain_ops.activate() signature") Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Alexandru Chirvasitu <achirvasub@gmail.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Dou Liyang <douly.fnst@cn.fujitsu.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: Mikael Pettersson <mikpelinux@gmail.com> Cc: Josh Poulson <jopoulso@microsoft.com> Cc: Mihai Costache <v-micos@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-pci@vger.kernel.org Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Dexuan Cui <decui@microsoft.com> Cc: Simon Xiao <sixiao@microsoft.com> Cc: Saeed Mahameed <saeedm@mellanox.com> Cc: Jork Loeser <Jork.Loeser@microsoft.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: devel@linuxdriverproject.org Cc: KY Srinivasan <kys@microsoft.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Sakari Ailus <sakari.ailus@intel.com>, Cc: linux-media@vger.kernel.org
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#
e7c0e2f3 |
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30-Nov-2017 |
Benjamin Gaignard <benjamin.gaignard@linaro.org> |
pinctrl: stm32: Fix copyright Uniformize STMicroelectronics copyrights header Add SPDX identifier Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
72491643 |
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13-Sep-2017 |
Thomas Gleixner <tglx@linutronix.de> |
genirq/irqdomain: Update irq_domain_ops.activate() signature The irq_domain_ops.activate() callback has no return value and no way to tell the function that the activation is early. The upcoming changes to support a reservation scheme which allows to assign interrupt vectors on x86 only when the interrupt is actually requested requires: - A return value, so activation can fail at request_irq() time - Information that the activate invocation is early, i.e. before request_irq(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Yu Chen <yu.c.chen@intel.com> Acked-by: Juergen Gross <jgross@suse.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Rui Zhang <rui.zhang@intel.com> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Len Brown <lenb@kernel.org> Link: https://lkml.kernel.org/r/20170913213152.848490816@linutronix.de
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#
a9a1d2a7 |
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22-Sep-2017 |
Linus Walleij <linus.walleij@linaro.org> |
pinctrl/gpio: Unify namespace for cross-calls The pinctrl_request_gpio() and pinctrl_free_gpio() break the nice namespacing in the other cross-calls like pinctrl_gpio_foo(). Just rename them and all references so we have one namespace with all cross-calls under pinctrl_gpio_*(). Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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d9e99bdf |
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19-Jul-2017 |
Philipp Zabel <p.zabel@pengutronix.de> |
pinctrl: stm32: explicitly request exclusive reset control Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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b7c747d4 |
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30-May-2017 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: stm32: Fix bad function call In stm32_pconf_parse_conf function, stm32_pmx_gpio_set_direction is called with wrong parameter value. Indeed, using NULL value for range will raise an oops. Fixes: aceb16dc2da5 ("pinctrl: Add STM32 MCUs support") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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b8bfcb09 |
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31-May-2017 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: stm32: remove useless check There is no link between the number of elements of tab which contains all pin desc (located in each pinctrl-stm32xxxx.c files) and the pin number (defined in the tab). Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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acaa0379 |
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29-May-2017 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: stm32: Implement .get_direction gpio_chip callback Add .get_direction() gpiochip callback in STM32 pinctrl driver. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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9efa6d1a |
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29-May-2017 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: stm32: set pin to gpio input when used as interrupt This patch ensures that pin is correctly set as gpio input when it is used as an interrupt. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1dc9d289 |
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07-Apr-2017 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: stm32: add possibility to use gpio-ranges to declare bank range Use device tree entries to declare gpio range. It will allow to use no contiguous gpio bank and holes inside a bank. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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dca72e09 |
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27-Jan-2017 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: stm32: fix bad location of gpiochip_lock_as_irq Move gpio lock as irq from "domain alloc" callback to "domain activate" callback. It will allow to use gpiolib sysfs correctly. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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c32c22ee |
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14-Dec-2016 |
Gabriel Fernandez <gabriel.fernandez@st.com> |
pinctrl: stm32: activate strict mux mode This activates strict mode muxing for the STM32 pin controllers, as these do not allow GPIO and functions to use the same pin simultaneously. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1064a2b4 |
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20-Oct-2016 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: stm32: remove dependency with interrupt controller This patch allows to probe stm32 pinctrl driver even if no interrupt controller is defined to manage gpio irqs. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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d9048cdb |
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11-Sep-2016 |
Julia Lawall <Julia.Lawall@lip6.fr> |
pinctrl: stm32: constify gpio_chip structures These structures are only used to copy into other structures, so declare them as const. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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0eb9f683 |
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09-Sep-2016 |
Alexandre TORGUE <alexandre.torgue@st.com> |
pinctrl: Add IRQ support to STM32 gpios This patch adds IRQ support to STM32 gpios. The EXTI controller has 16 lines dedicated to GPIOs. EXTI line n can be connected to only line n of one of the GPIO ports, for example EXTI0 can be connected to either PA0, or PB0, or PC0... This port selection is done by specifying the port number into System Config registers. Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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4fac724f |
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24-May-2016 |
Patrice Chotard <patrice.chotard@st.com> |
pinctrl: stm32: factorize stm32_pconf_input/output_get() As these 2 functions code are 95% similar, factorize them. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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3beed93c |
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29-Apr-2016 |
Patrice Chotard <patrice.chotard@st.com> |
pinctrl: stm32: Implement .pin_config_dbg_show() Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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88edad04 |
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24-Feb-2016 |
Laxman Dewangan <ldewangan@nvidia.com> |
pinctrl: stm32: Use devm_pinctrl_register() for pinctrl registration Use devm_pinctrl_register() for pin control registration. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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d32f7fd3 |
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31-Mar-2016 |
Irina Tirdea <irina.tirdea@intel.com> |
pinctrl: Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map, since it does not depend on device tree despite the current name. This will enforce a consistent naming in pinctr-utils.c and will make it clear it can be called from outside device tree (e.g. from ACPI handling code). Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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38a3fbf1 |
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08-Feb-2016 |
Maxime Coquelin <mcoquelin.stm32@gmail.com> |
pinctrl: stm32: Remove dependency with DT bindings header files Some macros where defined in DT bindings headers, whereas only used in the driver. This patch moves these macros to the driver side. Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1300568a |
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05-Feb-2016 |
Linus Walleij <linus.walleij@linaro.org> |
pinctrl: stm32: fix compile error and modernize - Fix the dev->parent assignment compile error - Use gpiochip_get_data() to get the data pointer for the banks Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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aceb16dc |
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14-Jan-2016 |
Maxime Coquelin <mcoquelin.stm32@gmail.com> |
pinctrl: Add STM32 MCUs support This patch adds pinctrl and GPIO support to STMicroelectronic's STM32 family of MCUs. While it only supports STM32F429 for now, it has been designed to enable support of other MCUs of the family (e.g. STM32F746). Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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