Lines Matching refs:bank
134 enum smca_bank_types smca_get_bank_type(unsigned int cpu, unsigned int bank)
138 if (bank >= MAX_NR_BANKS)
141 b = &per_cpu(smca_banks, cpu)[bank];
215 * So to define a unique name for each bank, we use a temp c-string to append
244 static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu)
252 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high))
258 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high))
262 per_cpu(smca_misc_banks_map, cpu) |= BIT_ULL(bank);
266 static void smca_configure(unsigned int bank, unsigned int cpu)
272 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank);
279 * bank. It also means that the OS will configure deferred
288 * SMCA sets the Deferred Error Interrupt type per bank.
301 this_cpu_ptr(mce_banks_array)[bank].lsb_in_status = !!(low & BIT(8));
306 smca_set_misc_banks_map(bank, cpu);
308 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
309 pr_warn("Failed to read MCA_IPID for bank %d\n", bank);
320 this_cpu_ptr(smca_banks)[bank].hwid = s_hwid;
321 this_cpu_ptr(smca_banks)[bank].id = low;
322 this_cpu_ptr(smca_banks)[bank].sysfs_id = bank_counts[s_hwid->bank_type]++;
336 static inline bool is_shared_bank(int bank)
340 * a shared bank.
346 return (bank == 4);
369 static bool lvt_interrupt_supported(unsigned int bank, u32 msr_high_bits)
372 * bank 4 supports APIC LVT interrupts implicitly since forever.
374 if (bank == 4)
379 * bank can generate APIC LVT interrupts
390 "for bank %d, block %d (MSR%08X=0x%x%08x)\n", b->cpu,
391 b->bank, b->block, b->address, hi, lo);
405 "for bank %d, block %d (MSR%08X=0x%x%08x)\n",
406 b->cpu, apic, b->bank, b->block, b->address, hi, lo);
413 /* Reprogram MCx_MISC MSR behind this threshold bank. */
519 static u32 smca_get_block_address(unsigned int bank, unsigned int block,
523 return MSR_AMD64_SMCA_MCx_MISC(bank);
525 if (!(per_cpu(smca_misc_banks_map, cpu) & BIT_ULL(bank)))
528 return MSR_AMD64_SMCA_MCx_MISCy(bank, block - 1);
532 unsigned int bank, unsigned int block,
537 if ((bank >= per_cpu(mce_num_banks, cpu)) || (block >= NR_BLOCKS))
541 return smca_get_block_address(bank, block, cpu);
546 addr = mca_msr_reg(bank, MCA_MISC);
560 prepare_threshold_block(unsigned int bank, unsigned int block, u32 addr,
569 per_cpu(bank_map, cpu) |= BIT_ULL(bank);
573 b.bank = bank;
576 b.interrupt_capable = lvt_interrupt_supported(bank, misc_high);
608 enum smca_bank_types bank_type = smca_get_bank_type(m->extcpu, m->bank);
619 if (m->bank == 4 && XEC(m->status, 0x1f) == 0x5)
629 * - Prevent possible spurious interrupts from the IF bank on Family 0x17
632 static void disable_err_thresholding(struct cpuinfo_x86 *c, unsigned int bank)
639 if (c->x86 == 0x15 && bank == 4) {
646 if (smca_get_bank_type(smp_processor_id(), bank) != SMCA_IF)
649 msrs[0] = MSR_AMD64_SMCA_MCx_MISC(bank);
674 unsigned int bank, block, cpu = smp_processor_id();
679 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) {
681 smca_configure(bank, cpu);
683 disable_err_thresholding(c, bank);
686 address = get_block_address(address, low, high, bank, block, cpu);
700 offset = prepare_threshold_block(bank, block, address, offset, high);
709 * DRAM ECC errors are reported in the Northbridge (bank 4) with
714 return m->bank == 4 && XEC(m->status, 0x1f) == 8;
728 bank_type = smca_get_bank_type(m->extcpu, m->bank);
750 * northbridge (bank 4).
755 * a) Reported in legacy bank 4 with extended error code (XEC) 8.
756 * b) MCA_STATUS[43] is *not* defined as poison in legacy bank 4. Therefore,
767 else if (m->bank == 4)
771 /* Check poison bit for all other bank types. */
779 static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc)
787 m.bank = bank;
797 rdmsrl(MSR_AMD64_SMCA_MCx_IPID(bank), m.ipid);
800 rdmsrl(MSR_AMD64_SMCA_MCx_SYND(bank), m.synd);
819 _log_error_bank(unsigned int bank, u32 msr_stat, u32 msr_addr, u64 misc)
830 __log_error(bank, status, addr, misc);
837 static bool _log_error_deferred(unsigned int bank, u32 misc)
839 if (!_log_error_bank(bank, mca_msr_reg(bank, MCA_STATUS),
840 mca_msr_reg(bank, MCA_ADDR), misc))
851 wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(bank), 0);
864 static void log_error_deferred(unsigned int bank)
866 if (_log_error_deferred(bank, 0))
873 _log_error_bank(bank, MSR_AMD64_SMCA_MCx_DESTAT(bank),
874 MSR_AMD64_SMCA_MCx_DEADDR(bank), 0);
880 unsigned int bank;
882 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank)
883 log_error_deferred(bank);
886 static void log_error_thresholding(unsigned int bank, u64 misc)
888 _log_error_deferred(bank, misc);
906 log_error_thresholding(block->bank, ((u64)high << 32) | low);
922 unsigned int bank, cpu = smp_processor_id();
925 * Validate that the threshold bank has been initialized already. The
932 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) {
933 if (!(per_cpu(bank_map, cpu) & BIT_ULL(bank)))
936 first_block = bp[bank]->blocks;
1090 static const char *get_name(unsigned int cpu, unsigned int bank, struct threshold_block *b)
1095 if (b && bank == 4)
1098 return th_names[bank];
1101 bank_type = smca_get_bank_type(cpu, bank);
1116 per_cpu(smca_banks, cpu)[bank].sysfs_id);
1121 unsigned int bank, unsigned int block,
1128 if ((bank >= this_cpu_read(mce_num_banks)) || (block >= NR_BLOCKS))
1150 b->bank = bank;
1154 b->interrupt_capable = lvt_interrupt_supported(bank, high);
1172 err = kobject_init_and_add(&b->kobj, &threshold_ktype, tb->kobj, get_name(cpu, bank, b));
1176 address = get_block_address(address, low, high, bank, ++block, cpu);
1180 err = allocate_threshold_blocks(cpu, tb, bank, block, address);
1222 unsigned int bank)
1227 const char *name = get_name(cpu, bank, NULL);
1233 if (is_shared_bank(bank)) {
1244 bp[bank] = b;
1259 /* Associate the bank with the per-CPU MCE device */
1266 if (is_shared_bank(bank)) {
1277 err = allocate_threshold_blocks(cpu, b, bank, 0, mca_msr_reg(bank, MCA_MISC));
1281 bp[bank] = b;
1297 static void deallocate_threshold_blocks(struct threshold_bank *bank)
1301 list_for_each_entry_safe(pos, tmp, &bank->blocks->miscj, miscj) {
1306 kobject_put(&bank->blocks->kobj);
1320 static void threshold_remove_bank(struct threshold_bank *bank)
1324 if (!bank->blocks)
1327 if (!bank->shared)
1330 if (!refcount_dec_and_test(&bank->cpus)) {
1331 __threshold_remove_blocks(bank);
1335 * The last CPU on this node using the shared bank is going
1336 * away, remove that bank now.
1343 deallocate_threshold_blocks(bank);
1346 kobject_put(bank->kobj);
1347 kfree(bank);
1352 unsigned int bank, numbanks = this_cpu_read(mce_num_banks);
1354 for (bank = 0; bank < numbanks; bank++) {
1355 if (!bp[bank])
1358 threshold_remove_bank(bp[bank]);
1359 bp[bank] = NULL;
1394 unsigned int numbanks, bank;
1410 for (bank = 0; bank < numbanks; ++bank) {
1411 if (!(this_cpu_read(bank_map) & BIT_ULL(bank)))
1413 err = threshold_create_bank(bp, cpu, bank);