Searched defs:val (Results 151 - 175 of 9172) sorted by last modified time

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/linux-master/drivers/net/phy/
H A Dmediatek-ge-soc.c498 u16 reg, val; local
756 u16 val[8] = { 0x01ce, 0x01c1, local
831 u16 val[12] = { 0x0187, 0x01cd, 0x01c8, 0x0182, local
H A Ddp83869.c404 int val, cnt, enable, count; local
437 int val, count; local
512 int val; local
611 int ret = 0, val; local
795 int ret, val; local
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/linux-master/drivers/net/ethernet/wangxun/txgbe/
H A Dtxgbe_phy.c87 u32 offset, val; local
103 static int txgbe_pcs_write(struct mii_bus *bus, int addr, int devnum, int regnum, u16 val) argument
313 int val; local
323 u32 val; local
344 txgbe_gpio_direction_out(struct gpio_chip *chip, unsigned int offset, int val) argument
404 u32 pol, val; local
593 txgbe_i2c_read(void *context, unsigned int reg, unsigned int *val) argument
602 txgbe_i2c_write(void *context, unsigned int reg, unsigned int val) argument
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/linux-master/drivers/net/ethernet/ti/
H A Dam65-cpts.c206 u32 val; local
371 u64 val = 0; local
591 u32 val; local
633 u32 val; local
877 u32 val; local
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/linux-master/drivers/net/ethernet/renesas/
H A Dravb_main.c2480 u32 val; local
2457 ravb_endisable_csum_gbeth(struct net_device *ndev, enum ravb_reg reg, u32 val, u32 mask) argument
/linux-master/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_acl_tcam.c1513 u32 val = ctx->val.vu32; local
H A Dpci.c1475 u32 val; local
242 __mlxsw_pci_queue_doorbell_set(struct mlxsw_pci *mlxsw_pci, struct mlxsw_pci_queue *q, u16 val) argument
252 __mlxsw_pci_queue_doorbell_arm_set(struct mlxsw_pci *mlxsw_pci, struct mlxsw_pci_queue *q, u16 val) argument
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H A Dcore.c1813 u32 val, tile_v; local
1828 u32 val, tile_v; local
1309 mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id, union devlink_param_value val, struct netlink_ext_ack *extack) argument
1859 u32 val; local
1871 u32 val; local
1890 u32 val; local
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/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc.c67 u64 val = 0; local
97 u64 val; local
3297 u64 val; local
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/linux-master/drivers/net/ethernet/intel/igc/
H A Digc_main.c7153 u32 err, val; local
/linux-master/drivers/net/ethernet/intel/iavf/
H A Diavf_main.c3190 u32 val, oldval; local
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/linux-master/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c353 u32 head, val; local
1008 u32 val; local
3930 u32 val; local
3980 u32 val; local
4074 u32 val; local
4218 u32 val; local
4302 u32 val, ena_mask; local
4988 u32 val, qp; local
9262 u32 val; local
9579 u32 val, fcnt_prog; local
9592 u32 val, fcnt_prog; local
9606 u32 val, fcnt_prog; local
10123 u32 val; local
10840 u32 val; local
15338 u32 val = rd32(&pf->hw, I40E_GL_FWSTS); local
15576 u32 val; local
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/linux-master/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt.c2283 u32 reg_type, reg_off, val = 0; local
7612 u16 val, tmr, max, flags = hw_coal->flags; local
11967 bnxt_hwrm_port_phy_read(struct bnxt *bp, u16 phy_addr, u16 reg, u16 *val) argument
11999 bnxt_hwrm_port_phy_write(struct bnxt *bp, u16 phy_addr, u16 reg, u16 val) argument
12880 u32 val; local
13050 u16 val = 0; local
13070 u32 val; local
13221 u32 val[2]; local
13658 u32 val = fw_health->fw_reset_seq_vals[reg_idx]; local
13806 u32 val; local
13834 u16 val; local
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/linux-master/drivers/net/ethernet/broadcom/
H A Db44.c181 u32 val = br32(bp, reg); local
202 u32 val; local
169 bw32(const struct b44 *bp, unsigned long reg, unsigned long val) argument
236 __b44_readphy(struct b44 *bp, int phy_addr, int reg, u32 *val) argument
252 __b44_writephy(struct b44 *bp, int phy_addr, int reg, u32 val) argument
264 b44_readphy(struct b44 *bp, int reg, u32 *val) argument
272 b44_writephy(struct b44 *bp, int reg, u32 val) argument
283 u32 val; local
291 b44_mdio_write_mii(struct net_device *dev, int phy_id, int location, int val) argument
300 u32 val; local
308 b44_mdio_write_phylib(struct mii_bus *bus, int phy_id, int location, u16 val) argument
317 u32 val; local
339 u32 val; local
384 u32 val; local
417 u32 val; local
482 u64 *val; local
520 u32 val = br32(bp, B44_TX_CTRL); local
546 u32 val = br32(bp, B44_TX_CTRL); local
1312 u32 val = br32(bp, B44_DEVCTRL); local
1345 u32 val; local
1357 u32 val; local
1384 u32 val; local
1525 u32 val; local
1579 u16 val; local
1593 u32 val; local
1717 u32 val; local
2220 u32 val = br32(bp, B44_TX_CTRL); local
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/linux-master/drivers/mtd/nand/raw/
H A Dqcom_nandc.c673 nandc_write(struct qcom_nand_controller *nandc, int offset, u32 val) argument
751 nandc_set_reg(struct nand_chip *chip, int offset, u32 val) argument
H A Ddiskonchip.c185 uint8_t val; local
/linux-master/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.c646 nand_writereg(struct brcmnand_controller *ctrl, u32 offs, u32 val) argument
802 brcmnand_write_reg(struct brcmnand_controller *ctrl, enum brcmnand_reg reg, u32 val) argument
811 brcmnand_rmw_reg(struct brcmnand_controller *ctrl, enum brcmnand_reg reg, u32 mask, unsigned int shift, u32 val) argument
829 brcmnand_write_fc(struct brcmnand_controller *ctrl, int word, u32 val) argument
838 edu_writel(struct brcmnand_controller *ctrl, enum edu_reg reg, u32 val) argument
941 brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) argument
1057 brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) argument
1126 u32 val; local
1162 u32 val = en ? CS_SELECT_NAND_WP : 0; local
1206 flash_dma_writel(struct brcmnand_controller *ctrl, enum flash_dma_reg dma_reg, u32 val) argument
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/linux-master/drivers/mtd/
H A Dmtdcore.c533 mtd_nvmem_reg_read(void *priv, unsigned int offset, void *val, size_t bytes) argument
922 mtd_nvmem_user_otp_reg_read(void *priv, unsigned int offset, void *val, size_t bytes) argument
936 mtd_nvmem_fact_otp_reg_read(void *priv, unsigned int offset, void *val, size_t bytes) argument
/linux-master/drivers/mmc/host/
H A Dsdhci-of-dwcmshc.c272 u32 val; local
323 u32 val; local
590 u32 val = 0; local
664 u32 val, emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO; local
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H A Dsdhci-msm.c322 static void sdhci_msm_mci_variant_writel_relaxed(u32 val, argument
331 static void sdhci_msm_v5_variant_writel_relaxed(u32 val, argument
1520 u32 val = SWITCHABLE_SIGNALING_VOLTAGE; local
2073 __sdhci_msm_check_write(struct sdhci_host *host, u16 val, int reg) argument
2117 sdhci_msm_writew(struct sdhci_host *host, u16 val, int reg) argument
2129 sdhci_msm_writeb(struct sdhci_host *host, u8 val, int reg) argument
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/linux-master/drivers/gpu/drm/xe/
H A Dxe_huc.c220 u32 val; member in struct:__anon17
H A Dxe_gt.c180 u32 val; local
/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_drv.h661 uint32_t val; local
673 REGISTER_WRITE(struct drm_device *dev, uint32_t reg, uint32_t val) argument
680 REGISTER_WRITE_AUX(struct drm_device *dev, uint32_t reg, uint32_t val) argument
690 REGISTER_WRITE_WITH_AUX(struct drm_device *dev, uint32_t reg, uint32_t val, int aux) argument
701 REGISTER_WRITE16(struct drm_device *dev, uint32_t reg, uint32_t val) argument
710 REGISTER_WRITE8(struct drm_device *dev, uint32_t reg, uint32_t val) argument
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/linux-master/drivers/gpu/drm/etnaviv/
H A Detnaviv_gpu.c769 u32 val = gpu_read(gpu, VIVS_MMUv2_AHB_CONTROL); local
1320 u32 val; local
1340 u32 val; local
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_6_ppt.c1460 uint32_t val = 0; local
2546 __smu_v13_0_6_mca_dump_bank(struct smu_context *smu, enum amdgpu_mca_error_type type, int idx, int offset, uint32_t *val) argument
2567 smu_v13_0_6_mca_dump_bank(struct smu_context *smu, enum amdgpu_mca_error_type type, int idx, int offset, uint32_t *val, int count) argument
2614 mca_bank_read_reg(struct amdgpu_device *adev, enum amdgpu_mca_error_type type, int idx, int reg_idx, uint64_t *val) argument
2656 mca_decode_ipid_to_hwip(uint64_t val) argument
3050 __smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_error_type type, int idx, int offset, u32 *val) argument
3071 smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_error_type type, int idx, int offset, u32 *val, int count) argument
3088 aca_bank_read_reg(struct amdgpu_device *adev, enum aca_error_type type, int idx, int reg_idx, u64 *val) argument
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