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ace323f8 |
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01-Apr-2024 |
Maksim Kiselev <bigunclemax@gmail.com> |
mmc: sdhci-of-dwcmshc: th1520: Increase tuning loop count to 128 Fix SD card tuning error by increasing tuning loop count from 40(MAX_TUNING_LOOP) to 128. For some reason the tuning algorithm requires to move through all the taps of delay line even if the THRESHOLD_MODE (bit 2 in AT_CTRL_R) is used instead of the LARGEST_WIN_MODE. Tested-by: Drew Fustini <drew@pdp7.com> Tested-by: Xi Ruoyao <xry111@xry111.site> Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 43658a542ebf ("mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240402093539.184287-1-bigunclemax@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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03749309 |
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18-Mar-2024 |
Liming Sun <limings@nvidia.com> |
sdhci-of-dwcmshc: disable PM runtime in dwcmshc_remove() This commit disables PM runtime in dwcmshc_remove() to avoid the error message below when reloading the sdhci-of-dwcmshc.ko sdhci-dwcmshc MLNXBF30:00: Unbalanced pm_runtime_enable! Fixes: 48fe8fadbe5e ("mmc: sdhci-of-dwcmshc: Add runtime PM operations") Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/b9155963ffb12d18375002bf9ac9a3f98b727fc8.1710854108.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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017199c2 |
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17-Feb-2024 |
Jisheng Zhang <jszhang@kernel.org> |
mmc: sdhci-of-dwcmshc: Add support for Sophgo CV1800B and SG2002 Add support for the mmc controller in the Sophgo CV1800B and SG2002 with corresponding new compatible strings. Implement custom sdhci_ops. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Link: https://lore.kernel.org/r/20240217144202.3808-3-jszhang@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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e18a3866 |
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16-Nov-2023 |
Nathan Chancellor <nathan@kernel.org> |
mmc: sdhci-of-dwcmshc: Use logical OR instead of bitwise OR in dwcmshc_probe() Clang warns (or errors with CONFIG_WERROR=y): drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: error: use of bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical] 873 | if ((device_property_read_bool(dev, "mmc-ddr-1_8v")) | | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 874 | (device_property_read_bool(dev, "mmc-hs200-1_8v")) | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | || 875 | (device_property_read_bool(dev, "mmc-hs400-1_8v"))) | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: note: cast one or both operands to int to silence this warning drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: error: use of bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical] 873 | if ((device_property_read_bool(dev, "mmc-ddr-1_8v")) | | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | || 874 | (device_property_read_bool(dev, "mmc-hs200-1_8v")) | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: note: cast one or both operands to int to silence this warning 2 errors generated. There is little reason for this if statement to use bitwise ORs, as the short circuiting of logical OR does not need to be avoided in this context; it would be wasteful to call device_property_read_bool() three times if the first two calls returned true. Switch to logical OR to fix the warning. While in the area, the parentheses around the calls to device_property_read_bool() are not necessary and make the if statement harder to read, so remove them. Closes: https://github.com/ClangBuiltLinux/linux/issues/1960 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Drew Fustini <dfustini@baylibre.com> Link: https://lore.kernel.org/r/20231116-sdhci-of-dwcmshc-fix-wbitwise-instead-of-logical-v1-1-7e1a7f4ccaab@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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43658a54 |
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09-Nov-2023 |
Drew Fustini <dfustini@baylibre.com> |
mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520 Add support for the mmc controller in the T-Head TH1520 with the new compatible "thead,th1520-dwcmshc". Implement custom sdhci_ops for set_uhs_signaling, reset, voltage_switch, and platform_execute_tuning. Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Drew Fustini <dfustini@baylibre.com> Link: https://lore.kernel.org/r/20231109-th1520-mmc-v5-3-018bd039cf17@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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48fe8fad |
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22-Aug-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Add runtime PM operations This commit implements the runtime PM operations to disable eMMC card clock when idle. Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230822195929.168552-2-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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a11937b3 |
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22-Aug-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Add error handling in dwcmshc_resume This commit adds handling in dwcmshc_resume() for different error cases. Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230822195929.168552-1-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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5905a1f1 |
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27-Jul-2023 |
Yangtao Li <frank.li@vivo.com> |
mmc: sdhci-of-dwcmshc: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Yangtao Li <frank.li@vivo.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230727070051.17778-26-frank.li@vivo.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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c62da8a8 |
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18-Jul-2023 |
Rob Herring <robh@kernel.org> |
mmc: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230718143054.1065288-1-robh@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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49502408 |
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09-Mar-2023 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sdhci-of-dwcmshc: properly determine max clock on Rockchip Currently .get_max_clock returns the current clock rate for cclk_emmc on rk35xx, thus max clock gets set to whatever bootloader set it to. In case of u-boot, it is intentionally reset to 50 MHz if it boots from eMMC, see mmc_deinit() in u-boot sources. As a result, HS200 and HS400 modes are never selected by Linux, because dwcmshc_rk35xx_postinit clears appropriate caps if host->mmc->f_max is < 52MHz cclk_emmc is not a fixed clock on rk35xx, so using sdhci_pltfm_clk_get_max_clock is not appropriate here. Implement rk35xx_get_max_clock that returns actual max clock for cclk_emmc. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230310010349.509132-1-anarsoul@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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cfd4ea48 |
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02-Feb-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: add the missing device table IDs for acpi This commit adds the missing MODULE_DEVICE_TABLE for acpi, or else it won't be loaded automatically when compiled as a kernel module. Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Link: https://lore.kernel.org/r/f57ad0f8fdf663465bca74467c344dfa305a3199.1675305696.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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b75a52b0 |
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01-Feb-2023 |
Shawn Lin <shawn.lin@rock-chips.com> |
mmc: sdhci-of-dwcmshc: Update DLL and pre-change delay for rockchip platform For Rockchip platform, DLL bypass bit and start bit need to be set if DLL is not locked. And adjust pre-change delay to 0x3 for better signal test result. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1675298118-64243-2-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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95921151 |
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11-Jan-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: enable host V4 support for BlueField-3 SoC This commit enables SDHCI Host V4 support on Bluefield-3 SoC to be consistent with the default setting in firmware(UEFI). Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/990885f566c32ac8e6888ad6b434fb70d1a5d7af.1673460632.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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a0753ef6 |
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09-Aug-2022 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform support") introduces the use of_device_get_match_data() to check for some chips. Unfortunately, it also breaks the BlueField-3 FW, which uses ACPI. To fix the problem, let's add the ACPI match data and the corresponding quirks to re-enable the support for the BlueField-3 SoC. Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 08f3dff799d4 ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220809173742.178440-1-limings@nvidia.com [Ulf: Clarified the commit message a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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c6f361cb |
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04-May-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add support for rk3588 Add support for RK3588's DWCMSHC controller, which is used for providing the rootfs on the RK3588 evaluation board. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> [port from vendor BSP] Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-12-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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86e1a8e1 |
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04-May-2022 |
Sebastian Reichel <sebastian.reichel@collabora.com> |
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx Prepare driver for rk3588 support by renaming the internal data structures. Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-11-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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70f83220 |
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04-May-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs The reset function build in the SDHCI will not reset the logic circuit related to the tuning function, which may cause data reading errors. Resetting the complete SDHCI controller through the reset controller fixes the issue. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> [rebase, use optional variant of reset getter] Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-10-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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57ac3084 |
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24-Mar-2021 |
Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
mmc: sdhci-of-dwcmshc: set MMC_CAP_WAIT_WHILE_BUSY The host supports HW busy detection of the device busy signaling over dat0 line. Set MMC_CAP_wAIT_WHILE_BUSY host capability. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20210324154703.69f97fde@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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34884c4f |
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23-Mar-2021 |
Wei Yongjun <weiyongjun1@huawei.com> |
mmc: sdhci-of-dwcmshc: fix error return code in dwcmshc_probe() Fix to return negative error code -ENOMEM from the error handling case instead of 0, as done elsewhere in this function. Fixes: c2c4da37837e ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20210323112956.1016884-1-weiyongjun1@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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eb81ed51 |
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22-Mar-2021 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: add ACPI support for BlueField-3 SoC This commit adds ACPI support in the sdhci-of-dwcmshc driver for BlueField-3 SoC. It has changes to only use the clock hierarchy for Deviec Tree since the clk is not supported by ACPI. Instead, ACPI can define 'clock-frequency' which is parsed by existing sdhci_get_property(). This clock value will be returned in function dwcmshc_get_max_clock(). Signed-off-by: Liming Sun <limings@nvidia.com> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> Link: https://lore.kernel.org/r/1616453211-275165-1-git-send-email-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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08f3dff7 |
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16-Mar-2021 |
Shawn Lin <shawn.lin@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add rockchip platform support sdhci based synopsys MMC IP is also used on some rockchip platforms, so add a basic support here. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1615879102-45919-3-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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5f7dfda4 |
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10-Dec-2020 |
Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
mmc: sdhci-of-dwcmshc: set SDHCI_QUIRK2_PRESET_VALUE_BROKEN The SDHCI_PRESET_FOR_* registers are not set(all read as zeros), so set the quirk. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20201210165510.76b917e5@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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ca1219c0 |
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29-Dec-2020 |
Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
mmc: sdhci-of-dwcmshc: fix rpmb access Commit a44f7cb93732 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB") began to use ACMD23 for RPMB if the host supports ACMD23. In RPMB ACM23 case, we need to set bit 31 to CMD23 argument, otherwise RPMB write operation will return general fail. However, no matter V4 is enabled or not, the dwcmshc's ARGUMENT2 register is 32-bit block count register which doesn't support stuff bits of CMD23 argument. So let's handle this specific ACMD23 case. From another side, this patch also prepare for future v4 enabling for dwcmshc, because from the 4.10 spec, the ARGUMENT2 register is redefined as 32bit block count which doesn't support stuff bits of CMD23 argument. Fixes: a44f7cb93732 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB") Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20201229161625.38255233@xhacker.debian Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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a1a48919 |
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03-Sep-2020 |
Douglas Anderson <dianders@chromium.org> |
mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.19 This is like commit 3d3451124f3d ("mmc: sdhci-msm: Prefer asynchronous probe") but applied to a whole pile of drivers. This batch converts the drivers that appeared to be around in the v4.19 timeframe. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200903162412.4.I84eb3e0a738635d524c90d1a688087bc295f7c32@changeid Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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bccce2ec |
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15-May-2020 |
Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
mmc: sdhci-of-dwcmshc: add suspend/resume support Add dwcmshc specific system-level suspend and resume support. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20200515141926.52e088fe@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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554232e8 |
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13-May-2020 |
Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
mmc: sdhci-of-dwcmshc: implement specific set_uhs_signaling We need a different set_uhs_signaling implementation for MMC_TIMING_MMC_HS and MMC_TIMING_MMC_HS400. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20200513182602.3636a551@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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b85c997d |
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28-Aug-2018 |
Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation When using DMA, if the DMA addr spans 128MB boundary, we have to split the DMA transfer into two so that each one doesn't exceed the boundary. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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e438cf49 |
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06-Jul-2018 |
Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
mmc: sdhci-of-dwcmshc: add SDHCI OF Synopsys DWC MSHC driver Add a driver for SDHCI OF Synopsys DesignWare Cores Mobile Storage Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
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