Searched refs:subop (Results 1 - 20 of 20) sorted by relevance

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dvpe_6_1_fw_if.h59 #define VPE_CMD_HEADER(op, subop) \
60 (((subop << VPE_HEADER_SUB_OPCODE__SHIFT) & VPE_HEADER_SUB_OPCODE_MASK) | \
142 #define VPE_PLANE_CFG_CMD_HEADER(subop, nps0, npd0, nps1, npd1) \
143 (VPE_CMD_HEADER(VPE_CMD_OPCODE_PLANE_CFG, subop) | \
163 #define VPE_DIR_CFG_CMD_HEADER(subop, arr_sz) \
164 (VPE_CMD_HEADER(VPE_CMD_OPCODE_VPEP_CFG, subop) | \
179 #define VPE_IND_CFG_CMD_HEADER(subop, num_dst) \
180 (VPE_CMD_HEADER(VPE_CMD_OPCODE_VPEP_CFG, subop) | \
/linux-master/drivers/net/ethernet/fungible/funcore/
H A Dfun_hci.h151 __u8 subop; member in struct:fun_admin_simple_subop
159 .subop = (_subop), .flags = cpu_to_be16(_flags), \
185 __u8 subop; member in struct:fun_admin_generic_create_rsp
215 __u8 subop; member in struct:fun_admin_epcq_req::epcq_req_subop::fun_admin_epcq_create_req
242 __u8 subop; member in struct:fun_admin_epcq_req::epcq_req_subop::fun_admin_epcq_modify_req
259 .subop = (_subop), .flags = cpu_to_be16(_flags), \
276 .subop = (_subop), .flags = cpu_to_be16(_flags), \
297 __u8 subop; member in struct:fun_admin_epsq_req::epsq_req_subop::fun_admin_epsq_create_req
334 .subop = (_subop), .flags = cpu_to_be16(_flags), \
472 __u8 subop; /* se member in struct:fun_subop_imm
498 __u8 subop; member in struct:fun_dataop_gl
517 __u8 subop; member in struct:fun_dataop_imm
524 __u8 subop; member in struct:fun_subop_sgl
541 __u8 subop; member in struct:fun_dataop_rqbuf
578 __u8 subop; member in struct:fun_admin_port_req::port_req_subop::fun_admin_port_create_req
584 __u8 subop; member in struct:fun_admin_port_req::port_req_subop::fun_admin_port_write_req
592 __u8 subop; member in struct:fun_admin_port_req::port_req_subop::fun_admin_port_read_req
600 u8 subop; member in struct:fun_admin_port_req::port_req_subop::fun_admin_port_xcvr_read_req
613 __u8 subop; member in struct:fun_admin_port_req::port_req_subop::fun_admin_port_inetaddr_event_req
656 __u8 subop; member in struct:fun_admin_port_rsp::port_rsp_subop::fun_admin_port_create_rsp
664 __u8 subop; member in struct:fun_admin_port_rsp::port_rsp_subop::fun_admin_port_write_rsp
671 __u8 subop; member in struct:fun_admin_port_rsp::port_rsp_subop::fun_admin_port_read_rsp
678 __u8 subop; member in struct:fun_admin_port_rsp::port_rsp_subop::fun_admin_port_inetaddr_event_rsp
688 u8 subop; member in struct:fun_admin_port_xcvr_read_rsp
716 __u8 subop; member in struct:fun_admin_port_notif
751 __u8 subop; member in struct:fun_admin_rss_req::rss_req_subop::fun_admin_rss_create_req
789 __u8 subop; member in struct:fun_admin_vi_req::vi_req_subop::fun_admin_vi_create_req
811 __u8 subop; member in struct:fun_admin_eth_req::eth_req_subop::fun_admin_eth_create_req
848 __u8 subop; member in struct:fun_admin_swu_req::swu_req_subop::fun_admin_swu_create_req
854 __u8 subop; member in struct:fun_admin_swu_req::swu_req_subop::fun_admin_swu_upgrade_req
865 __u8 subop; member in struct:fun_admin_swu_req::swu_req_subop::fun_admin_swu_upgrade_data_req
905 __u8 subop; member in struct:fun_admin_swu_rsp::swu_rsp_subop::fun_admin_swu_create_rsp
911 __u8 subop; member in struct:fun_admin_swu_rsp::swu_rsp_subop::fun_admin_swu_upgrade_rsp
922 __u8 subop; member in struct:fun_admin_swu_rsp::swu_rsp_subop::fun_admin_swu_upgrade_data_rsp
952 __u8 subop; member in struct:fun_admin_ktls_create_req
967 __u8 subop; member in struct:fun_admin_ktls_create_rsp
975 __u8 subop; member in struct:fun_admin_ktls_modify_req
1008 __u8 subop; member in struct:fun_admin_ktls_modify_rsp
1226 __u8 subop; member in struct:fun_admin_adi_req::adi_req_subop::fun_admin_adi_write_req
[all...]
/linux-master/drivers/net/ethernet/fungible/funeth/
H A Dfuneth_ktls.c11 .subop = FUN_ADMIN_SUBOP_CREATE,
27 .subop = FUN_ADMIN_SUBOP_MODIFY,
86 req.subop = FUN_ADMIN_SUBOP_MODIFY;
110 req.subop = FUN_ADMIN_SUBOP_MODIFY;
H A Dfuneth_main.c159 .u.write.subop = FUN_ADMIN_SUBOP_WRITE,
1920 if (rsp->subop == FUN_ADMIN_SUBOP_NOTIFY) {
1922 } else if (rsp->subop == FUN_ADMIN_SUBOP_RES_COUNT) {
1931 dev_info(fdev->dev, "adminq event unexpected op %u subop %u",
1932 op, rsp->subop);
/linux-master/drivers/acpi/acpica/
H A Dpsargs.c710 u32 subop; local
804 subop = acpi_ps_peek_opcode(parser_state);
805 if (subop == 0 ||
806 acpi_ps_is_leading_char(subop) ||
807 ACPI_IS_ROOT_PREFIX(subop) ||
808 ACPI_IS_PARENT_PREFIX(subop)) {
838 subop = acpi_ps_peek_opcode(parser_state);
839 if (subop == 0 ||
840 acpi_ps_is_leading_char(subop) ||
841 ACPI_IS_ROOT_PREFIX(subop) ||
[all...]
/linux-master/arch/parisc/math-emu/
H A Dfpudispatch.c110 * extract the 3 bit subop field. For all but class 1 instructions, it is
115 * extract the 2 or 3 bit subop field from class 1 instructions. It is located
184 u_int class, subop; local
197 subop = get_subop1_PA2_0(ir);
199 subop = get_subop1_PA1_1(ir);
202 subop = get_subop(ir);
204 if (FPUDEBUG) printk("class %d subop %d\n", class, subop);
209 return(decode_0c(ir,class,subop,fpregs));
211 return(decode_0e(ir,class,subop,fpreg
239 u_int class, subop, major; local
275 decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[]) argument
[all...]
/linux-master/drivers/mtd/nand/raw/
H A Darasan-nand-controller.c596 const struct nand_subop *subop,
610 for (op_id = 0; op_id < subop->ninstrs; op_id++) {
615 instr = &subop->instrs[op_id];
628 offset = nand_subop_get_addr_start_off(subop, op_id);
629 naddrs = nand_subop_get_num_addr_cyc(subop, op_id);
645 offset = nand_subop_get_data_start_off(subop, op_id);
648 nfc_op->len = nand_subop_get_data_len(subop, op_id);
724 const struct nand_subop *subop,
731 ret = anfc_parse_instructions(chip, subop, &nfc_op);
748 const struct nand_subop *subop)
595 anfc_parse_instructions(struct nand_chip *chip, const struct nand_subop *subop, struct anfc_op *nfc_op) argument
723 anfc_misc_data_type_exec(struct nand_chip *chip, const struct nand_subop *subop, u32 prog_reg) argument
747 anfc_param_read_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
753 anfc_data_read_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
775 anfc_param_write_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
781 anfc_data_write_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
787 anfc_misc_zerolen_type_exec(struct nand_chip *chip, const struct nand_subop *subop, u32 prog_reg) argument
812 anfc_status_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
833 anfc_reset_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
839 anfc_erase_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
845 anfc_wait_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
[all...]
H A Dvf610_nfc.c348 vf610_get_next_instr(const struct nand_subop *subop, int *op_id) argument
350 if (*op_id + 1 >= subop->ninstrs)
355 return &subop->instrs[*op_id];
359 const struct nand_subop *subop)
373 instr = vf610_get_next_instr(subop, &op_id);
381 instr = vf610_get_next_instr(subop, &op_id);
385 int naddrs = nand_subop_get_num_addr_cyc(subop, op_id);
386 int i = nand_subop_get_addr_start_off(subop, op_id);
398 instr = vf610_get_next_instr(subop, &op_id);
402 trfr_sz = nand_subop_get_data_len(subop, op_i
358 vf610_nfc_cmd(struct nand_chip *chip, const struct nand_subop *subop) argument
[all...]
H A Dmarvell_nand.c476 * subop subset of instructions.
483 * @data_instr_idx: Index of the data instruction in the subop
484 * @data_instr: Pointer to the data instruction in the subop
1710 const struct nand_subop *subop,
1722 for (op_id = 0; op_id < subop->ninstrs; op_id++) {
1727 instr = &subop->instrs[op_id];
1744 offset = nand_subop_get_addr_start_off(subop, op_id);
1745 naddrs = nand_subop_get_num_addr_cyc(subop, op_id);
1771 len = nand_subop_get_data_len(subop, op_id);
1785 len = nand_subop_get_data_len(subop, op_i
1709 marvell_nfc_parse_instructions(struct nand_chip *chip, const struct nand_subop *subop, struct marvell_nfc_op *nfc_op) argument
1799 marvell_nfc_xfer_data_pio(struct nand_chip *chip, const struct nand_subop *subop, struct marvell_nfc_op *nfc_op) argument
1830 marvell_nfc_monolithic_access_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
1894 marvell_nfc_naked_access_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
1966 marvell_nfc_naked_waitrdy_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
1980 marvell_nfc_read_id_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
2020 marvell_nfc_read_status_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
2060 marvell_nfc_reset_cmd_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
2089 marvell_nfc_erase_cmd_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
[all...]
H A Dnand_base.c2291 * @subop: Sub-operation to be passed to the NAND controller
2299 struct nand_subop subop; member in struct:nand_op_parser_ctx
2366 * @ctx->subop is updated with the set of instructions to be passed to the
2373 unsigned int instr_offset = ctx->subop.first_instr_start_off;
2375 const struct nand_op_instr *instr = ctx->subop.instrs;
2399 * start of the next subop chunk).
2433 * We have a match: update the subop structure accordingly and return
2436 ctx->subop.ninstrs = ninstrs;
2437 ctx->subop.last_instr_end_off = instr_offset;
2449 pr_debug("executing subop (C
2576 nand_subop_instr_is_valid(const struct nand_subop *subop, unsigned int instr_idx) argument
2582 nand_subop_get_start_off(const struct nand_subop *subop, unsigned int instr_idx) argument
2602 nand_subop_get_addr_start_off(const struct nand_subop *subop, unsigned int instr_idx) argument
2624 nand_subop_get_num_addr_cyc(const struct nand_subop *subop, unsigned int instr_idx) argument
2656 nand_subop_get_data_start_off(const struct nand_subop *subop, unsigned int instr_idx) argument
2678 nand_subop_get_data_len(const struct nand_subop *subop, unsigned int instr_idx) argument
[all...]
H A Dcadence-nand-controller.c2044 const struct nand_subop *subop)
2053 instr = &subop->instrs[op_id];
2074 const struct nand_subop *subop)
2087 instr = &subop->instrs[op_id];
2095 offset = nand_subop_get_addr_start_off(subop, op_id);
2096 naddrs = nand_subop_get_num_addr_cyc(subop, op_id);
2117 const struct nand_subop *subop)
2121 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_ERASE1) {
2128 instr = &subop->instrs[1];
2129 offset = nand_subop_get_addr_start_off(subop,
2043 cadence_nand_cmd_opcode(struct nand_chip *chip, const struct nand_subop *subop) argument
2073 cadence_nand_cmd_address(struct nand_chip *chip, const struct nand_subop *subop) argument
2116 cadence_nand_cmd_erase(struct nand_chip *chip, const struct nand_subop *subop) argument
2157 cadence_nand_cmd_data(struct nand_chip *chip, const struct nand_subop *subop) argument
2227 cadence_nand_cmd_waitrdy(struct nand_chip *chip, const struct nand_subop *subop) argument
[all...]
H A Dtegra_nand.c351 const struct nand_subop *subop)
361 for (op_id = 0; op_id < subop->ninstrs; op_id++) {
366 instr = &subop->instrs[op_id];
383 offset = nand_subop_get_addr_start_off(subop, op_id);
384 naddrs = nand_subop_get_num_addr_cyc(subop, op_id);
399 size = nand_subop_get_data_len(subop, op_id);
400 offset = nand_subop_get_data_start_off(subop, op_id);
409 size = nand_subop_get_data_len(subop, op_id);
410 offset = nand_subop_get_data_start_off(subop, op_id);
350 tegra_nand_cmd(struct nand_chip *chip, const struct nand_subop *subop) argument
H A Dpl35x-nand-controller.c663 const struct nand_subop *subop)
675 for (op_id = 0; op_id < subop->ninstrs; op_id++) {
676 instr = &subop->instrs[op_id];
691 offset = nand_subop_get_addr_start_off(subop, op_id);
692 naddrs = nand_subop_get_num_addr_cyc(subop, op_id);
707 len = nand_subop_get_data_len(subop, op_id);
662 pl35x_nand_exec_op(struct nand_chip *chip, const struct nand_subop *subop) argument
H A Drockchip-nand-controller.c332 const struct nand_subop *subop)
342 for (i = 0; i < subop->ninstrs; i++) {
343 const struct nand_op_instr *instr = &subop->instrs[i];
352 remaining = nand_subop_get_num_addr_cyc(subop, i);
353 start = nand_subop_get_addr_start_off(subop, i);
362 start = nand_subop_get_data_start_off(subop, i);
363 cnt = nand_subop_get_data_len(subop, i);
331 rk_nfc_cmd(struct nand_chip *chip, const struct nand_subop *subop) argument
H A Dqcom_nandc.c2593 const struct nand_subop *subop,
2600 for (op_id = 0; op_id < subop->ninstrs; op_id++) {
2604 instr = &subop->instrs[op_id];
2617 offset = nand_subop_get_addr_start_off(subop, op_id);
2618 naddrs = nand_subop_get_num_addr_cyc(subop, op_id);
2681 const struct nand_subop *subop)
2695 ret = qcom_parse_instructions(chip, subop, &q_op);
2738 len = nand_subop_get_data_len(subop, op_id);
2745 static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
2755 ret = qcom_parse_instructions(chip, subop,
2592 qcom_parse_instructions(struct nand_chip *chip, const struct nand_subop *subop, struct qcom_op *q_op) argument
2680 qcom_read_status_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
2796 qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
2854 qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_subop *subop) argument
[all...]
H A Dsunxi_nand.c1765 const struct nand_subop *subop)
1773 for (i = 0; i < subop->ninstrs; i++) {
1774 const struct nand_op_instr *instr = &subop->instrs[i];
1791 remaining = nand_subop_get_num_addr_cyc(subop, i);
1792 start = nand_subop_get_addr_start_off(subop, i);
1806 start = nand_subop_get_data_start_off(subop, i);
1807 remaining = nand_subop_get_data_len(subop, i);
1861 const struct nand_subop *subop)
1864 subop->instrs[0].ctx.waitrdy.timeout_ms);
1764 sunxi_nfc_exec_subop(struct nand_chip *nand, const struct nand_subop *subop) argument
1860 sunxi_nfc_soft_waitrdy(struct nand_chip *nand, const struct nand_subop *subop) argument
/linux-master/drivers/gpu/host1x/hw/
H A Ddebug_hw.c44 unsigned int mask, subop, num, opcode; local
142 subop = val >> 24 & 0xf;
143 if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK)
146 else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK)
/linux-master/drivers/scsi/csiostor/
H A Dcsio_isr.c151 uint8_t subop; local
158 subop = FW_SCSI_ABRT_CLS_WR_SUB_OPCODE_GET(
163 subop ? "Close" : "Abort",
167 if (subop)
/linux-master/include/linux/mtd/
H A Drawnand.h869 unsigned int nand_subop_get_addr_start_off(const struct nand_subop *subop,
871 unsigned int nand_subop_get_num_addr_cyc(const struct nand_subop *subop,
873 unsigned int nand_subop_get_data_start_off(const struct nand_subop *subop,
875 unsigned int nand_subop_get_data_len(const struct nand_subop *subop,
966 int (*exec)(struct nand_chip *chip, const struct nand_subop *subop);
/linux-master/drivers/mtd/nand/raw/atmel/
H A Dnand-controller.c633 const struct nand_subop *subop)
642 for (i = 0; i < subop->ninstrs; i++) {
643 const struct nand_op_instr *instr = &subop->instrs[i];
650 for (j = nand_subop_get_addr_start_off(subop, i);
651 j < nand_subop_get_num_addr_cyc(subop, i); j++) {
661 const struct nand_subop *subop)
663 const struct nand_op_instr *instr = subop->instrs;
679 const struct nand_subop *subop)
681 const struct nand_op_instr *instr = subop->instrs;
632 atmel_hsmc_exec_cmd_addr(struct nand_chip *chip, const struct nand_subop *subop) argument
660 atmel_hsmc_exec_rw(struct nand_chip *chip, const struct nand_subop *subop) argument
678 atmel_hsmc_exec_waitrdy(struct nand_chip *chip, const struct nand_subop *subop) argument

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