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4120aa0e |
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06-Mar-2024 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Ensure continuous reads are well disabled The cont_read.ongoing flag should only be enabled at the beginning of a read operation, and also disabled at its end, so we never end up triggering nasty side effects outside of this scope. The mtd core being highly serialized, we should not be bothered by parallel accesses anyway. In case we reach the end of a read operation and the boolean was not properly disabled, it's a bug, but it's totally manageable. So warn, and then fix the boolean state. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240307115315.1942678-2-miquel.raynal@bootlin.com
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78ffbefb |
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06-Mar-2024 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Constrain even more when continuous reads are enabled As a matter of fact, continuous reads require additional handling at the operation level in order for them to work properly. The core helpers do have this additional logic now, but any time a controller implements its own page helper, this extra logic is "lost". This means we need another level of per-controller driver checks to ensure they can leverage continuous reads. This is for now unsupported, so in order to ensure continuous reads are enabled only when fully using the core page helpers, we need to add more initial checks. Also, as performance is not relevant during raw accesses, we also prevent these from enabling the feature. This should solve the issue seen with controllers such as the STM32 FMC2 when in sequencer mode. In this case, the continuous read feature would be enabled but not leveraged, and most importantly not disabled, leading to further operations to fail. Reported-by: Christophe Kerello <christophe.kerello@foss.st.com> Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Christophe Kerello <christophe.kerello@foss.st.com> Link: https://lore.kernel.org/linux-mtd/20240307115315.1942678-1-miquel.raynal@bootlin.com
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6fb075fc |
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22-Feb-2024 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Ensure all continuous terms are always in sync While crossing a LUN boundary, it is probably safer (and clearer) to keep all members of the continuous read structure aligned, including the pause page (which is the last page of the lun or the last page of the continuous read). Once these members properly in sync, we can use the rawnand_cap_cont_reads() helper everywhere to "prepare" the next continuous read if there is one. Fixes: bbcd80f53a5e ("mtd: rawnand: Prevent crossing LUN boundaries during sequential reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223115545.354541-4-miquel.raynal@bootlin.com
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df9803bf |
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22-Feb-2024 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Add a helper for calculating a page index For LUN crossing boundaries, it is handy to know what is the index of the last page in a LUN. This helper will soon be reused. At the same time I rename page_per_lun to ppl in the calling function to clarify the lines. Cc: stable@vger.kernel.org # v6.7 Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223115545.354541-3-miquel.raynal@bootlin.com
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c7ee7c8d |
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22-Feb-2024 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Fix and simplify again the continuous read derivations We need to avoid the first page if we don't read it entirely. We need to avoid the last page if we don't read it entirely. While rather simple, this logic has been failed in the previous fix. This time I wrote about 30 unit tests locally to check each possible condition, hopefully I covered them all. Reported-by: Christophe Kerello <christophe.kerello@foss.st.com> Closes: https://lore.kernel.org/linux-mtd/20240221175327.42f7076d@xps-13/T/#m399bacb10db8f58f6b1f0149a1df867ec086bb0a Suggested-by: Christophe Kerello <christophe.kerello@foss.st.com> Fixes: 828f6df1bcba ("mtd: rawnand: Clarify conditions to enable continuous reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Christophe Kerello <christophe.kerello@foss.st.com> Link: https://lore.kernel.org/linux-mtd/20240223115545.354541-2-miquel.raynal@bootlin.com
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#
828f6df1 |
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15-Dec-2023 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Clarify conditions to enable continuous reads The current logic is probably fine but is a bit convoluted. Plus, we don't want partial pages to be part of the sequential operation just in case the core would optimize the page read with a subpage read (which would break the sequence). This may happen on the first and last page only, so if the start offset or the end offset is not aligned with a page boundary, better avoid them to prevent any risk. Cc: stable@vger.kernel.org Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Martin Hundebøll <martin@geanix.com> Link: https://lore.kernel.org/linux-mtd/20231215123208.516590-5-miquel.raynal@bootlin.com
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#
a62c4597 |
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15-Dec-2023 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Prevent sequential reads with on-die ECC engines Some devices support sequential reads when using the on-die ECC engines, some others do not. It is a bit hard to know which ones will break other than experimentally, so in order to avoid such a difficult and painful task, let's just pretend all devices should avoid using this optimization when configured like this. Cc: stable@vger.kernel.org Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Martin Hundebøll <martin@geanix.com> Link: https://lore.kernel.org/linux-mtd/20231215123208.516590-4-miquel.raynal@bootlin.com
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#
7c9414c8 |
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15-Dec-2023 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Fix core interference with sequential reads A couple of reports pointed at some strange failures happening a bit randomly since the introduction of sequential page reads support. After investigation it turned out the most likely reason for these issues was the fact that sometimes a (longer) read might happen, starting at the same page that was read previously. This is optimized by the raw NAND core, by not sending the READ_PAGE command to the NAND device and just reading out the data in a local cache. When this page is also flagged as being the starting point for a sequential read, it means the page right next will be accessed without the right instructions. The NAND chip will be confused and will not output correct data. In order to avoid such situation from happening anymore, we can however handle this case with a bit of additional logic, to postpone the initialization of the read sequence by one page. Reported-by: Alexander Shiyan <eagle.alexander923@gmail.com> Closes: https://lore.kernel.org/linux-mtd/CAP1tNvS=NVAm-vfvYWbc3k9Cx9YxMc2uZZkmXk8h1NhGX877Zg@mail.gmail.com/ Reported-by: Måns Rullgård <mans@mansr.com> Closes: https://lore.kernel.org/linux-mtd/yw1xfs6j4k6q.fsf@mansr.com/ Reported-by: Martin Hundebøll <martin@geanix.com> Closes: https://lore.kernel.org/linux-mtd/9d0c42fcde79bfedfe5b05d6a4e9fdef71d3dd52.camel@geanix.com/ Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Martin Hundebøll <martin@geanix.com> Link: https://lore.kernel.org/linux-mtd/20231215123208.516590-3-miquel.raynal@bootlin.com
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#
bbcd80f5 |
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15-Dec-2023 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Prevent crossing LUN boundaries during sequential reads The ONFI specification states that devices do not need to support sequential reads across LUN boundaries. In order to prevent such event from happening and possibly failing, let's introduce the concept of "pause" in the sequential read to handle these cases. The first/last pages remain the same but any time we cross a LUN boundary we will end and restart (if relevant) the sequential read operation. Cc: stable@vger.kernel.org Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Martin Hundebøll <martin@geanix.com> Link: https://lore.kernel.org/linux-mtd/20231215123208.516590-2-miquel.raynal@bootlin.com
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#
68cce21e |
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24-Nov-2023 |
David Regan <dregan@broadcom.com> |
mtd: rawnand: NAND controller write protect Allow NAND controller to be responsible for write protect pin handling during fast path and exec_op destructive operation when controller_wp flag is set. Signed-off-by: David Regan <dregan@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231125012438.15191-2-dregan@broadcom.com
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#
578dc962 |
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24-Nov-2023 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Add destructive operation Erase and program operations need the write protect (wp) pin to be de-asserted to take effect. Add the concept of destructive operation and pass the information to exec_op() so controllers know when they should de-assert this pin without having to decode the command opcode. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: David Regan <dregan@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231125012438.15191-1-dregan@broadcom.com
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#
6dc59740 |
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15-Jun-2023 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mtd: rawnand: Remove unused of_gpio.h inclusion The of_gpio.h is not and shouldn't be used in the drivers. Remove it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
f6ca3fb6 |
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22-Sep-2023 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
mtd: rawnand: Ensure the nand chip supports cached reads Both the JEDEC and ONFI specification say that read cache sequential support is an optional command. This means that we not only need to check whether the individual controller supports the command, we also need to check the parameter pages for both ONFI and JEDEC NAND flashes before enabling sequential cache reads. This fixes support for NAND flashes which don't support enabling cache reads, i.e. Samsung K9F4G08U0F or Toshiba TC58NVG0S3HTA00. Sequential cache reads are now only available for ONFI and JEDEC devices, if individual vendors implement this, it needs to be enabled per vendor. Tested on i.MX6Q with a Samsung NAND flash chip that doesn't support sequential reads. Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Cc: stable@vger.kernel.org Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230922141717.35977-1-r.czerwinski@pengutronix.de
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#
079c8d9d |
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05-Jul-2023 |
Arseniy Krasnov <AVKrasnov@sberdevices.ru> |
mtd: rawnand: export 'nand_exit_status_op()' Export this function to work in pair with 'nand_status_op()' which is already exported. Signed-off-by: Arseniy Krasnov <AVKrasnov@sberdevices.ru> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230705104403.696680-2-AVKrasnov@sberdevices.ru
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#
003fe4b9 |
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12-Jan-2023 |
JaimeLiao <jaimeliao.tw@gmail.com> |
mtd: rawnand: Support for sequential cache reads Add support for sequential cache reads for controllers using the generic core helpers for their fast read/write helpers. Sequential reads may reduce the overhead when accessing physically continuous data by loading in cache the next page while the previous page gets sent out on the NAND bus. The ONFI specification provides the following additional commands to handle sequential cached reads: * 0x31 - READ CACHE SEQUENTIAL: Requires the NAND chip to load the next page into cache while keeping the current cache available for host reads. * 0x3F - READ CACHE END: Tells the NAND chip this is the end of the sequential cache read, the current cache shall remain accessible for the host but no more internal cache loading operation is required. On the bus, a multi page read operation is currently handled like this: 00 -- ADDR1 -- 30 -- WAIT_RDY (tR+tRR) -- DATA1_IN 00 -- ADDR2 -- 30 -- WAIT_RDY (tR+tRR) -- DATA2_IN 00 -- ADDR3 -- 30 -- WAIT_RDY (tR+tRR) -- DATA3_IN Sequential cached reads may instead be achieved with: 00 -- ADDR1 -- 30 -- WAIT_RDY (tR) -- \ 31 -- WAIT_RDY (tRCBSY+tRR) -- DATA1_IN \ 31 -- WAIT_RDY (tRCBSY+tRR) -- DATA2_IN \ 3F -- WAIT_RDY (tRCBSY+tRR) -- DATA3_IN Below are the read speed test results with regular reads and sequential cached reads, on NXP i.MX6 VAR-SOM-SOLO in mapping mode with a NAND chip characterized with the following timings: * tR: 20 µs * tRCBSY: 5 µs * tRR: 20 ns and the following geometry: * device size: 2 MiB * eraseblock size: 128 kiB * page size: 2 kiB ============= Normal read @ 33MHz ================= mtd_speedtest: eraseblock read speed is 15633 KiB/s mtd_speedtest: page read speed is 15515 KiB/s mtd_speedtest: 2 page read speed is 15398 KiB/s =================================================== ========= Sequential cache read @ 33MHz =========== mtd_speedtest: eraseblock read speed is 18285 KiB/s mtd_speedtest: page read speed is 15875 KiB/s mtd_speedtest: 2 page read speed is 16253 KiB/s =================================================== We observe an overall speed improvement of about 5% when reading 2 pages, up to 15% when reading an entire block. This is due to the ~14us gain on each additional page read (tR - (tRCBSY + tRR)). Co-developed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-4-miquel.raynal@bootlin.com
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#
b1f9ffbf |
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12-Jan-2023 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Prepare the late addition of supported operation checks Add an empty envelope just to show how to add additional checks for new operations. This is going to be used for sequential cached reads, which require the page size to be known (and the discovery to be over), hence the "late" designation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-3-miquel.raynal@bootlin.com
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#
9f820fc0 |
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12-Jan-2023 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Check the data only read pattern only once Instead of checking if a pattern is supported each time we need it, let's create a bitfield that only the core would be allowed to fill at startup time. The core and the individual drivers may then use it in order to check what operation they should use. This bitfield is supposed to grow over time. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-2-miquel.raynal@bootlin.com
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83f0869e |
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24-Oct-2022 |
Adam Borowski <kilobyte@angband.pl> |
mtd: rawnand: placate "$VARIABLE is used uninitialized" warnings The compiler is not smart enough to notice that it's impossible for them to be actually used uninitialized. Which exact variables trip here varies depending on random surrounding code; none triggered in 6.1-rc1 but 6.1-rc2 fails on three of these five, despite variables declared in the very same line having identical flow. Signed-off-by: Adam Borowski <kilobyte@angband.pl> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221024092026.42123-1-kilobyte@angband.pl
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#
c26ef845 |
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30-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mtd: rawnand: Replace of_gpio_named_count() by gpiod_count() As a preparation to unexport of_gpio_named_count(), convert the driver to use gpiod_count() instead. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220830183336.49966-1-andriy.shevchenko@linux.intel.com
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ddfa68d4 |
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18-Aug-2022 |
ChenXiaoSong <chenxiaosong2@huawei.com> |
mtd: rawnand: remove misguided comment of nand_get_device() After commit 8cba323437a4 ("mtd: rawnand: protect access to rawnand devices while in suspend"), it will wait while in suspend rather than returning errors. So remove the misguided comment about return value. Signed-off-by: ChenXiaoSong <chenxiaosong2@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220819021846.2924539-1-chenxiaosong2@huawei.com
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#
7bea6056 |
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29-Jun-2022 |
Michał Kępień <kernel@kempniu.pl> |
mtd: add ECC error accounting for each read request Extend struct mtd_req_stats with two new fields holding the number of corrected bitflips and uncorrectable errors detected during a read operation. This is a prerequisite for ultimately passing those counters to user space, where they can be useful to applications for making better-informed choices about moving data around. Unlike 'max_bitflips' (which is set - in a common code path - to the return value of a function called while the MTD device's mutex is held), these counters have to be maintained in each MTD driver which defines the '_read_oob' callback because the statistics need to be calculated while the MTD device's mutex is held. Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Michał Kępień <kernel@kempniu.pl> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220629125737.14418-4-kernel@kempniu.pl
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f7c48bcc |
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26-Mar-2022 |
Rafał Miłecki <rafal@milecki.pl> |
mtd: rawnand: print offset instead of page number for bad blocks This makes printed info consistent with other kernel messages. After scanning NAND BBT create_bbt() prints offset of each bad block. This change makes is easy to verify nand_erase_nand() failure reason. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220326163304.30806-1-zajec5@gmail.com
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8cba3234 |
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08-Feb-2022 |
Sean Nyekjaer <sean@geanix.com> |
mtd: rawnand: protect access to rawnand devices while in suspend Prevent rawnand access while in a suspended state. Commit 013e6292aaf5 ("mtd: rawnand: Simplify the locking") allows the rawnand layer to return errors rather than waiting in a blocking wait. Tested on a iMX6ULL. Fixes: 013e6292aaf5 ("mtd: rawnand: Simplify the locking") Signed-off-by: Sean Nyekjaer <sean@geanix.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220208085213.1838273-1-sean@geanix.com
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#
ad5e35f5 |
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27-Jan-2022 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: Replace the expert mode symbols with a single helper Reduce the number of exported symbols by replacing: - mtd_expert_analysis_warning (the error string) - mtd_expert_analysis_mode (the boolean) with a single helper: - mtd_check_expert_analysis_mode Calling this helper will both check/return the content of the internal boolean -which is not exported anymore- and as well conditionally WARN_ONCE() the user, like it was done before. While on this function, make the error string local to the helper and set it const. Only export this helper when CONFIG_DEBUG_FS is defined to limit the growth of the Linux kernel size only for a debug feature on production kernels. Mechanically update all the consumers. Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220128113414.1121924-1-miquel.raynal@bootlin.com
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#
65a01be4 |
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06-Jan-2022 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
mtd: rawnand: Rework of_get_nand_bus_width() of_get_nand_bus_width() had a wrong behavior because: 1/ it ignored the -ENODATA and -EOVERFLOW return values of of_property_read_u32(). "nand-bus-width" without value was tolerated while it shouldn't have been according to the devicetree bindings. 2/ returned -EIO when the nand-bus-width was neither 8 nor 16, when it should have returned -EINVAL instead. 3/ returned the 8 or 16 bus-width integer, but it was never used it its caller. A simply return 0 on success is enough. Rework of_get_nand_bus_width() and address all the above. The execution is now stopped in case of errors. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220106131610.225661-2-tudor.ambarus@microchip.com
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#
dbfbe79d |
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06-Jan-2022 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
mtd: rawnand: Remove of_get_nand_on_flash_bbt() wrapper Remove the wrapper as it hides for no reason what we really want: find an of_property. Removing the wrapper makes the code easier to read. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220106131610.225661-1-tudor.ambarus@microchip.com
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#
67b967dd |
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17-Nov-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: Introduce an expert mode for forensics and debugging purposes When developping NAND controller drivers or when debugging filesystem corruptions, it is quite common to need hacking locally into the MTD/NAND core in order to get access to the content of the bad blocks. Instead of having multiple implementations out there let's provide a simple yet effective specific MTD-wide debugfs entry to fully disable these checks on purpose. A warning is added to inform the user when this mode gets enabled. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211118114659.1282855-1-miquel.raynal@bootlin.com
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#
d8466f73 |
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16-Oct-2021 |
Paul Cercueil <paul@crapouillou.net> |
mtd: rawnand: Export nand_read_page_hwecc_oob_first() Move the function nand_read_page_hwecc_oob_first() (previously nand_davinci_read_page_hwecc_oob_first()) to nand_base.c, and export it as a GPL symbol, so that it can be used by more modules. Cc: <stable@vger.kernel.org> # v5.2 Fixes: a0ac778eb82c ("mtd: rawnand: ingenic: Add support for the JZ4740") Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211016132228.40254-4-paul@crapouillou.net
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#
36a65982 |
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19-Nov-2021 |
Herve Codina <herve.codina@bootlin.com> |
mtd: rawnand: Fix nand_choose_best_timings() on unsupported interface When the NV-DDR interface is not supported by the NAND chip, the value of onfi->nvddr_timing_modes is 0. In this case, the best_mode variable value in nand_choose_best_nvddr_timings() is -1. The last for-loop is skipped and the function returns an uninitialized value. If this returned value is 0, the nand_choose_best_sdr_timings() is not executed and no 'best timing' are set. This leads the host controller and the NAND chip working at default mode 0 timing even if a better timing can be used. Fix this uninitialized returned value. nand_choose_best_sdr_timings() is pretty similar to nand_choose_best_nvddr_timings(). Even if onfi->sdr_timing_modes should never be seen as 0, nand_choose_best_sdr_timings() returned value is fixed. Fixes: a9ecc8c814e9 ("mtd: rawnand: Choose the best timings, NV-DDR included") Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211119150316.43080-3-herve.codina@bootlin.com
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16d8b628 |
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19-Nov-2021 |
Herve Codina <herve.codina@bootlin.com> |
mtd: rawnand: Fix nand_erase_op delay NAND_OP_CMD() expects a delay parameter in nanoseconds. The delay value is wrongly given in milliseconds. Fix the conversion macro used in order to set this delay in nanoseconds. Fixes: d7a773e8812b ("mtd: rawnand: Access SDR and NV-DDR timings through a common macro") Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211119150316.43080-2-herve.codina@bootlin.com
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b4802708 |
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27-Jul-2021 |
Manivannan Sadhasivam <mani@kernel.org> |
mtd: rawnand: Fix probe failure due to of_get_nand_secure_regions() Due to 14f97f0b8e2b, the rawnand platforms without "secure-regions" property defined in DT fails to probe. The issue is, of_get_nand_secure_regions() errors out if of_property_count_elems_of_size() returns a negative error code. If the "secure-regions" property is not present in DT, then also we'll get -EINVAL from of_property_count_elems_of_size() but it should not be treated as an error for platforms not declaring "secure-regions" in DT. So fix this behaviour by checking for the existence of that property in DT and return 0 if it is not present. Fixes: 14f97f0b8e2b ("mtd: rawnand: Add a check in of_get_nand_secure_regions()") Reported-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Martin Kaiser <martin@kaiser.cx> Tested-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210727062813.32619-1-manivannan.sadhasivam@linaro.org
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14f97f0b |
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17-Jun-2021 |
Dan Carpenter <dan.carpenter@oracle.com> |
mtd: rawnand: Add a check in of_get_nand_secure_regions() Check for whether of_property_count_elems_of_size() returns a negative error code. Fixes: 13b89768275d ("mtd: rawnand: Add support for secure regions in NAND memory") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/YMtQFXE0F1w7mUh+@mwanda
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b85c943d |
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26-May-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Add a helper to parse the gpio-cs DT property New chips may feature a lot of CS because of their extended length. As many controllers have been designed a decade ago, they usually only feature just a couple. This does not mean that the entire range of these chips cannot be accessed: it is just a matter of adding more GPIO CS in the hardware design. A DT property has been added to describe the CS array: cs-gpios. Here is the code parsing it this new property, allocating what needs to be, requesting the GPIOs and returning an array with the additional available CS. The first entries of this array are left empty and are reserved for native CS. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210526093242.183847-3-miquel.raynal@bootlin.com
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a9ecc8c8 |
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05-May-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Choose the best timings, NV-DDR included Now that the necessary peaces to support the NV-DDR interface type have been contributed, let's add the relevant logic to make use of it. In particular, the core does not choose the best SDR timings anymore but calls a more generic helper instead. This helper checks if NV-DDR is supported by trying to find the best NV-DDR supported mode through a logic very close to what is being done for SDR timings. If no NV-DDR mode in common between the NAND controller and the NAND chip is found, the core will fallback to SDR. Side note: theoretically, the data clock speed in NV-DDR mode 0 is slower than in SDR mode 5. In the situation where we would get a working NV-DDR mode 0, we could also try if SDR mode 5 is supported and eventually fallback to it in order to get the fastest possible throughput. However, in the field, it looks like most of the devices supporting NV-DDR avoid implementing the fastest SDR modes (like 4 and 5 EDO modes, which are a bit more complicated to handle than the other SDR modes). So, we will stick to the simplest logic: try NV-DDR otherwise fallback to SDR. If someone else experiences strong differences because of that we may still implement the logic defined above. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-19-miquel.raynal@bootlin.com
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9d3194bf |
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05-May-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Allow SDR timings to be nacked This should never happen in theory and is probably a controller driver bug. Anyway it's probably better to bail out at this point if this happens rather than continuing the boot process. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-18-miquel.raynal@bootlin.com
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f3fe156e |
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05-May-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Support enabling NV-DDR through SET_FEATURES Until now the parameter of the ADDR_TIMING_MODE feature was just the ONFI timing mode (from 0 to 5) because we were only supporting the SDR data interface. In the same byte, bits 4 and 5 indicate which data interface is being configured so use them to set the right mode and also read them back to ensure the right timing has been setup on the chip's side. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-17-miquel.raynal@bootlin.com
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09cdb237 |
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05-May-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Handle the double bytes in NV-DDR mode As explained in chapter "NV-DDR / NV-DDR2 / NV-DDR3 and Repeat Bytes" of the ONFI specification, with some commands (mainly the commands which do not transfer actual data) the data bytes are repeated twice and it is the responsibility of the receiver to discard them properly. The concerned commands are: SET_FEATURES, READ_ID, GET_FEATURES, READ_STATUS, READ_STATUS_ENHANCED, ODT_CONFIGURE. Hence, in the NAND core we are only impacted by the implementation of READ_ID, GET_FEATURES and READ_STATUS. The logic is the same for all: 2/ Check if it is relevant to read all data bytes twice. 1/ Allocate a buffer with twice the requested size (may be done statically). 2/ Update the instruction structure to read these extra bytes in the allocated buffer. 3/ Copy the even bytes into the original buffer. The performance hit is negligible on such small data transfers anyway and we don't really care about performances at this stage anyway. 4/ Free the allocated buffer, if any. Note: nand_data_read_op() is also impacted because it is theoretically possible to run the command/address cycles first, and, as another operation, do the data transfers. In this case we can easily identify the impacted commands because the force_8bit flag will be set (due to the same reason: their data does not go through the same pipeline). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-15-miquel.raynal@bootlin.com
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d7a773e8 |
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05-May-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Access SDR and NV-DDR timings through a common macro Most timings related to the bus timings are different between SDR and NV-DDR. However, we identified 9 individual timings which are more related to the NAND chip internals. These are common between the two interface types. Fortunately, only these common timings are being shared through the NAND core and its ->exec_op() interface, which allows the writing of a simple macro checking the interface type and depending on it, returning either the relevant SDR timing or the NV-DDR timing. This is the purpose of the NAND_COMMON_TIMING_PS() macro. As all this is evaluated at build time, one will immediately be notified in case a non common timing is being accessed through this macro. Two handy macros are also inserted at the same time, which use PSEC_TO_NSEC or PSEC_TO_MSEC so that it is very easy to return timings in milli-, nano- or pico-seconds, as usually requested by the internal API. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-14-miquel.raynal@bootlin.com
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dbb7b2e0 |
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05-May-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use more recent ONFI specification wording In particular, first ONFI specifications referred to SDR modes as asynchronous modes, which is not the term we usually have in mind. The spec has then been updated, so do the same here in the NAND subsystem to avoid any possible confusion. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-7-miquel.raynal@bootlin.com
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4d888ece |
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20-Apr-2021 |
Dan Carpenter <dan.carpenter@oracle.com> |
mtd: rawnand: silence static checker warning in nand_setup_interface() Smatch complains that the error code is not set on this error path: drivers/mtd/nand/raw/nand_base.c:842 nand_setup_interface() warn: missing error code 'ret' But actually returning success is intentional because the NAND chip will still work in mode 0. This patch adds a "ret = 0;" assignment to make the intent more clear and to silence the static checker warning. It doesn't affect the compiled code because GCC optimises the assignment away. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/YH6Ugwz3gcga+q8X@mwanda
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13b89768 |
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02-Apr-2021 |
Manivannan Sadhasivam <mani@kernel.org> |
mtd: rawnand: Add support for secure regions in NAND memory On a typical end product, a vendor may choose to secure some regions in the NAND memory which are supposed to stay intact between FW upgrades. The access to those regions will be blocked by a secure element like Trustzone. So the normal world software like Linux kernel should not touch these regions (including reading). The regions are declared using a NAND chip DT property, "secure-regions". So let's make use of this property in the raw NAND core and skip access to the secure regions present in a system. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-4-manivannan.sadhasivam@linaro.org
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8ffbec7d |
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05-Feb-2021 |
Sascha Hauer <s.hauer@pengutronix.de> |
mtd: nand: fix error handling in nand_prog_page_op() #2 On success nand_exec_prog_page_op() returns the NAND status byte, but on failure it returns a negative error code. nand_prog_page_op() interprets the return value as NAND status byte without error checking. This means a failure in nand_exec_prog_page_op() can go through unnoticed. The straight forward fix would be to add the missing error checking. To clean the code a bit we can move the nand status check to nand_prog_page_op(). This way we can get rid of the overloaded return value from nand_exec_prog_page_op() and return a plain error code which is less error prone. nand_exec_prog_page_op() is only called from one other place and in this call the 'prog' parameter is false in which case the nand status check is skipped, so it's correct to not add the NAND status check there. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210205142725.13225-2-s.hauer@pengutronix.de
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ec9e0203 |
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05-Feb-2021 |
Sascha Hauer <s.hauer@pengutronix.de> |
mtd: nand: fix error handling in nand_prog_page_op() #1 On success chip->legacy.waitfunc() returns the NAND status byte, but on failure it returns a negative error code. This was never tested for and instead the return value was interpreted as NAND status without error checking. Add the missing error check. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210205142725.13225-1-s.hauer@pengutronix.de
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5b9215ac |
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27-Jan-2021 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Try not to use the ECC private structures Most of the time, there is no need to use the software ECC Hamming and BCH algorithms private context to know their configuration. All the data has been stored by their ->init_ctx() hook in the generic NAND ECC engine structure, so use this one when possible. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Adam Ford <aford173@gmail.com> #logicpd Torpedo Link: https://lore.kernel.org/linux-mtd/20210127203020.9574-7-miquel.raynal@bootlin.com
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35fe1b98 |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-hamming: Create the software Hamming engine Let's continue introducing the generic ECC engine abstraction in the NAND subsystem by instantiating a second ECC engine: software Hamming. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-20-miquel.raynal@bootlin.com
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19b2ce18 |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-hamming: Stop using raw NAND structures This code is meant to be reused by the SPI-NAND core. Now that the driver has been cleaned and reorganized, use a generic ECC engine object to store the driver's data instead of accessing members of the nand_chip structure. This means adding proper init/cleanup helpers. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-17-miquel.raynal@bootlin.com
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90ccf0a0 |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-hamming: Rename the exported functions Prefix by ecc_sw_hamming_ the functions which should be internal only but are exported for "raw" operations. Prefix by nand_ecc_sw_hamming_ the other functions which will be used in the context of the declaration of an Hamming proper ECC engine object. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-16-miquel.raynal@bootlin.com
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e5acf9c8 |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-hamming: Move Hamming code to the generic NAND layer Hamming ECC code might be later re-used by the SPI NAND layer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-12-miquel.raynal@bootlin.com
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9994bb3f |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-bch: Create the software BCH engine Let's continue introducing the generic ECC engine abstraction in the NAND subsystem by instantiating a first ECC engine: the software BCH one. While at it, make a very tidy ecc_sw_bch_init() function and move all the sanity checks and user input management in nand_ecc_sw_bch_init_ctx(). This second helper will be called from the raw RAND core. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-10-miquel.raynal@bootlin.com
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80fe6031 |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-bch: Stop using raw NAND structures This code is meant to be reused by the SPI-NAND core. Now that the driver has been cleaned and reorganized, use a generic ECC engine object to store the driver's data instead of accessing members of the nand_chip structure. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-9-miquel.raynal@bootlin.com
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ea146d7f |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-bch: Update the prototypes to be more generic These functions must be usable by the main NAND core, so their names must be technology-agnostic as well as the parameters. Hence, we pass a generic nand_device instead of a raw nand_chip structure. As it seems that changing the raw NAND functions to always pass a generic NAND device is a lost of time, we prefer to create dedicated raw NAND wrappers that will be useful in the near future to do the translation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-8-miquel.raynal@bootlin.com
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127aae60 |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-bch: Drop mtd_nand_has_bch() Like for any other compilation option, use the IS_ENABLED() macro instead of hardcoding it. By droping this helper we can get rid of the BCH header in nandsim.c. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-7-miquel.raynal@bootlin.com
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3c0fe36a |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-bch: Stop exporting the private structure The NAND BCH control structure has nothing to do outside of this driver, all users of the nand_bch_init/free() functions just save it to chip->ecc.priv so do it in this driver directly and return a regular error code instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-5-miquel.raynal@bootlin.com
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cdbe8df5 |
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29-Sep-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: ecc-bch: Move BCH code to the generic NAND layer BCH ECC code might be later re-used by the SPI NAND layer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-3-miquel.raynal@bootlin.com
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fb8c3810 |
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17-Sep-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
mtd: rawnand: Don't overwrite the error code from nand_set_ecc_soft_ops() The error code received from nand_set_ecc_soft_ops() was overwritten, drop this redundant assignment and use the error code received from the callee. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200917075213.532161-4-tudor.ambarus@microchip.com
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6e881279 |
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17-Sep-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
mtd: rawnand: Introduce nand_set_ecc_on_host_ops() There were too many levels of indentation and the code was hard to read. Introduce a new function, similar to nand_set_ecc_soft_ops(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200917075213.532161-3-tudor.ambarus@microchip.com
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b5156335 |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use the NAND framework user_conf object for ECC flags Instead of storing the ECC flags in chip->ecc.options, use nanddev->ecc.user_conf.flags. There is currently only one to save: NAND_ECC_MAXIMIZE. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-21-miquel.raynal@bootlin.com
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d7157ff4 |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use the ECC framework user input parsing bits Many helpers are generic to all NAND chips, they should not be raw-NAND specific, so use the generic ones. To avoid moving all the raw NAND core "history" into the generic NAND layer, we keep a part of this parsing in the raw NAND core to ensure backward compatibility. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-20-miquel.raynal@bootlin.com
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8c126720 |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use the ECC framework nand_ecc_is_strong_enough() helper Plus, the new helper has a more "english" name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-19-miquel.raynal@bootlin.com
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1e3b37aa |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use the ECC framework OOB layouts No need to have our own in the raw NAND core. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-18-miquel.raynal@bootlin.com
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c441bcd3 |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Make use of the ECC framework Just enable the ECC framework with raw NAND so that we can drop, one by one, all the unnecessary/redundant definitions. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-17-miquel.raynal@bootlin.com
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53576c7b |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use nanddev_get/set_ecc_requirements() when relevant Instead of accessing ->strength/step_size directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-15-miquel.raynal@bootlin.com
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bace41f8 |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use the new ECC engine type enumeration Mechanical switch from the legacy "mode" enumeration to the new "engine type" enumeration in drivers and board files. The device tree parsing is also updated to return the new enumeration from the old strings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
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ef24f97d |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Separate the ECC engine type and the ECC byte placement The use of "syndrome" placement should not be encoded in the ECC engine mode/type. Create a "placement" field in NAND chip and change all occurrences of the NAND_ECC_HW_SYNDROME enumeration to be just NAND_ECC_HW and possibly a placement entry like NAND_ECC_PLACEMENT_INTERLEAVED. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-10-miquel.raynal@bootlin.com
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e0a564ae |
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27-Aug-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Rename the ECC algorithm enumeration items NAND_ECC_ is not a meaningful prefix, use NAND_ECC_ALGO_ instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-3-miquel.raynal@bootlin.com
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#
35b6bcc9 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Allocate the interface configurations dynamically Instead of manipulating the statically allocated structure and copy timings around, allocate one at identification time and save it in the nand_chip structure once it has been initialized. All NAND chips using the same interface configuration during reset and startup, we define a helper to retrieve a single reset interface configuration object, shared across all NAND chips. We use a second pointer to always have a reference on the currently applied interface configuration, which may either point to the "best interface configuration" or to the "default reset interface configuration". Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-29-miquel.raynal@bootlin.com
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#
a69ad111 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Get rid of the default ONFI timing mode The ->choose_interface() hook is here for manufacturer drivers to provide a better timing interface than the default one, this field is not needed anymore. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-28-miquel.raynal@bootlin.com
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#
26d014f0 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Add the ->choose_interface_config() hook This hook can be overloaded by NAND manufacturer drivers to propose alternative timings when not following the main standards. In this case, the manufacturer drivers is responsible for choosing the best interface configuration that fits both the controller and chip capabilities. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-23-miquel.raynal@bootlin.com
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#
b5b39f64 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Introduce nand_choose_best_sdr_timings() Extract the logic out of nand_choose_interface_config() to create a public helper that can be reused by manufacturer drivers. Add the possibility to provide a specific set of timings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-22-miquel.raynal@bootlin.com
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#
42a9ad05 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: timings: Make onfi_fill_interface_config() a void helper Warn the user if the parameters are wrong but basically it would mean there is a serious issue in the NAND core. So no need to ever check its output, let's make this helper return void. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-21-miquel.raynal@bootlin.com
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#
4c46667b |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: s/data_interface/interface_config/ The name/suffix data_interface is a bit misleading in that the field or functions actually represent a configuration that can be applied by the controller/chip. Let's rename all fields/functions/hooks that are worth renaming. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
e0160cd4 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Hide the chip->data_interface indirection As a preparation for allocating the data interface structure dynamically (and rename it), let's avoid accessing chip->data_interface directly. Instead, we introduce a helper, nand_get_interface_config(), and use it to retrieve the current data interface configuration out of a nand_chip object. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-19-miquel.raynal@bootlin.com
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#
623c0141 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: timings: Provide onfi_fill_data_interface() with a data interface Right now the core uses onfi_fill_data_interface() to initialize the nand_data_interface object embedded in nand_chip, but we are about to allocate this object dynamically and let manufacturer drivers provide their own interface config. Let's patch the onfi_fill_data_interface() so it can initialize an interface config that's not the one currently attached to the nand_chip. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-14-miquel.raynal@bootlin.com
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#
5e179a53 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Rename nand_init_data_interface() This name is a bit misleading, what we do in this helper is trying to find the best SDR timings supported by the controller and the chip. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-12-miquel.raynal@bootlin.com
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#
8d69a80f |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Fix nand_setup_data_interface() description This is a copy/paste error and belongs to nand_init_data_interface() description. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-11-miquel.raynal@bootlin.com
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#
adcf98b2 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Rename nand_has_setup_data_iface() This is really a NAND controller hook so call it nand_controller_can_setup_data_iface(), which makes much more sense. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-10-miquel.raynal@bootlin.com
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#
fe7f7b08 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Use the data interface mode entry when relevant The data interface setup does not care about the default timing mode but cares about the actual timing mode at the time of the call of this helper. Use this entry instead and let chip->default_timing_mode only be used at initialization time. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-9-miquel.raynal@bootlin.com
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#
6ef10df3 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Compare the actual timing values Avoid relying just on the default timing mode to discriminate if the data interface must be restored. This field should only be used at initialization time by legacy chips statically defined. Do a memcmp() instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-8-miquel.raynal@bootlin.com
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#
271de009 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Rename the manufacturer structure It is currently called nand_manufacturer but could actually be called nand_manufacturer_desc, like its instances, so that the former name is left unused for now. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-5-miquel.raynal@bootlin.com
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#
8e8b2706 |
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29-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Create a nand_chip operations structure And move nand_chip hooks there. While moving entries from one structure to the other, adapt the documentation style. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-4-miquel.raynal@bootlin.com
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#
86f2b225 |
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26-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Add an invalid ECC mode to discriminate with valid ones NAND ECC modes (or providers) have their own enumeration but, unlike their algorithms counterpart, there is no invalid or uninitialized value to discriminate between an error and having chosen a no-ECC situation. Add an "invalid" entry for this purpose. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-7-miquel.raynal@bootlin.com
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#
dbc2f2e6 |
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26-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Return an enum from of_get_nand_ecc_algo() There is an enumeration to list ECC algorithm, let's use it instead of returning an int. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-6-miquel.raynal@bootlin.com
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#
74e24cd2 |
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26-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Drop OOB_FIRST placement scheme This scheme has been introduced for the Davinci controller and means that the OOB area must be read *before* the rest of the data. This has nothing to do with the ECC in OOB placement as it could be understood and most importantly, there is no point in having this function out of the Davinci NAND controller driver. A DT property for this scheme has been added but never used, even by the Davinci driver which only uses this scheme to change the default nand_read_page(). Move the main read_page() helper into the Davinci driver and remove the remaining boilerplate. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-4-miquel.raynal@bootlin.com
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#
f66a6fd0 |
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26-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Avoid a typedef In new code, the use of typedef is discouraged. Turn this one in the raw NAND core into a regular enumeration. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-3-miquel.raynal@bootlin.com
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#
9630a055 |
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19-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Stop using nand_release() This helper is not very useful and very often people get confused: they use nand_release() instead of nand_cleanup(). Now that all drivers have been converted to do not use nand_release() anymore, let's remove this helper. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Jonathan Corbet <corbet@lwn.net> Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-63-miquel.raynal@bootlin.com
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#
d7904619 |
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19-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Add nand_extract_bits() There are cases where ECC bytes are not byte-aligned. Indeed, BCH implies using a number of ECC bits, which are not always a multiple of 8. We then need a helper like nand_extract_bits() to extract these syndromes from a buffer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200519074549.23673-5-miquel.raynal@bootlin.com
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#
0651ed50 |
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19-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Ensure the number of bitflips is consistent The main NAND read page function can loop over "page reads" many times in if the reading reports uncorrectable error(s) and if the chip supports the read_retry feature. In this case, the number of bitflips is summarized between attempts. Fix this by re-initializing the entire mtd_ecc_stats object each time we retry. Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200519074549.23673-4-miquel.raynal@bootlin.com
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#
e45a4b65 |
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18-May-2020 |
Boris Brezillon <boris.brezillon@collabora.com> |
mtd: rawnand: Fix nand_gpio_waitrdy() Mimic what's done in nand_soft_waitrdy() and add one to the jiffies timeout so we don't end up waiting less than actually required. Reported-by: Tudor Ambarus <tudor.ambarus@microchip.com> Fixes: b0e137ad24b6c ("mtd: rawnand: Provide helper for polling GPIO R/B pin") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200518155237.297549-1-boris.brezillon@collabora.com
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#
1f1ec622 |
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04-May-2020 |
Boris Brezillon <boris.brezillon@collabora.com> |
mtd: rawnand: Propage CS selection to sub operations Some controller using the instruction parse infrastructure might need to know which CS a specific sub-operation is targeting. Let's propagate this information. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200505101353.1776394-2-boris.brezillon@collabora.com
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#
ec7cfc3d |
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11-May-2020 |
Boris Brezillon <boris.brezillon@collabora.com> |
mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag Some controllers with embedded ECC engines override the BBM marker with data or ECC bytes, thus making bad block detection through bad block marker impossible. Let's flag those chips so the core knows it shouldn't check the BBM and consider all blocks good. This should allow us to get rid of two implementers of the legacy.block_bad() hook. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200511064917.6255-1-boris.brezillon@collabora.com
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#
0e7f4b64 |
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06-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Allow controllers to overload soft ECC hooks Some controller drivers do not support executing regular nand_read/write_page_raw() helpers. For that, we created nand_monolithic_read/write_page_raw() alternatives. Let's now allow the driver to overload the ECC ->read/write_page_raw() hooks. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-13-miquel.raynal@bootlin.com
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#
658beb66 |
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06-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Expose monolithic read/write_page_raw() helpers The current nand_read/write_page_raw() helpers are already widely used but do not fit the purpose of "constrained" controllers which cannot, for instance, separate command/address cycles with data cycles. Workaround this issue by proposing alternative helpers that can be used by these controller drivers instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-12-miquel.raynal@bootlin.com
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#
b451f5be |
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06-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Give the possibility to verify a read operation is supported This can be used to discriminate between two path in the parameter page detection: use data_in cycles (like before) if supported, use the CHANGE READ COLUMN command otherwise. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-9-miquel.raynal@bootlin.com
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#
21b5cf3f |
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06-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Avoid indirect access to ->data_buf() The logic in nand_do_read_ops() is to use a bufpoi variable, either set to the original buffer, or set to a bounce buffer which in the end happens to be chip->data_buf depending on the value of the use_bounce_buf boolean. This is not a reason to call chip->data_buf directly when we know that we are using the bounce buffer. Let's use bufpoi instead to be consistent. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-7-miquel.raynal@bootlin.com
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#
64469073 |
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06-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Rename the use_bufpoi variables Both in nand_do_read_ops() and nand_do_write_ops() there is a boolean called use_bufpoi which is set to true in case of unaligned request or when there is a need for a DMA-able buffer. It basically means "use a bounce buffer". Depending on the value of use_bufpoi, the bufpoi variable is always used and will either point to the original buffer or to the nand_chip structure "internal data buffer" (this buffer is allocated with kmalloc() on purpose so that it will be DMA-compliant). In all cases bufpoi is used so the boolean name is misleading. Rename use_bufpoi to be use_bouce_buf to be more accurate. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-6-miquel.raynal@bootlin.com
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#
2f959949 |
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06-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Fix comments about the use of bufpoi Clarify these comments which are not very accurate (even wrong in the read case). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-5-miquel.raynal@bootlin.com
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#
ce8148d7 |
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06-May-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Rename a NAND chip option NAND controller drivers can set the NAND_USE_BOUNCE_BUFFER flag to a chip 'option' field. With this flag, the core is responsible of providing DMA-able buffers. The current behavior is to not force the use of a bounce buffer when the core thinks this is not needed. So in the end the name is a bit misleading, because in theory we will always have a DMA buffer but in practice it will not always be a bounce buffer. Rename this flag NAND_USES_DMA to be more accurate. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-4-miquel.raynal@bootlin.com
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#
18729b17 |
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03-May-2020 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Define the "distance 3" MLC pairing scheme Define a new page pairing scheme for MLC NANDs with a distance of 3 pages between the lower and upper page. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-3-miquel.raynal@bootlin.com
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#
d10b41ba |
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21-Apr-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: Give more information about the ECC weakness When the ECC strength is too weak compared to the NAND chip requirements, display the values so that it is clear for people how much they are far from the requirements (and might get in troubles in the future). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200421163906.7515-1-miquel.raynal@bootlin.com
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#
025a06c1 |
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25-Mar-2020 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: Convert fallthrough comments into statements Use Joe Perches cvt_fallthrough.pl script to convert /* fallthrough */ comments (and its derivatives) into a fallthrough; statement. This automatically drops useless ones. Do it MTD-wide. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Richard Weinberger <richard@nod.at> Link: https://lore.kernel.org/linux-mtd/20200325212115.14170-1-miquel.raynal@bootlin.com
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#
adc6162b |
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18-Mar-2020 |
Mason Yang <masonccyang@mxic.com.tw> |
mtd: rawnand: Add support for manufacturer specific suspend/resume operation Patch nand_suspend() & nand_resume() to let manufacturers overwrite suspend/resume operations. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1584517348-14486-2-git-send-email-masonccyang@mxic.com.tw
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#
92270086 |
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03-Mar-2020 |
Mason Yang <masonccyang@mxic.com.tw> |
mtd: rawnand: Add support for manufacturer specific lock/unlock operation Add nand_lock() & nand_unlock() for manufacturer specific lock & unlock operation while the device supports Block Portection function. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1583220084-10890-2-git-send-email-masonccyang@mxic.com.tw
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#
00926460 |
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23-Jan-2020 |
Christophe Kerello <christophe.kerello@st.com> |
mtd: rawnand: free the nand_device object This patch releases the resources allocated in nanddev_init function. Fixes: a7ab085d7c16 ("mtd: rawnand: Initialize the nand_device object") Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1579767768-32295-1-git-send-email-christophe.kerello@st.com
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#
43d8b636 |
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16-Jan-2020 |
Martin Devera <devik@eaxlabs.cz> |
mtd: rawnand: Ensure nand_soft_waitrdy wait period is enough The used way to compute jiffies timeout brokes when jiffie difference is 1. Assume that nand_soft_waitrdy is called with timeout_ms==1. Jiffies are 1000 for example (assume something more like 1000.99 - just before incrementing to 1001). We compute timeout_ms = 1000+msecs_to_jiffies(1) = 1001. nand_read_data_op is called for the first time and returns 0. During the call jiffies changes to 1001 thus "while loop" ends here (wrongly). Notice that routine was called with expected timeout 1ms but actual timeout used was something between 0...1ms. Fixes STM32MP1 FMC2 NAND controller which sometimes failed exactly in this way. Signed-off-by: Martin Devera <devik@eaxlabs.cz> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200116135431.17480-1-devik@eaxlabs.cz
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#
a3c4c233 |
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23-Sep-2019 |
Piotr Sroka <piotrs@cadence.com> |
mtd: rawnand: Change calculating of position page containing BBM Change calculating of position page containing BBM If none of BBM flags are set then function nand_bbm_get_next_page reports EINVAL. It causes that BBM is not read at all during scanning factory bad blocks. The result is that the BBT table is build without checking factory BBM at all. For Micron flash memories none of these flags are set if page size is different than 2048 bytes. Address this regression by: - adding NAND_BBM_FIRSTPAGE chip flag without any condition. It solves issue only for Micron devices. - changing the nand_bbm_get_next_page_function. It will return 0 if no of BBM flag is set and page parameter is 0. After that modification way of discovering factory bad blocks will work similar as in kernel version 5.1. Cc: stable@vger.kernel.org Fixes: f90da7818b14 (mtd: rawnand: Support bad block markers in first, second or last page) Signed-off-by: Piotr Sroka <piotrs@cadence.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
80107e76 |
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31-Jul-2019 |
Colin Ian King <colin.king@canonical.com> |
mtd: rawnand: remove redundant assignment to variable ret Variable ret is being initialized with a value that is never read and ret is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
14a82ea7 |
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21-May-2019 |
Sascha Hauer <s.hauer@pengutronix.de> |
mtd: rawnand: export NAND operation tracer The NAND core has a NAND operation tracing function, but it can only be used by drivers using the generic option parser from the NAND core. Export the tracing function as a static inline function in rawnand.h so that drivers implementing exec_op directly do not have to write their own operation tracing. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
2099920e |
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19-Apr-2019 |
Stefan Agner <stefan@agner.ch> |
mtd: rawnand: use longest matching pattern Sometimes the exec_op parser does not choose the optimal pattern if multiple patterns with optional elements are available. Since the stack automatically splits operations in multiple exec_op calls, a non-optimal pattern gets broken up into multiple calls. E.g. an OOB read using the vf610 driver: nand: executing subop: nand: ->CMD [0x00] nand: ->ADDR [5 cyc: 00 08 ea 94 02] nand: ->CMD [0x30] nand: ->WAITRDY [max 200000 ms] nand: DATA_IN [64 B] nand: executing subop: nand: CMD [0x00] nand: ADDR [5 cyc: 00 08 ea 94 02] nand: CMD [0x30] nand: WAITRDY [max 200000 ms] nand: ->DATA_IN [64 B] However, the vf610 driver has a pattern which can execute the complete command in a single go... This patch makes sure that the longest matching pattern is chosen instead of the first (potentially only partial) match. With this change the vf610 reads the OOB in a single exec_op call: nand: executing subop: nand: ->CMD [0x00] nand: ->ADDR [5 cyc: 00 08 c0 1d 00] nand: ->CMD [0x30] nand: ->WAITRDY [max 200000 ms] nand: ->DATA_IN [64 B] Reported-by: Sascha Hauer <s.hauer@pengutronix.de> Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Tested-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
d2912cb1 |
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04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
b2b5921f |
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21-May-2019 |
Sascha Hauer <s.hauer@pengutronix.de> |
mtd: rawnand: initialize ntargets with maxchips memorg->ntargets is initialized with '1'. It should be initialized with the maxchips argument from nand_scan() instead. Otherwise multi chip support errors out on the secondary chip selects when trying to call nand_reset() on them: WARNING: CPU: 0 PID: 1 at drivers/mtd/nand/raw/internals.h:114 nand_reset_op+0x194/0x1c4 With this memorg->ntargets is initialized with the maximum number of chip selects supported by the driver. After having detected the number of actually connected chips memory->ntargets is updated with that number. Fixes: 32813e288414 ("mtd: rawnand: Get rid of chip->numchips") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
f90da781 |
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16-Apr-2019 |
Frieder Schrempf <frieder.schrempf@kontron.de> |
mtd: rawnand: Support bad block markers in first, second or last page Currently supported bad block marker positions within the block are: * in first page only * in last page only * in first or second page Some ESMT NANDs are known to have been shipped by the manufacturer with bad block markers in the first or last page, instead of the first or second page. Also the datasheets for Cypress/Spansion/AMD NANDs claim that the first, second *and* last page needs to be checked. Therefore we make it possible to set NAND_BBM_FIRSTPAGE, NAND_BBM_SECONDPAGE and NAND_BBM_LASTPAGE independently in any combination. To simplify the code, the logic to evaluate the flags is moved to a a new function nand_bbm_get_next_page(). Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
bb592548 |
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16-Apr-2019 |
Frieder Schrempf <frieder.schrempf@kontron.de> |
mtd: nand: Make flags for bad block marker position more granular To be able to check and set bad block markers in the first and second page of a block independently of each other, we create separate flags for both cases. Previously NAND_BBM_SECONDPAGE meant, that both, the first and the second page were used. With this patch NAND_BBM_FIRSTPAGE stands for using the first page and NAND_BBM_SECONDPAGE for using the second page. This patch is only for preparation of subsequent changes and does not implement the logic to actually handle both flags separately. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
04649ec1 |
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16-Apr-2019 |
Frieder Schrempf <frieder.schrempf@kontron.de> |
mtd: rawnand: Always store info about bad block markers in chip struct The information about where the manufacturer puts the bad block markers inside the bad block and in the OOB data is stored in different places. Let's move this information to nand_chip.options and nand_chip.badblockpos. As this chip-specific information is not directly related to the bad block table (BBT), we also rename the flags to NAND_BBM_*. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
9bb94643 |
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08-Feb-2019 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: Clarify Kconfig entry for software Hamming ECC entries The software Hamming ECC correction implementation is referred as MTD_NAND_ECC which is too generic. Rename it MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an SMC quirk in the Hamming implementation as MTD_NAND_ECC_SW_HAMMING_SMC. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
714c0682 |
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06-Feb-2019 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: nand: Clarify Kconfig entry for software BCH ECC algorithm There is no point in having two distinct entries, merge them and rename the symbol for more clarity: MTD_NAND_ECC_SW_BCH Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
6a1b66d6 |
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04-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Get rid of chip->ecc_{strength,step}_ds nand_device embeds a nand_ecc_req object which contains the minimum strength and step-size required by the NAND device. Drop the chip->ecc_{strength,step}_ds fields and use chip->base.eccreq.{strength,step_size} instead. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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#
32813e28 |
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29-Oct-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Get rid of chip->numchips The same information is provided by nanddev_ntargets(). Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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#
6c836d51 |
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29-Oct-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Get rid of chip->chipsize The target size can now be returned by nanddev_get_targetsize(). Get rid of the chip->chipsize field and use this helper instead. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
29815168 |
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25-Oct-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Get rid of chip->bits_per_cell Now that we inherit from nand_device, we can use nand_device->memorg.bits_per_cell instead of having our own field at the nand_chip level. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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#
7beb37e5 |
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04-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Use nanddev_mtd_max_bad_blocks() nanddev_mtd_max_bad_blocks() is implemented by the generic NAND layer and is already doing what we need. Reuse this function instead of having our own implementation. While at it, get rid of the ->max_bb_per_die and ->blocks_per_die fields which are now unused. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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#
d974541e |
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28-Oct-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Move all page cache related fields to a sub-struct Looking at the field names it's hard to tell what ->data_buf, ->pagebuf and ->pagebuf_bitflips are for. Clarify that by moving those fields in a sub-struct named pagecache. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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#
eeab7174 |
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28-Oct-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Provide a helper to get chip->data_buf We plan to move cache related fields to a pagecache struct in nand_chip but some drivers access ->pagebuf directly to invalidate the cache before they start using ->data_buf. Let's provide an helper that returns a pointer to ->data_buf after invalidating the cache. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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#
a7ab085d |
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25-Oct-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Initialize the nand_device object In order to use some of the nanddev_xxx() helpers, we need to initialize the nand_device object embedded in nand_chip using nanddev_init(). This requires implementing nand_ops. We also drop useless mtd->xxx initialization when they're already taken case of by nanddev_init(). Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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#
629a442c |
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25-Oct-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Fill memorg during detection If we want to use the generic NAND layer, we need to have the memorg struct appropriately filled. Patch the detection code to fill this struct. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
f9ffb406 |
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21-Jan-2019 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mtd: rawnand: check return code of nand_reset() and nand_readid_op() nand_scan_ident() iterates over maxchips to find as many homogeneous chips as possible. Since commit 2d472aba15ff ("mtd: nand: document the NAND controller/NAND chip DT representation"), new drivers should pass in the exact number of CS lines instead of possible max, but old platforms may still rely on nand_scan_ident() to detect the actual number of connected CS lines. In that case, this loop bails out when manufacturer or device ID unmatches. The reason of unmatch is most likely no chip is connected to that CS line. If so, nand_reset() should already have failed, and the following nand_readid_op() is pointless. Before ->exec_op hook was introduced, drivers had no way to tell the failure of NAND_CMD_RESET to the framework because the legacy ->cmdfunc() has void return type. Now drivers implementing ->exec_op hook can return the error code. You can save nand_readid_op() by checking the return value of nand_reset(). The return value of nand_readid_op() should be checked as well. If it fails, probably id[0] and id[1] are undefined values. Just for consistency, it should be sensible to check the return code in nand_do_write_oob() as well. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
2d73f3d6 |
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20-Jan-2019 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mtd: rawnand: remove ->legacy.erase and single_erase() Now that the last user of this hook, denali.c, stopped using it, we can remove the erase hook from nand_legacy. I squashed single_erase() because only the difference between single_erase() and nand_erase_op() is the number of bit shifts. The status/ret conversion in nand_erase_nand() is unneeded since commit eb94555e9e97 ("mtd: nand: use usual return values for the ->erase() hook"). Cleaned it up now. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
3175e121 |
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16-Jan-2019 |
Mathieu Malaterre <malat@debian.org> |
mtd: rawnand: Annotate implicit fall through in nand_scan_tail There is a plan to build the kernel with -Wimplicit-fallthrough and these places in the code produced warnings (W=1). This commit removes the following warnings: drivers/mtd/nand/raw/nand_base.c:5556:6: warning: this statement may fall through [-Wimplicit-fallthrough=] drivers/mtd/nand/raw/nand_base.c:5575:6: warning: this statement may fall through [-Wimplicit-fallthrough=] drivers/mtd/nand/raw/nand_base.c:5613:13: warning: this statement may fall through [-Wimplicit-fallthrough=] Signed-off-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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013e6292 |
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20-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Simplify the locking nand_get_device() was complex for apparently no good reason. Let's replace this locking scheme with 2 mutexes: one attached to the controller and another one attached to the chip. Every time the core calls nand_get_device(), it will first lock the chip and if the chip is not suspended, will then lock the controller. nand_release_device() will release both lock in the reverse order. nand_get_device() can sleep, just like the previous implementation, which means you should never call that from an atomic context. We also get rid of - the chip->state field, since all it was used for was flagging the chip as suspended. We replace it by a field called chip->suspended and directly set it from nand_suspend/resume() - the controller->wq and controller->active fields which are no longer needed since the new controller->lock (now a mutex) guarantees that all operations are serialized at the controller level - panic_nand_get_device() which would anyway be a no-op. Talking about panic write, I keep thinking the rawnand implementation is unsafe because there's not negotiation with the controller to know when it's actually done with it's previous operation. I don't intend to fix that here, but that's probably something we should look at, or maybe we should consider dropping the ->_panic_write() implementation Last important change to mention: we now return -EBUSY when someone tries to access a device that as been suspended, and propagate this error to the upper layer. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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455e7b38 |
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27-Jan-2019 |
Randy Dunlap <rdunlap@infradead.org> |
mtd: rawnand: fix kernel-doc warnings Fix kernel-doc warnings in drivers/mtd/nand/raw: ../drivers/mtd/nand/raw/nand_base.c:420: warning: Function parameter or member 'chip' not described in 'nand_fill_oob' ../drivers/mtd/nand/raw/nand_bbt.c:173: warning: Function parameter or member 'this' not described in 'read_bbt' ../drivers/mtd/nand/raw/nand_bbt.c:173: warning: Excess function parameter 'chip' description in 'read_bbt' Fixes: 0813621ba898a ("mtd: rawnand: Stop passing mtd_info objects to internal functions") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Boris Brezillon <boris.brezillon@bootlin.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: linux-mtd@lists.infradead.org Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
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#
7b6a9b28 |
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20-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate the dummy_controller field We try to force NAND controller drivers to properly separate the NAND controller object from the NAND chip one, so let's deprecate the dummy controller object embedded in nand_chip to encourage them to create their own instance. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
7a08dbae |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Move ->setup_data_interface() to nand_controller_ops ->setup_data_interface() is a controller specific method and should thus be placed in nand_controller_ops. In order to make that work with controllers that support keeping pre-configured timings we need to add a new NAND_KEEP_TIMINGS flag to inform the core it should skip the timings selection step. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
f2abfeb2 |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Move the ->exec_op() method to nand_controller_ops ->exec_op() is a controller method and has nothing to do in the nand_chip struct. Let's move it to the nand_controller_ops struct and adjust the core and drivers accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
7d6c37e9 |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate the ->select_chip() hook Now that the CS line to be selected is passed to ->exec_op() and stored in chip->cur_cs and after patching all drivers implementing ->exec_op() to stop implementing this method, we can deprecate it by moving it to the nand_legacy structure. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
02b4a526 |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Make ->select_chip() optional when ->exec_op() is implemented Now that the CS to be selected on a nand_operation is passed in nand_operation->cs we can make the ->select_chip() hook optional for drivers implementing ->exec_op(). When not implemented, the core is assuming the CS line is automatically asserted/deasserted by the driver ->exec_op() implementation. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
ae2294b1 |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass the CS line to be selected in struct nand_operation In order to deprecate the ->select_chip hook we need to pass the CS line a NAND operations are targeting. This is done through the addition of a cs field to the nand_operation struct. We also need to keep track of the currently selected target to properly initialize op->cs, hence the ->cur_cs field addition to the nand_chip struct. Note that op->cs is not assigned in nand_exec_op() because we might rework the way we execute NAND operations in the future (adopt a queuing mechanism instead of the serialization we have right now). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
1d017859 |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Add nand_[de]select_target() helpers Add a wrapper to prevent drivers and core code from directly calling the ->select_chip hook which we are about to deprecate. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
99f3351a |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Reorganize code to avoid forward declarations Avoid forward declaration of nand_get_device(), nand_do_write_oob() and nand_update_bbt() by moving functions around. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
0813621b |
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11-Nov-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Stop passing mtd_info objects to internal functions After having reworked the rawnand API to avoid passing mtd_info objects around, let's do the same for internal functions. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
b0e137ad |
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15-Oct-2018 |
Janusz Krzysztofik <jmkrzyszt@gmail.com> |
mtd: rawnand: Provide helper for polling GPIO R/B pin Each controller driver having access to NAND R/B pin over GPIO would have to reimplement the polling loop otherwise. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
ce97e2bb |
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04-Nov-2018 |
Randy Dunlap <rdunlap@infradead.org> |
mtd: nand: drop kernel-doc notation for a deleted function parameter Remove kernel-doc notation for a deleted function parameter to prevent a kernel-doc warning: ../drivers/mtd/nand/raw/nand_base.c:603: warning: Excess function parameter 'mtd' description in 'panic_nand_wait' Fixes: f1d46942e823 ("mtd: rawnand: Pass a nand_chip object to chip->waitfunc()") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Boris Brezillon <boris.brezillon@bootlin.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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#
309600c1 |
|
04-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Allow selection of ECC byte ordering at runtime Currently, the selection of ECC byte ordering for software hamming is done at compilation time, which doesn't make sense when ECC byte calculation is done in hardware and byte ordering is forced by the hardware engine. In this case, only the correction is done in software and we want to force the byte-ordering no matter the value of CONFIG_MTD_NAND_ECC_SMC. This is typically the case for the FSMC (Smart Media ordering), TMIO and TXX9NDFMC (regular byte ordering) blocks. For all other use cases (pure software implementation, SM FTL and nandecctest), we keep selecting the byte ordering based on the CONFIG_MTD_NAND_ECC_SMC value. It might not be ideal for SM FTL (I'd expect Smart Media ordering to be employed by the Smart Media FTL), but this option doesn't seem to be enabled in the existing _defconfig, so I can't tell setting sm_order to true is the right choice. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
8ae3fbf8 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Move JEDEC code to nand_jedec.c This moves JEDEC related code to nand_jedec.c and JEDEC related struct/macros to include/linux/mtd/jedec.h. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
1c325cc5 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Move ONFI code to nand_onfi.c This moves ONFI related code to nand_onfi.c and ONFI related struct/macros to include/linux/mtd/onfi.h. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
3d4af7c1 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Move legacy code to nand_legacy.c Allows us to move a few hundred lines of deprecated code out of the core file which is quite big. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
348d56a8 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Keep all internal stuff private A lot of things defined in rawnand.h should not be exposed to NAND controller drivers and should only be shared by core files. Create the drivers/mtd/nand/raw/internals.h header to store such definitions, and move all private defs to this header. Also remove EXPORT_SYMBOLS() on functions that are not supposed to be exposed. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
462f35d3 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Inline onfi_get_async_timing_mode() onfi_get_async_timing_mode() is only used in one place inside nand_base.c. Let's inline the code and kill the helper. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
3cece3ab |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate ->chip_delay The wait timeouts and delays are directly extracted from the NAND timings and ->chip_delay is only used in legacy path, so let's move it to the nand_legacy struct to make it clear. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
45240367 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate ->{set,get}_features() hooks Those hooks should be replaced by a proper ->exec_op() implementation. Move them to the nand_legacy struct to make it clear. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
f9ebd1bb |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate ->erase() The ->erase() hook have been overloaded by some drivers for bad reasons: either the driver was not fitting in the NAND framework and should have been an MTD driver (docg4), or the driver uses a specific path for the ERASE operation (denali), instead of implementing it generically. In any case, we should discourage people from overloading this method and encourage them to implement ->exec_op() instead. Move the ->erase() hook to the nand_legacy struct to make it clear. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
cdc784c7 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate ->block_{bad,markbad}() hooks Those hooks have been overloaded by some drivers for bad reasons: either the driver was not fitting in the NAND framework and should have been an MTD driver (docg4), or it was not properly implementing the OOB read/write request or had a weird layout where BBM are trashed. In any case, we should discourage people from overloading those methods and encourage them to fix their driver instead. Move the ->block_{bad,markbad}() hooks to the nand_legacy struct to make it clear. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
8395b753 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate ->dev_ready() and ->waitfunc() Those hooks have been replaced by ->exec_op(). Move them to the nand_legacy struct. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
bf6065c6 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate ->cmd_ctrl() and ->cmdfunc() Those hooks have been replaced by ->exec_op(). Move them to the nand_legacy struct. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
716bbbab |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Deprecate ->{read, write}_{byte, buf}() hooks All those hooks have been replaced by ->exec_op(). Move them to the nand_legacy struct. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
82fc5099 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Create a legacy struct and move ->IO_ADDR_{R, W} there We regularly have new NAND controller drivers that are making use of fields/hooks that we want to get rid of but can't because of all the legacy drivers that we might break if we do. So, instead of removing those fields/hooks, let's move them to a sub-struct which is clearly documented as deprecated. We start with the ->IO_ADDR_{R,W] fields. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
800342de |
|
04-Aug-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Do not treat !maxchips specially in nand_scan_with_ids() The only reason we were skipping nand_scan_ident() when maxchips == 0 was to make the docg4 to work. Now that this driver is gone we can remove this special case and return an error when maxchips is 0. Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
871a4073 |
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04-Aug-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Make maxchips an unsigned int There's no good reason to make maxchips a signed integer, since only positive values are valid. Make it an unsigned int. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
e4cdf9cb |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object nand_erase_nand() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the nand_erase_nand() helper. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
5740d4c4 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to all nand_xxx_bbt() helpers Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the nand_xxx_bbt() helpers. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
858838b8 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->setup_data_interface() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->setup_data_interface() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
2e7f1cec |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->setup_read_retry() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->setup_read_retry() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
aa36ff25 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->{get, set}_features() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->{get,set}_features() hooks. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
a2098a9e |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->erase() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->erase() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
f1d46942 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->waitfunc() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->waitfunc() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
5295cf2e |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->cmdfunc() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->cmdfunc() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
50a487e7 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->dev_ready() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->dev_ready() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
0f808c16 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->cmd_ctrl() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->cmd_ctrl() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
c17556f5 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->block_xxx() hooks Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all chip->block_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
758b56f5 |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->select_chip() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->select_chip() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
c0739d85 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->write_xxx() hooks Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all chip->write_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
7e534323 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to chip->read_xxx() hooks Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all chip->read_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
767eb6fb |
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06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to ecc->write_xxx() hooks Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all ecc->write_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
b9761687 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to ecc->read_xxx() hooks Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all ecc->read_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
00da2ea9 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to ecc->correct() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->correct()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
af37d2c3 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to ecc->calculate() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->calculate()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
ec47636c |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to ecc->hwctl() Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->hwctl()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
2b356ab4 |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to nand_wait_ready() Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. Now is nand_wait_ready()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
59ac276f |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to nand_release() Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. Now is nand_release()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
00ad378f |
|
06-Sep-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Pass a nand_chip object to nand_scan() Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. We start with nand_scan(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
7525c951 |
|
27-Jul-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Get rid of the ->read_word() hook Commit c120e75e0e7d ("mtd: nand: use read_oob() instead of cmdfunc() for bad block check") removed this only user of the ->read_word() method but kept the hook in place. Remove it now. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
52f05b6b |
|
27-Jul-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Add the nand_wait_rdy_op() helper and use it In order to make sure we use ->exec_op() to wait for chip readiness when it's available we provide an helper that does the selection between ->exec_op(), udelay(chip->chip_delay) and nand_wait_ready() based on what's implemented by the controller driver. We then use it in nand_wait_readrdy(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
85e08e58 |
|
27-Jul-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Add the nand_wait_readrdy() helper and use it The logic to wait for chip readiness after a page read has been duplicated in nand_do_read_ops() and nand_do_read_oob(). Provide an helper that does the right thing and call it where appropriate. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
3d3fe3c0 |
|
25-Jul-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: allocate dynamically ONFI parameters during detection Now that it is possible to do dynamic allocations during the identification phase, convert the onfi_params structure (which is only needed with ONFI compliant chips) into a pointer that will be allocated only if needed. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
|
#
2023f1fa |
|
25-Jul-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: allocate model parameter dynamically Thanks to the migration of all drivers to use nand_scan() and the related nand_controller_ops, we can now allocate data during the detection phase. Let's do it first for the NAND model parameter which is allocated in nand_detect(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
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#
98732da1 |
|
25-Jul-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: do not export nand_scan_[ident|tail]() anymore Both nand_scan_ident() and nand_scan_tail() helpers used to be called directly from controller drivers that needed to tweak some ECC-related parameters before nand_scan_tail(). This separation prevented dynamic allocations during the phase of NAND identification, which was inconvenient. All controller drivers have been moved to use nand_scan(), in conjunction with the chip->ecc.[attach|detach]_chip() hooks that actually do the required tweaking sequence between both ident/tail calls, allowing programmers to use dynamic allocation as they need all across the scanning sequence. Declare nand_scan_[ident|tail]() statically now. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
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49aa76b1 |
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25-Jul-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: do not execute nand_scan_ident() if maxchips is zero Some driver (eg. docg4) will need to handle themselves the identification phase. As part of the migration to use nand_scan() everywhere (which will unconditionnaly call nand_scan_ident()), we add a condition at the start of nand_scan_with_ids() to jump over nand_scan_ident() if the maxchips parameters is zero, meaning that the driver does not want the core to handle this phase. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
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05b54c7b |
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18-Jul-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: add hooks that may be called during nand_scan() In order to remove the limitation that forbids dynamic allocation in nand_scan_ident(), we must create a path that will be the same for all controller drivers. The idea is to use nand_scan() instead of the widely used nand_scan_ident()/nand_scan_tail() couple. In order to achieve this, controller drivers will need to adjust some parameters between these two functions depending on the NAND chip wired on them. This takes the form of two new hooks (->{attach,detach}_chip()) that are placed in a new nand_controller_ops structure, which is then attached to the nand_controller object at driver initialization time. ->attach_chip() is called between nand_scan_ident() and nand_scan_tail(), and ->detach_chip() is called in the error path of nand_scan() and in nand_cleanup(). Note that some NAND controller drivers don't have a dedicated nand_controller object and instead rely on the default/dummy one embedded in nand_chip. If you're in this case and still want to initialize the controller ops, you'll have to manipulate chip->dummy_controller directly. Last but not least, it's worth mentioning that we plan to move some of the controller related hooks placed in nand_chip into nand_controller_ops to make the separation between NAND chip and NAND controller methods clearer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
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7da45139 |
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17-Jul-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: better name for the controller structure In the raw NAND core, a NAND chip is described by a nand_chip structure, while a NAND controller is described with a nand_hw_control structure which is not very meaningful. Rename this structure nand_controller. As the structure gets renamed, it is logical to also rename the core function initializing it from nand_hw_control_init() to nand_controller_init(). Lastly, the 'hwcontrol' entry of the nand_chip structure is not meaningful neither while it has the role of fallback when no controller structure is provided by the driver (the controller driver is dumb and can only control a single chip). Thus, it is renamed dummy_controller. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
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110ab158 |
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19-Jul-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Remove unused caller_is_module() definition Commit 260e89a6e0d6 ("mtd: core: tone down suggestion that dev.parent should be set") removed the only user of caller_is_module() but forgot to remove the definition itself. Let's remove it now. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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760c435e |
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18-Jul-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: make subop helpers return unsigned values A report from Colin Ian King pointed a CoverityScan issue where error values on these helpers where not checked in the drivers. These helpers can error out only in case of a software bug in driver code, not because of a runtime/hardware error. Hence, let's WARN_ON() in this case and return 0 which is harmless anyway. Fixes: 8878b126df76 ("mtd: nand: add ->exec_op() implementation") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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0d6030ac |
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18-Jul-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Expose _notsupp() helpers for raw page accessors Some implementations simply can't disable their ECC engine. Expose helpers returning -ENOTSUPP so that the caller knows that raw accesses are not supported instead of silently falling back to non-raw accessors. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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e80eba75 |
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04-Jul-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Kill the chip->scan_bbt() hook None of the existing drivers are overloading the ->scan_bbt() method, let's get rid of it and replace calls to ->scan_bbt() by nand_create_bbt() ones. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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44b07b92 |
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04-Jul-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Rename nand_default_bbt() into nand_create_bbt() Rename nand_default_bbt() into nand_create_bbt() and pass it a nand_chip object to prepare removal of the chip->scan_bbt() hook. We add a temporary nand_default_bbt() wrapper which will be dropped after the removal of ->scan_bbt(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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0cf5c7db |
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19-Jun-2018 |
Abhishek Sahu <absahu@codeaurora.org> |
mtd: rawnand: provide only single helper function for ECC conf Function nand_ecc_choose_conf() will be help for all the cases, so other helper functions can be made static. nand_check_ecc_caps(): Invoke nand_ecc_choose_conf() with both chip->ecc.size and chip->ecc.strength value set. nand_maximize_ecc(): Invoke nand_ecc_choose_conf() with NAND_ECC_MAXIMIZE flag. nand_match_ecc_req(): Invoke nand_ecc_choose_conf() with either chip->ecc.size or chip->ecc.strength value set and without NAND_ECC_MAXIMIZE flag. CC: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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181ace9e |
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19-Jun-2018 |
Abhishek Sahu <absahu@codeaurora.org> |
mtd: rawnand: helper function for setting up ECC configuration commit 2c8f8afa7f92 ("mtd: nand: add generic helpers to check, match, maximize ECC settings") provides generic helpers which drivers can use for setting up ECC parameters. Since same board can have different ECC strength nand chips so following is the logic for setting up ECC strength and ECC step size, which can be used by most of the drivers. 1. If both ECC step size and ECC strength are already set (usually by DT) then just check whether this setting is supported by NAND controller. 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength supported by NAND controller. 3. Otherwise, try to match the ECC step size and ECC strength closest to the chip's requirement. If available OOB size can't fit the chip requirement then select maximum ECC strength which can be fit with available OOB size. This patch introduces nand_ecc_choose_conf function which calls the required helper functions for the above logic. The drivers can use this single function instead of calling the 3 helper functions individually. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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872b71ff |
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24-Jun-2018 |
Chris Packham <chris.packham@alliedtelesis.co.nz> |
mtd: rawnand: add defines for ONFI version bits Add defines for the ONFI version bits and use them in nand_flash_detect_onfi(). Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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00ce4e03 |
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24-Jun-2018 |
Chris Packham <chris.packham@alliedtelesis.co.nz> |
mtd: rawnand: add manufacturer fixup for ONFI parameter page This is called after the ONFI parameter page checksum is verified and allows us to override the contents of the parameter page. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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f922bd79 |
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24-Jun-2018 |
Stefan Agner <stefan@agner.ch> |
mtd: rawnand: add an option to specify NAND chip as a boot device Allow to define a NAND chip as a boot device. This can be helpful for the selection of the ECC algorithm and strength in case the boot ROM supports only a subset of controller provided options. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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f308d735 |
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24-Jun-2018 |
Stefan Agner <stefan@agner.ch> |
mtd: rawnand: add Reed-Solomon error correction algorithm Add Reed-Solomon (RS) to the enumeration of ECC algorithms. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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e9893e6f |
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13-Jun-2018 |
Abhishek Sahu <absahu@codeaurora.org> |
mtd: rawnand: fix return value check for bad block status Positive return value from read_oob() is making false BAD blocks. For some of the NAND controllers, OOB bytes will be protected with ECC and read_oob() will return number of bitflips. If there is any bitflip in ECC protected OOB bytes for BAD block status page, then that block is getting treated as BAD. Fixes: c120e75e0e7d ("mtd: nand: use read_oob() instead of cmdfunc() for bad block check") Cc: <stable@vger.kernel.org> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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782d1967 |
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11-May-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Do not check FAIL bit when executing a SET_FEATURES op The ONFI spec clearly says that FAIL bit is only valid for PROGRAM, ERASE and READ-with-on-die-ECC operations, and should be ignored otherwise. It seems that checking it after sending a SET_FEATURES is a bad idea because a previous READ, PROGRAM or ERASE op may have failed, and depending on the implementation, the FAIL bit is not cleared until a new READ, PROGRAM or ERASE is started. This leads to ->set_features() returning -EIO while it actually worked, which can sometimes stop a batch of READ/PROGRAM ops. Note that we only fix the ->exec_op() path here, because some drivers are abusing the NAND_STATUS_FAIL flag in their ->waitfunc() implementation to propagate other kind of errors, like wait-ready-timeout or controller-related errors. Let's not try to fix those drivers since they worked fine so far. Fixes: 8878b126df76 ("mtd: nand: add ->exec_op() implementation") Cc: stable@vger.kernel.org Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
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39138c1f |
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12-May-2018 |
Wan, Jane (Nokia - US/Sunnyvale) <jane.wan@nokia.com> |
mtd: rawnand: use bit-wise majority to recover the ONFI param page Per ONFI specification (Rev. 4.0), if all parameter pages have invalid CRC values, the bit-wise majority may be used to recover the contents of the parameter page from the parameter page copies present. Signed-off-by: Jane Wan <Jane.Wan@nokia.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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3057fcef |
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04-May-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: rawnand: Make sure we wait tWB before polling the STATUS reg NAND chips require a bit of time to take the NAND operation into account and set the BUSY bit in the STATUS reg. Make sure we don't poll the STATUS reg too early in nand_soft_waitrdy(). Fixes: 8878b126df76 ("mtd: nand: add ->exec_op() implementation") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
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256c4fc7 |
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22-Apr-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: add a way to pass an ID table with nand_scan() As part of the work of migrating all the drivers to nand_scan(), and because nand_scan() does not provide a way to pass an ID table, rename the function nand_scan_with_ids() and add a third parameter to give a flash ID table (like what was done with nand_scan_ident()). Create a nand_scan() helper that is just a wrapper of nand_scan_with_ids(), passing NULL as the ID table. This way a controller drivers can continue using nand_scan() transparently. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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bd0b6434 |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: get rid of the ONFI parameter page in nand_chip The NAND chip parameter page is statically allocated within the nand_chip structure, which reserves a lot of space. Even not ONFI nor JEDEC chips have it embedded. Also, only a few parameters are actually read from the parameter page after the detection. Now that there is a small nand_parameters structure that hold all needed ONFI parameters, remove the ONFI page from the nand_chip structure by just allocating it during the identification phase and removing it right after. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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480139d9 |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: get rid of the JEDEC parameter page in nand_chip The NAND chip parameter page is statically allocated within the nand_chip structure, which reserves a lot of space. Even not ONFI nor JEDEC chips have it embedded. Also, only a few parameters are actually read from the parameter page after the detection. Now that there is a small nand_parameters structure that can held generic parameters, remove the JEDEC page from the nand_chip structure by just allocating it during the identification phase and removing it right after. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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789157e4 |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: allow vendors to declare (un)supported features If SET/GET_FEATURES is available (from the parameter page), use a bitmap to declare what feature is actually supported. Initialize the bitmap in the core to support timing changes (only feature used by the core), also add support for Micron specific features used in Micron initialization code (in the init routine). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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a97421c7 |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: prepare the removal of the ONFI parameter page The NAND chip parameter page is statically allocated within the nand_chip structure, which reserves a lot of space. Even not ONFI nor JEDEC chips have it embedded. Also, only a few parameters are actually read from the parameter page after the detection. ONFI-related parameters that will be used outside from the identification function are stored in a separate onfi_parameters structure embedded in nand_parameters, this small structure that already hold generic parameters. For now, the onfi_parameters structure is allocated statically. However, after some deep rework in the NAND framework, it will be possible to do dynamic allocations from the NAND identification phase, and this strcuture will then be dynamically allocated when needed. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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f4531b2b |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: prepare the removal of ONFI/JEDEC parameter pages The NAND chip parameter page is statically allocated within the nand_chip structure, which reserves a lot of space. Even not ONFI nor JEDEC chips have it embedded. Also, only a few parameters are actually read from the parameter page after the detection. To prepare to the removal of such huge structure, a small NAND parameter structure is allocated statically and contains only very few members that are generic to all chips and actually used elsewhere in the code. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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107b7d6a |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: avoid setting again the timings to mode 0 after a reset After a nand_reset_data_interface(), both the NAND chip and the NAND controller use timing mode 0. The previously defined data interface for this chip has been saved and is supposed to be restored after that. However, if the saved data interface also refers to timing mode 0, there is no need to re-apply them again. Also, as nand_setup_data_interface() uses ->set/get_features(), it could lead to issues when doing the reset at probe time as the parameter page is not available yet to know if these functions are supported or not. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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415ae78f |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: check ONFI timings have been acked by the chip Choosing ONFI timings when ->set/get_features() calls are supported by the NAND chip is a matter of reading the chip's ONFI parameter page and telling the chip the chosen mode (between all of the supported ones) with ->set_feature(). Add a check on whether the chip "acked" the timing mode or not. This can be a problem for NAND chips that do not follow entirely the ONFI specification. These chips actually support other modes than "mode 0", but either: 1/ do not update the timing mode register once a timing mode has been selected. or 2/ do not support the TIMING_MODE featured and thus do not require users to change the timing mode at all. These issues will be addressed in another patch that will add the feature to overwrite NAND chips features within the parameter page, from the NAND chip driver. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Han Xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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29714d6b |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: move calls to ->select_chip() in nand_setup_data_interface() After a ->set_features(TIMINGS), the chip is supposed to be working at a new speed. In order for all the transactions to be perperly handled, the NAND controller should also be configured to this same speed. Calling ->setup_data_interface() is not enough and the chip should be de-asserted/re-asserted through calls to ->select_chip(). Prepare the next change in nand_setup_data_interface() where timings will be checked after being applied. Because assertions of the CS pin will be needed from within this function, move the calls to ->select_chip() inside nand_setup_data_interface() for later consistency. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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993447b7 |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: handle differently chip/controller errors about timings Usually, the source of the error when setting/getting features does not matter (if the controller does not support sending the command or if the chip does not support the operation). When it comes to timings, if the controller fails it is an error while if the chip does not support the operation, it can be silently supposed that it already works with the maximum supported timings. Introduce some logic in nand_setup_data_interface() to handle that difference. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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97baea1e |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: use wrappers to call onfi GET/SET_FEATURES Prepare the fact that some features managed by GET/SET_FEATURES could be overloaded by vendor code. To handle this logic, use new wrappers instead of directly call the ->get/set_features() hooks. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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b958758e |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: rename SET/GET FEATURES related functions SET/GET FEATURES are flagged ONFI-compliant because of their name. This is not accurate as non-ONFI NAND chips support it and use it. Rename the hooks and helpers to remove the "onfi" prefix. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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fc2f30a4 |
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19-Mar-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: rawnand: rename default ->onfi_get/set_features() implementations Prepare future work on the ->onfi_get/set_features() hooks by renaming the core's implementation as 'default' ones. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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93db446a |
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05-Feb-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: move raw NAND related code to the raw/ subdir As part of the process of sharing more code between different NAND based devices, we need to move all raw NAND related code to the raw/ subdirectory. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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