Searched refs:reg (Results 1 - 25 of 1755) sorted by relevance

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/freebsd-11-stable/contrib/gcc/config/i386/
H A Dknetbsd-gnu.h24 #define REG_NAME(reg) sc_ ## reg
H A Dkfreebsd-gnu.h26 #define REG_NAME(reg) sc_ ## reg
H A Dlinux-unwind.h70 fs->regs.reg[0].how = REG_SAVED_OFFSET;
71 fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa;
72 fs->regs.reg[1].how = REG_SAVED_OFFSET;
73 fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa;
74 fs->regs.reg[2].how = REG_SAVED_OFFSET;
75 fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa;
76 fs->regs.reg[3].how = REG_SAVED_OFFSET;
77 fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa;
78 fs->regs.reg[4].how = REG_SAVED_OFFSET;
79 fs->regs.reg[
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/freebsd-11-stable/sys/amd64/include/
H A Dreg.h6 #include <x86/reg.h>
/freebsd-11-stable/sys/pc98/include/
H A Dreg.h6 #include <x86/reg.h>
/freebsd-11-stable/sys/i386/include/
H A Dreg.h6 #include <x86/reg.h>
/freebsd-11-stable/contrib/gdb/gdb/regformats/
H A Dregdef.h24 struct reg struct
44 void set_register_cache (struct reg *regs, int n);
/freebsd-11-stable/crypto/openssl/crypto/
H A Dsparc_arch.h40 # define SPARC_PIC_THUNK(reg) \
44 add %o7, reg, reg;
46 # define SPARC_PIC_THUNK_CALL(reg) \
47 sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \
49 or reg, %lo(_GLOBAL_OFFSET_TABLE_+4), reg;
52 # define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg)
54 # define SPARC_SETUP_GOT_REG(reg) \
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/freebsd-11-stable/sys/contrib/alpine-hal/
H A Dal_hal_reg_utils.h65 #define AL_REG_FIELD_GET(reg, mask, shift) (((reg) & (mask)) >> (shift))
68 #define AL_REG_FIELD_SET(reg, mask, shift, val) \
69 (reg) = \
70 (((reg) & (~(mask))) | \
74 #define AL_REG_FIELD_SET_64(reg, mask, shift, val) \
75 ((reg) = \
76 (((reg) & (~(mask))) | \
80 #define AL_REG_BIT_GET(reg, shift) \
81 AL_REG_FIELD_GET(reg, AL_BI
136 al_reg_write8_masked(uint8_t __iomem *reg, uint8_t mask, uint8_t data) argument
155 al_reg_write16_masked(uint16_t __iomem *reg, uint16_t mask, uint16_t data) argument
174 al_reg_write32_masked(uint32_t __iomem *reg, uint32_t mask, uint32_t data) argument
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H A Dal_hal_udma_config.c53 uint32_t reg; local
57 reg = al_reg_read32(&axi_regs->cfg_2);
58 reg &= ~UDMA_GEN_AXI_CFG_2_ARB_PROMOTION_MASK;
59 reg |= axi->arb_promotion;
60 al_reg_write32(&axi_regs->cfg_2, reg);
62 reg = al_reg_read32(&axi_regs->endian_cfg);
64 reg |= UDMA_GEN_AXI_ENDIAN_CFG_SWAP_64B_EN;
66 reg &= ~UDMA_GEN_AXI_ENDIAN_CFG_SWAP_64B_EN;
69 reg |= UDMA_GEN_AXI_ENDIAN_CFG_SWAP_S2M_DATA;
71 reg
98 uint32_t reg; local
139 uint32_t reg; local
195 uint32_t reg; local
236 uint32_t reg; local
303 uint32_t reg = al_reg_read32(&udma->udma_regs->m2s.m2s.cfg_len); local
347 uint32_t reg; local
405 uint32_t reg; local
516 uint32_t reg; local
585 uint32_t reg; local
625 uint32_t reg = al_reg_read32(&udma->udma_regs->s2m.s2m_comp.cfg_1c); local
664 uint32_t reg = al_reg_read32(&udma->udma_regs->m2s.m2s_dwrr.cfg_sched); local
694 uint32_t reg = al_reg_read32( local
717 uint32_t reg = al_reg_read32( local
729 uint32_t reg = al_reg_read32(&regs->cfg_1s); local
767 uint32_t reg; local
842 uint32_t reg = al_reg_read32(&udma_q->q_regs->m2s_q.dwrr_cfg_1); local
871 uint32_t reg = al_reg_read32(&udma_q->q_regs->m2s_q.dwrr_cfg_1); local
884 uint32_t reg = al_reg_read32(&udma_q->q_regs->m2s_q.dwrr_sw_ctrl); local
896 uint32_t reg = al_reg_read32(&udma->udma_regs->m2s.m2s_comp.cfg_1c); local
934 uint32_t reg = al_reg_read32(&udma->udma_regs->m2s.m2s_comp.cfg_1c); local
974 uint32_t reg; local
1003 uint32_t reg = al_reg_read32(&udma_q->q_regs->s2m_q.comp_cfg); local
1019 uint32_t reg = al_reg_read32(&udma_q->q_regs->s2m_q.comp_cfg); local
1056 uint32_t reg = al_reg_read32(&udma_q->q_regs->s2m_q.pkt_cfg); local
1079 uint32_t reg = al_reg_read32(&udma_q->q_regs->s2m_q.comp_cfg); local
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/freebsd-11-stable/sys/arm/arm/
H A Dmachdep_kdb.c41 #include <machine/reg.h>
50 u_int reg; local
52 reg = cp15_midr_get();
53 db_printf("Cpu ID: 0x%08x\n", reg);
54 reg = cp15_ctr_get();
55 db_printf("Current Cache Lvl ID: 0x%08x\n",reg);
57 reg = cp15_sctlr_get();
58 db_printf("Ctrl: 0x%08x\n",reg);
59 reg = cp15_actlr_get();
60 db_printf("Aux Ctrl: 0x%08x\n",reg);
84 u_int reg; local
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/freebsd-11-stable/sys/dev/ixgbe/
H A Dixgbe_dcb_82598.c121 u32 reg = 0; local
126 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA;
127 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg);
129 reg = IXGBE_READ_REG(hw, IXGBE_RMCS);
131 reg &= ~IXGBE_RMCS_ARBDIS;
133 reg |= IXGBE_RMCS_RRM;
135 reg |= IXGBE_RMCS_DFP;
137 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);
144 reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT);
147 reg |
177 u32 reg, max_credits; local
221 u32 reg; local
264 u32 fcrtl, reg; local
316 u32 reg = 0; local
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H A Dixgbe_dcb_82599.c121 u32 reg = 0; local
130 reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS;
131 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);
139 reg = 0;
141 reg |= (map[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT));
143 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
149 reg = credit_refill | (credit_max << IXGBE_RTRPT4C_MCL_SHIFT);
151 reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT;
154 reg |= IXGBE_RTRPT4C_LSP;
156 IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg);
179 u32 reg, max_credits; local
225 u32 reg; local
285 u32 i, j, fcrtl, reg; local
372 u32 reg = 0; local
498 u32 reg; local
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/freebsd-11-stable/sys/dev/cy/
H A Dcyreg.h58 #define cd_inb(iobase, reg, cy_align) \
59 (++cd_inbs, *((iobase) + (2 * (reg) << (cy_align))))
60 #define cy_inb(iobase, reg, cy_align) \
61 (++cy_inbs, *((iobase) + ((reg) << (cy_align))))
62 #define cd_outb(iobase, reg, cy_align, val) \
63 (++cd_outbs, (void)(*((iobase) + (2 * (reg) << (cy_align))) = (val)))
64 #define cy_outb(iobase, reg, cy_align, val) \
65 (++cy_outbs, (void)(*((iobase) + ((reg) << (cy_align))) = (val)))
67 #define cd_inb(iobase, reg, cy_align) \
68 (*((iobase) + (2 * (reg) << (cy_alig
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/freebsd-11-stable/sys/dev/etherswitch/arswitch/
H A Darswitch_phy.h31 extern int arswitch_readphy_external(device_t dev, int phy, int reg);
32 extern int arswitch_writephy_external(device_t dev, int phy, int reg, int data);
34 extern int arswitch_readphy_internal(device_t dev, int phy, int reg);
35 extern int arswitch_writephy_internal(device_t dev, int phy, int reg, int data);
/freebsd-11-stable/sys/mips/atheros/
H A Dar71xx_gpiovar.h42 #define GPIO_WRITE(sc, reg, val) do { \
43 bus_write_4(sc->gpio_mem_res, (reg), (val)); \
46 #define GPIO_READ(sc, reg) bus_read_4(sc->gpio_mem_res, (reg))
48 #define GPIO_SET_BITS(sc, reg, bits) \
49 GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits))
51 #define GPIO_CLEAR_BITS(sc, reg, bits) \
52 GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg))
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/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_asm.h26 # define CFI_REL_OFFSET(reg, n) .cfi_rel_offset reg, n
27 # define CFI_OFFSET(reg, n) .cfi_offset reg, n
28 # define CFI_DEF_CFA_REGISTER(reg) .cfi_def_cfa_register reg
29 # define CFI_DEF_CFA(reg, n) .cfi_def_cfa reg, n
30 # define CFI_RESTORE(reg) .cfi_restore reg
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/freebsd-11-stable/gnu/usr.bin/gdb/gdbserver/
H A Dfbsd-amd64-low.c32 #include <machine/reg.h>
37 offsetof(struct reg, r_rax),
38 offsetof(struct reg, r_rbx),
39 offsetof(struct reg, r_rcx),
40 offsetof(struct reg, r_rdx),
41 offsetof(struct reg, r_rsi),
42 offsetof(struct reg, r_rdi),
43 offsetof(struct reg, r_rbp),
44 offsetof(struct reg, r_rsp),
45 offsetof(struct reg, r_r
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/freebsd-11-stable/sys/arm/xscale/ixp425/
H A Dixdp425_pci.c62 uint32_t reg; local
66 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
67 reg &= ~(1U << GPIO_PCI_RESET);
68 GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg);
71 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPCLKR);
72 reg &= ~GPCLKR_MUX14;
73 GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPCLKR, reg);
80 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
81 reg &= ~(1U << GPIO_PCI_CLK);
82 reg
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/freebsd-11-stable/sys/mips/broadcom/
H A Dbcm_socinfo.h51 #define BCM_SOCREG(reg) \
52 MIPS_PHYS_TO_KSEG1((BCM_SOCADDR + (reg)))
53 #define BCM_READ_REG32(reg) \
54 *((volatile uint32_t *)BCM_SOCREG(reg))
55 #define BCM_WRITE_REG32(reg, value) \
57 writel((void*)BCM_SOCREG((reg)),value); \
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcTargetStreamer.h21 /// Emit ".register <reg>, #ignore".
22 virtual void emitSparcRegisterIgnore(unsigned reg) = 0;
23 /// Emit ".register <reg>, #scratch".
24 virtual void emitSparcRegisterScratch(unsigned reg) = 0;
33 void emitSparcRegisterIgnore(unsigned reg) override;
34 void emitSparcRegisterScratch(unsigned reg) override;
42 void emitSparcRegisterIgnore(unsigned reg) override {}
43 void emitSparcRegisterScratch(unsigned reg) override {}
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/
H A DVETargetStreamer.h21 /// Emit ".register <reg>, #ignore".
22 virtual void emitVERegisterIgnore(unsigned reg) = 0;
23 /// Emit ".register <reg>, #scratch".
24 virtual void emitVERegisterScratch(unsigned reg) = 0;
33 void emitVERegisterIgnore(unsigned reg) override;
34 void emitVERegisterScratch(unsigned reg) override;
42 void emitVERegisterIgnore(unsigned reg) override {}
43 void emitVERegisterScratch(unsigned reg) override {}
/freebsd-11-stable/sys/contrib/octeon-sdk/
H A Dcvmx-fau.h149 * @param reg FAU atomic register to access. 0 <= reg < 2048.
155 static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg) argument
159 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg));
170 * @param reg FAU atomic register to access. 0 <= reg < 2048.
179 static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, int64_t value) argument
184 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg));
190 * @param reg FAU atomic register to access. 0 <= reg < 204
196 cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value) argument
210 cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value) argument
223 cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value) argument
235 cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) argument
252 cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value) argument
275 cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value) argument
297 cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value) argument
318 cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) argument
352 __cvmx_fau_iobdma_data(uint64_t scraddr, int64_t value, uint64_t tagwait, cvmx_fau_op_size_t size, uint64_t reg) argument
376 cvmx_fau_async_fetch_and_add64(uint64_t scraddr, cvmx_fau_reg_64_t reg, int64_t value) argument
393 cvmx_fau_async_fetch_and_add32(uint64_t scraddr, cvmx_fau_reg_32_t reg, int32_t value) argument
409 cvmx_fau_async_fetch_and_add16(uint64_t scraddr, cvmx_fau_reg_16_t reg, int16_t value) argument
424 cvmx_fau_async_fetch_and_add8(uint64_t scraddr, cvmx_fau_reg_8_t reg, int8_t value) argument
444 cvmx_fau_async_tagwait_fetch_and_add64(uint64_t scraddr, cvmx_fau_reg_64_t reg, int64_t value) argument
464 cvmx_fau_async_tagwait_fetch_and_add32(uint64_t scraddr, cvmx_fau_reg_32_t reg, int32_t value) argument
483 cvmx_fau_async_tagwait_fetch_and_add16(uint64_t scraddr, cvmx_fau_reg_16_t reg, int16_t value) argument
501 cvmx_fau_async_tagwait_fetch_and_add8(uint64_t scraddr, cvmx_fau_reg_8_t reg, int8_t value) argument
513 cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg, int64_t value) argument
525 cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value) argument
537 cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value) argument
548 cvmx_fau_atomic_add8(cvmx_fau_reg_8_t reg, int8_t value) argument
560 cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg, int64_t value) argument
572 cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value) argument
584 cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value) argument
595 cvmx_fau_atomic_write8(cvmx_fau_reg_8_t reg, int8_t value) argument
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/freebsd-11-stable/contrib/gdb/gdb/
H A Duser-regs.c62 user_reg_read_ftype *read, struct user_reg *reg)
67 gdb_assert (reg != NULL);
68 reg->name = name;
69 reg->read = read;
70 reg->next = NULL;
71 (*regs->last) = reg;
94 struct user_reg *reg; local
97 for (reg = builtin_user_regs.first; reg != NULL; reg
61 append_user_reg(struct gdb_user_regs *regs, const char *name, user_reg_read_ftype *read, struct user_reg *reg) argument
147 struct user_reg *reg; local
165 struct user_reg *reg; local
186 struct user_reg *reg = usernum_to_user_reg (gdbarch, regnum - maxregs); local
200 struct user_reg *reg = usernum_to_user_reg (gdbarch, regnum - maxregs); local
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/freebsd-11-stable/sys/arm/freescale/imx/
H A Dimx6_ccm.c91 uint32_t reg; local
94 reg = CCGR0_AIPS_TZ1 | CCGR0_AIPS_TZ2 | CCGR0_ABPHDMA;
95 WR4(sc, CCM_CCGR0, reg);
98 reg = CCGR1_ENET | CCGR1_EPIT1 | CCGR1_GPT | CCGR1_ECSPI1 |
100 WR4(sc, CCM_CCGR1, reg);
103 reg = CCGR2_I2C1 | CCGR2_I2C2 | CCGR2_I2C3 | CCGR2_IIM |
107 WR4(sc, CCM_CCGR2, reg);
110 reg = CCGR3_OCRAM | CCGR3_MMDC_CORE_IPG |
112 WR4(sc, CCM_CCGR3, reg);
115 reg
148 uint32_t reg; local
215 uint32_t reg; local
398 uint32_t reg; local
413 uint32_t reg; local
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