contrib/octeon-sdk/cvmx-fau.h

149  * @param reg    FAU atomic register to access. 0 <= reg < 2048.
155 static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg)
159             cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg));
170  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
179 static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, int64_t value)
184             cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg));
190  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
196 static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value)
198     return cvmx_read64_int64(__cvmx_fau_atomic_address(0, reg, value));
204  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
210 static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value)
212     return cvmx_read64_int32(__cvmx_fau_atomic_address(0, reg, value));
218  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
223 static inline int16_t cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value)
225     return cvmx_read64_int16(__cvmx_fau_atomic_address(0, reg, value));
231  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
235 static inline int8_t cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value)
237     return cvmx_read64_int8(__cvmx_fau_atomic_address(0, reg, value));
244  * @param reg    FAU atomic register to access. 0 <= reg < 2048.
252 static inline cvmx_fau_tagwait64_t cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value)
259     result.i64 = cvmx_read64_int64(__cvmx_fau_atomic_address(1, reg, value));
267  * @param reg    FAU atomic register to access. 0 <= reg < 2048.
275 static inline cvmx_fau_tagwait32_t cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value)
282     result.i32 = cvmx_read64_int32(__cvmx_fau_atomic_address(1, reg, value));
290  * @param reg    FAU atomic register to access. 0 <= reg < 2048.
297 static inline cvmx_fau_tagwait16_t cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value)
304     result.i16 = cvmx_read64_int16(__cvmx_fau_atomic_address(1, reg, value));
312  * @param reg    FAU atomic register to access. 0 <= reg < 2048.
318 static inline cvmx_fau_tagwait8_t cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value)
325     result.i8 = cvmx_read64_int8(__cvmx_fau_atomic_address(1, reg, value));
346  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
353                                           cvmx_fau_op_size_t size, uint64_t reg)
361                       cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg));
370  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
376 static inline void cvmx_fau_async_fetch_and_add64(uint64_t scraddr, cvmx_fau_reg_64_t reg, int64_t value)
378     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 0, CVMX_FAU_OP_SIZE_64, reg));
387  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
393 static inline void cvmx_fau_async_fetch_and_add32(uint64_t scraddr, cvmx_fau_reg_32_t reg, int32_t value)
395     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 0, CVMX_FAU_OP_SIZE_32, reg));
404  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
409 static inline void cvmx_fau_async_fetch_and_add16(uint64_t scraddr, cvmx_fau_reg_16_t reg, int16_t value)
411     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 0, CVMX_FAU_OP_SIZE_16, reg));
420  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
424 static inline void cvmx_fau_async_fetch_and_add8(uint64_t scraddr, cvmx_fau_reg_8_t reg, int8_t value)
426     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 0, CVMX_FAU_OP_SIZE_8, reg));
438  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
444 static inline void cvmx_fau_async_tagwait_fetch_and_add64(uint64_t scraddr, cvmx_fau_reg_64_t reg, int64_t value)
446     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 1, CVMX_FAU_OP_SIZE_64, reg));
458  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
464 static inline void cvmx_fau_async_tagwait_fetch_and_add32(uint64_t scraddr, cvmx_fau_reg_32_t reg, int32_t value)
466     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 1, CVMX_FAU_OP_SIZE_32, reg));
478  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
483 static inline void cvmx_fau_async_tagwait_fetch_and_add16(uint64_t scraddr, cvmx_fau_reg_16_t reg, int16_t value)
485     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 1, CVMX_FAU_OP_SIZE_16, reg));
497  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
501 static inline void cvmx_fau_async_tagwait_fetch_and_add8(uint64_t scraddr, cvmx_fau_reg_8_t reg, int8_t value)
503     cvmx_send_single(__cvmx_fau_iobdma_data(scraddr, value, 1, CVMX_FAU_OP_SIZE_8, reg));
509  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
513 static inline void cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg, int64_t value)
515     cvmx_write64_int64(__cvmx_fau_store_address(0, reg), value);
521  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
525 static inline void cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value)
527     cvmx_write64_int32(__cvmx_fau_store_address(0, reg), value);
533  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
537 static inline void cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value)
539     cvmx_write64_int16(__cvmx_fau_store_address(0, reg), value);
545  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
548 static inline void cvmx_fau_atomic_add8(cvmx_fau_reg_8_t reg, int8_t value)
550     cvmx_write64_int8(__cvmx_fau_store_address(0, reg), value);
556  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
560 static inline void cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg, int64_t value)
562     cvmx_write64_int64(__cvmx_fau_store_address(1, reg), value);
568  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
572 static inline void cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value)
574     cvmx_write64_int32(__cvmx_fau_store_address(1, reg), value);
580  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
584 static inline void cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value)
586     cvmx_write64_int16(__cvmx_fau_store_address(1, reg), value);
592  * @param reg     FAU atomic register to access. 0 <= reg < 2048.
595 static inline void cvmx_fau_atomic_write8(cvmx_fau_reg_8_t reg, int8_t value)
597     cvmx_write64_int8(__cvmx_fau_store_address(1, reg), value);