19406Sbde/*- 29406Sbde * Copyright (c) 1995 Bruce Evans. 39406Sbde * All rights reserved. 49406Sbde * 59406Sbde * Redistribution and use in source and binary forms, with or without 69406Sbde * modification, are permitted provided that the following conditions 79406Sbde * are met: 89406Sbde * 1. Redistributions of source code must retain the above copyright 99406Sbde * notice, this list of conditions and the following disclaimer. 109406Sbde * 2. Redistributions in binary form must reproduce the above copyright 119406Sbde * notice, this list of conditions and the following disclaimer in the 129406Sbde * documentation and/or other materials provided with the distribution. 139406Sbde * 3. Neither the name of the author nor the names of contributors 149406Sbde * may be used to endorse or promote products derived from this software 159406Sbde * without specific prior written permission. 169406Sbde * 179406Sbde * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 189406Sbde * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 199406Sbde * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 209406Sbde * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 219406Sbde * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 229406Sbde * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 239406Sbde * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 249406Sbde * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 259406Sbde * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 269406Sbde * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 279406Sbde * SUCH DAMAGE. 289406Sbde * 2950477Speter * $FreeBSD$ 309406Sbde */ 319406Sbde 329406Sbde/* 339406Sbde * Definitions for Cyclades Cyclom-Y serial boards. 349406Sbde */ 359406Sbde 3641309Sbde/* 3741309Sbde * Cyclades register offsets. These are physical offsets for ISA boards 3841309Sbde * and physical offsets divided by 2 for PCI boards. 3941309Sbde */ 4041309Sbde#define CY8_SVCACKR 0x100 /* (r) */ 4141309Sbde#define CY8_SVCACKT 0x200 /* (r) */ 4241309Sbde#define CY8_SVCACKM 0x300 /* (r) */ 4341309Sbde#define CY16_RESET 0x1400 /* (r) */ 4441309Sbde#define CY_CLEAR_INTR 0x1800 /* intr ack address (w) */ 459406Sbde 4618679Sdg#define CY_MAX_CD1400s 8 /* for Cyclom-32Y */ 479406Sbde 4838303Sbde#define CY_CLOCK(version) ((version) >= 0x48 ? 60000000 : 25000000) 4938303Sbde#define CY_RTS_DTR_SWAPPED(version) ((version) >= 0x48) 509406Sbde 5141309Sbde/* 5241309Sbde * The `cd' macros are for access to cd1400 registers. The `cy' macros 5341309Sbde * are for access to Cyclades registers. Both sets of macros scale the 5441309Sbde * register number to get an offset, but the scales are different for 5541309Sbde * mostly historical reasons. 5641309Sbde */ 579406Sbde#ifdef CyDebug 5841309Sbde#define cd_inb(iobase, reg, cy_align) \ 5941309Sbde (++cd_inbs, *((iobase) + (2 * (reg) << (cy_align)))) 6041309Sbde#define cy_inb(iobase, reg, cy_align) \ 6141309Sbde (++cy_inbs, *((iobase) + ((reg) << (cy_align)))) 6241309Sbde#define cd_outb(iobase, reg, cy_align, val) \ 6341309Sbde (++cd_outbs, (void)(*((iobase) + (2 * (reg) << (cy_align))) = (val))) 6441309Sbde#define cy_outb(iobase, reg, cy_align, val) \ 6541309Sbde (++cy_outbs, (void)(*((iobase) + ((reg) << (cy_align))) = (val))) 669406Sbde#else 6741309Sbde#define cd_inb(iobase, reg, cy_align) \ 6841309Sbde (*((iobase) + (2 * (reg) << (cy_align)))) 6941309Sbde#define cy_inb(iobase, reg, cy_align) \ 7041309Sbde (*((iobase) + ((reg) << (cy_align)))) 7141309Sbde#define cd_outb(iobase, reg, cy_align, val) \ 7241309Sbde ((void)(*((iobase) + (2 * (reg) << (cy_align))) = (val))) 7341309Sbde#define cy_outb(iobase, reg, cy_align, val) \ 7441309Sbde ((void)(*((iobase) + ((reg) << (cy_align))) = (val))) 759406Sbde#endif 76